THE MICROPROCESSOR AND ITS Lecture 3

ARCHITECTURE
LECTURE OUTLINE

Introduction to Protected Mode Addressing

o Selectors and Descriptors
o Program-Invisible Registers

Flat Mode Memory

 Data-addressing modes
o Register Addressing
o Immediate Addressing
2–3 INTRO TO PROTECTED MODE MEMORY ADDRESSING

Allows access to data and programs located within &

above the first 1M byte of memory.
Protected mode is where Windows operates.
In place of a segment address, the segment register
contains a selector that selects a descriptor from a
descriptor table.
The descriptor describes the memory segment’s location,
length, and access rights.
SELECTORS AND DESCRIPTORS
The descriptor is located in the segment register & describes the
location, length, and access rights of the segment of memory.
 it selects one of 8192 descriptors from one of two tables of
descriptors
Global descriptors contain segment definitions that apply to all
programs.
Local descriptors are usually unique to an application.
 a global descriptor might be called a system descriptor, and
local descriptor an application descriptor
FIGURE 2–6 SHOWS THE FORMAT OF A DESCRIPTOR FOR THE 80286 THROUGH THE CORE2.
EACH DESCRIPTOR IS 8 BYTES IN LENGTH
GLOBAL AND LOCAL DESCRIPTOR TABLES ARE A MAXIMUM OF (8 BYTES*8192) 64K BYTES IN LENGTH
DESCRIPTORS
The base address of the descriptor indicates the starting location of the
memory segment.
 The 80286 microprocessor allows a memory segment to start to any of its 16M bytes
of memory using a 24-bit base address.
 The 80386 and above allow a memory segment to begin at any of its 4G bytes of
memory using a 32-bit base address.
The limit defines the size of the memory segment. The last location of the
segment can be calculated as base address + limit.
 The limit is a 16-bit number in 80286 and a 20-bit number in the 80386 and above.
This allows an 80286-memory segment limit of 64K bytes, and an 80386 and above
memory segment limit of either 1M bytes (granularity bit G=0) or 4G bytes (G=1).
DESCRIPTORS
The AV bit, in the 80386 and above descriptor, is used by some
operating system to indicate that the segment is available (AV=1) or not
available (AV =0).
The D bit indicates how the 80386 through the Pentium 4 instructions
access register and memory data in the protected or real mode.
 If D = 0 , the instructions are 16-bit instructions, compatible with the 8086-80286
microprocessors. This means that the instructions use 16-bit offset addresses and 16-
bit registers by default.
 If D = 1 , the instructions are 32-bit instructions. This means that the instructions use
32-bit offset addresses and 32-bit registers by default.
 DESCRIPTORS
 The access rights byte defines how the memory segment is accessed via
a program.
Describes the segment function in the system and allows complete control
over the segment.
If the segment is a data segment, the direction of growth is specified.
You can specify whether a data segment can be written or is write-
protected.
The code segment is also controlled in a similar fashion and can have
reading inhibited to protect software.
Figure 2–7 The access rights byte for the 80286 through Core2 descriptor.
 SELECTORS
Descriptors are chosen from the descriptor table by the segment register.
 register contains a 13-bit selector field, a table selector bit, and requested privilege level field.
The 13-bit selector chooses one of the 8192 descriptors from the descriptor table.
The TI bit selects either the global descriptor table (TI=0) or the local descriptor
table (TI=1).
The Requested Privilege Level (RPL) requests the access privilege level of a
memory segment.
The highest privilege level is 00 and the lowest is 11.
If the requested privilege level matches or is higher in priority than the privilege level
set by the access rights byte, access is granted. For example, if the requested privilege
level is 10 and the access rights byte sets the segment privilege level at 11, access is
granted because 10 is higher in priority than privilege level 11. Privilege levels are used
in multiuser environments. Windows uses privilege level 00 (ring 0) for the kernel and
driver programs and level 11(ring 3) for applications.
Figure 2–8 The contents of a segment register during protected mode operation of the 80286
through Core2 microprocessors.
Figure 2–9 shows how the segment register, containing a
selector, chooses a descriptor from the global descriptor
table.
The entry in the global descriptor table selects a
segment in the memory system.
Descriptor zero is called the null descriptor, must contain
all zeros, and may not be used for accessing memory.
Figure 2–9 Using the DS register to select a description from the global descriptor table. In this example, the DS register
accesses memory locations 00100000H–001000FFH as a data segment.

Limit : 00FF
Base (starting address) : 100000
Access Rights : 92
Closed: 0000
Address : 100000
+ 00FF
-----------------------
1000FF
 PROGRAM-INVISIBLE REGISTERS
Global and local descriptor tables are found
in the memory system.
To access & specify the table addresses, 80286–Core2
contain program-invisible registers.
not directly addressed by software
Each segment register contains a program-invisible portion
used in the protected mode.
often called cache memory because cache is any memory
that stores information
Figure 2–10 The program-invisible register within the 80286–Core2 microprocessors.
When a new segment number is placed in a segment
register, the microprocessor accesses a descriptor
table and loads the descriptor into the program-
invisible portion of the segment register.
 held there and used to access the memory segment
until the segment number is changed
This allows the microprocessor to repeatedly access a
memory segment without referring to the descriptor
table.
2–5 Flat Mode Memory

•A flat mode memory system is one in which

there is no segmentation.
•does not use a segment register to address
a location in the memory
•First byte address is at 00 0000 0000H; the
last location is at FF FFFF FFFFH.
•address is 40-bits
FIGURE 2–15 THE 64-BIT FLAT MODE MEMORY MODEL.
3-1 DATA-ADDRESSING MODES:
Because the MOV instruction is a very common and flexible instruction, it
provides a basis for the explanation of the data-addressing modes.
 Figure 3–1 illustrates the MOV instruction and defines the direction of data
flow.
The source is to the right and the destination is to the left, next to the
opcode MOV.
- (An opcode, or operation code, tells the microprocessor which operation to
perform.)

FIGURE 3–1 The MOV instruction showing the source, destination, and direction of data flow.
Figure 3–2 shows all possible variations of the data-addressing
modes using the MOV instruction.
Note that these are the same data-addressing modes found with all
versions of the Intel microprocessor.
- except for the scaled-index-addressing mode, which is found only in
the 80386 through the Core2.
 THE DATA-ADDRESSING MODES ARE AS
FOLLOWS:

 Register Addressing
 Immediate Addressing
 Direct Addressing
 Register indirect Addressing
 Base-plus-index Addressing
 Register Relative Addressing
 Relative-plus-index Addressing
 Scaled index Addressing
FIGURE 3–2 8086–Core2 data-addressing modes.
 1- REGISTER ADDRESSING
 The most common form of data addressing.
Once register names learned, easiest to apply.
The microprocessor contains these 8bit register names used with register
addressing: AH, AL, BH, BL, CH, CL, DH, DL.
The microprocessor contains these 16bit register names used with register
addressing: AX, BX, CX, DX, SP, BP, SI, DI.
In the 80386 and above, the extended 32-bit register names are: EAX, EBX, ECX,
EDX, ESP, EBP, EDI, and ESI.
In the 64-bit mode of the Pentium 4, the register names are: RAX, RBX, RCX, RDX,
RSP, RBP, RDI, RSI, and R8 through R15.
Example
Instruction: MOV AX, BX
Type: Register Addressing Mode
Rule: copy the contents from register BX to register AX
 1- REGISTER ADDRESSING
 Memory is not accessed when this addressing mode is executed;
therefore, it is relatively fast.
It is important for instructions to use registers that are the same size.
• Never mix an 8-bit register with a 16-bit register, an 8-bit register with
a 32-bit register, or a l6-bit register with a 32-bit register because this
is not allowed by the microprocessor and results in an error when
assembled.
 It should be noted that the source and destination registers must match
in size.
 In other words coding “ MOV CL, AX” will give an error.
 FIGURE 3–3 The effect of executing the MOV BX, CX instruction at the point just before
the BX register changes. Note that only the rightmost 16 bits of register
EBX change.

Figure 3–3 shows the operation of the MOV BX, CX instruction.

 Note that the source register’s contents do not change, but the destination
register’s contents do change.
 This instruction moves (copies) a l234H from register CX into register BX. This
erases the old contents (76AFH) of register BX, but the contents of CX remain
unchanged.
The contents of the destination register or destination memory location change
for all instructions except the CMP and TEST instructions.
Note that the MOV BX, CX instruction does not affect the leftmost 16 bits of
 1- REGISTER ADDRESSING
Examples of register addressed Instructions
 2- IMMEDIATE ADDRESSING
 The term immediate implies that the data immediately follow the hexadecimal
opcode in the memory.
- immediate data are constant data, whereas the data transferred from a register
or memory location are variable data.
Immediate addressing operates upon a byte or word of data.
In the 80386 through the Core2 microprocessors, immediate addressing also
operates on doubleword data.
Figure 3–4 shows the operation of a MOV EAX,13456H instruction. This instruction
copies the 13456H from the instruction, located in the memory immediately following
the hexadecimal opcode, into register EAX.
FIGURE 3–4 The operation of the MOV EAX,13456H instruction. This instruction
copies the immediate data (13456H) into EAX.

 As with the MOV instruction illustrated in Figure 3–3, the source

data overwrites the destination data.
In symbolic assembly language, the symbol # precedes
immediate data in some assemblers.
- MOV AX, #3456H instruction is an example.
Most assemblers do not use the # symbol, but represent
immediate data as in the MOV AX, 3456H instruction.
In this text, the # symbol is not used for immediate data.
The symbolic assembler portrays immediate data in many ways.
•The letter H appends hexadecimal data.
• If hexadecimal data begin with a letter, the assembler requires
that the data start with a 0. For example, to represent a
hexadecimal F2, 0F2H is used in assembly language.
•Decimal data are represented as is and require no special codes
or adjustments. (An example is the 100 decimal in the MOV
AL,100 instruction.)
•An ASCII-coded character or characters may be depicted in the
immediate form if the ASCII data are enclosed in apostrophes. (An
example is the MOV BH, ‘A’ instruction, which moves an ASCII-
coded letter A [41H] into register BH.)
•Binary data are represented if the binary number is followed by
the letter B, or, in some assemblers, the letter Y.
TABLE 3–2 Examples of immediate addressing using the MOV instruction.
Each statement in an assembly language program consists of four parts
or fields, as illustrated in Example 3–3.
The leftmost field is called the label and it is used to store a symbolic
name for the memory location that it represents.
- All labels must begin with a letter or one of the following special
characters: @, $, -, or ? A label may be of any length from 1 to 35
characters.
- The label appears in a program to identify the name of a memory
location for storing data and for other purposes that are explained as
they appear.
 The next field to the right is called the opcode field; it is designed to
hold the instruction, or opcode.
-The MOV part of the move data instruction is an example of an opcode.
 To the right of the opcode field is the operand field, which contains
information used by the opcode. For example, the MOV AL,BL instruction has
the opcode MOV and operands AL and BL. Note that some instructions contain
between zero and three operands.
 The final field, the comment field, contains a comment about an instruction or
a group of instructions.
- A comment always begins with a semicolon (;).