University Questions with Solutions-

Module 4: Control Unit Design

1) What is a microprogram? Write microprogram for the following operations. (Dec

20222) (5M)

i) ADD R1, M, Register R1 and memory location M are added and result store at
Register R1
ii) MUL R1, R2 Register R1 and R2 are multiplied and result store atRegister R1.
Solution:
i) ADD R1, M

T-state Operation Micro Instructions

T1 PC → MAR PCout, Marin, Read, Clear y, set Cin, Add, Zinn

T2 M → MBR PC <-- PC + Zout, PCin, Wait for memory fetch cycle

1

T3 MBR → IR MBRout, IRin

T4 R1 → x R1out, Xin, CLRC

T5 M → ALU Mout, ADD, Zin

T6 Z → R1 Zout, R1in

T-state Operation Micro Instructions

T7 Check for intr Assumption enabled intr pending, CLRX, SETC, Spout,
SUB, Zin

T8 SP <-- SP – 1 Zout, Spin, MARin

T9 PC → MDR PCout, MDRin, WRITE

T 10 MDR → [SP] Wait for Mem access

1 Prepared by Dr. Mamta Kurvey/Prof. Sukhada Aloni/Prof. Reshma Koli/Computer Engineering
 T 11 PC <--IS Raddr PCin IS Raddr out

i) MUL R1, M

T- state Operation Micro Instructions

T1 PC → MAR PCout, Marin, Read, Clear y, set Cin, Add, Zinn

T2 M → MBR PC<--PC + 1 Zout, PCin, Wait for memory fetch cycle

T- state Operation Micro Instructions

T3 MBR → IR MBRout, IRin

T4 R1 → x R1out, Xin, CLRC

T5 R2 → ALU R2out, MUL, Zin

T6 Z → R1 Zout, R1in

T7 Check for intr Assumption enabled intr pending, CLRX, SETC, Spout,
SUB, Zin

T8 SP <-- SP – 1 Zout, Spin, MARin

T9 PC → MDR PCout, MDRin, WRITE

T 10 MDR → [SP] Wait for Mem access

T 11 PC <-- IS Raddr PCin IS Raddr out.

2 Prepared by Dr. Mamta Kurvey/Prof. Sukhada Aloni/Prof. Reshma Koli/Computer Engineering

 2) Differentiate Between hardwired Control Unit and Microprogrammed Control Unit.
(Dec 2022 and May 2023 and May 2024) (5M)

Solution:

Hardwired Control Unit Microprogrammed Control Unit

1. Hardwired control unit generates the Microprogrammed control unit generates

control signals needed for the processor the control signals with the help of micro
using logic circuits instructions stored in control memory

2. Hardwired control unit is faster when

This is slower than the other as micro
compared to microprogrammed control
instructions are used for generating signals
unit as the required control signals are
here
generated with the help of hardware’s

3. Difficult to modify as the control signals Easy to modify as the modification need to
that need to be generated are hard wired be done only at the instruction level

4. Less costlier than hardwired control as

Costlier as everything has to be realized in
only micro instructions are used for
terms of logic gates
generating control signals

5. It cannot handle complex instructions as

It can handle complex instructions
the circuit design for it becomes complex

6. Only limited number of instructions are Control signals for many instructions can
used due to the hardware implementation be generated

7. Used in computer that makes use of

Used in computer that makes use of
Reduced Instruction Set Computers
Complex Instruction Set Computers (CISC)
(RISC)

3 Prepared by Dr. Mamta Kurvey/Prof. Sukhada Aloni/Prof. Reshma Koli/Computer Engineering

 3) Draw and Explain microinstruction sequencing and execution. (Dec 2023) (5 M)

Solution:
1. Program consist of Number of microinstructions, these microinstructions can de
arithmetic instruction(ADD, SUB, MUL, etc) or it can be logical instruction or it can be shift to
left or right or it can be any branching instruction or it can de any data transfer instruction.

2. The address of the next micro-instruction can be –

• The address of the next micro-instruction can be in the sequence i.e. one after the other.
• Branch address (which can be conditional or unconditional).
• Calculated on the basis of the opcode of the instruction

3. The address of the first micro-instruction can be calculated once from the opcode of the
instruction which is present in the instruction register, then that address is loaded into CMAR
(Control Memory Address Register). CMAR passes the address to the decoder. The decoder
identifies the corresponding micro-instructions from the Control Memory.

IR-→CMAR→Passes this address to Decoder→Decoder identifies control word from

Control memory
4. As we know, usually micro-instructions are not executed sequentially for a long time . Let’s
say after 4 or 5 micro-instructions the branch can usually occur. Therefore, our main motive is
to make the branching algorithm better so that the address of the next micro-instruction can be
calculated efficiently.

5. Therefore, micro-instruction sequencing is the method of determining the flow of the

microprogram.

5. So there are techniques for microinstruction sequencing which are based on the number
of addresses utilized for sequencing –

4 Prepared by Dr. Mamta Kurvey/Prof. Sukhada Aloni/Prof. Reshma Koli/Computer Engineering

 1. Two address fields in each microinstruction (Dual address field).
2. Single address field(Single address field).
3. Variable format microinstructions

1. Two address fields in each microinstruction (Dual address field)

• IR-→CMAR→Passes this address to Decoder→Decoder identifies control word
from Control memory .

• Control word (group of bits) stored in Control Buffer Register (CBR) -Some bits of
control word are used for Address 1 and Address 2 which denotes the address of next
instruction to be executed. Some of the bits of control word belongs to branch logic. So
input to multiplexer is address 1 and address 2, branch logic and IR and based on which
instruction of next microinstruction is calculated.

2. Single address field:

• IR-→CMAR→Passes this address to Decoder→Decoder identifies control word
from Control memory .
• 3 ways to multiplexer to select address of next microinstruction.
5 Prepared by Dr. Mamta Kurvey/Prof. Sukhada Aloni/Prof. Reshma Koli/Computer Engineering
 3. Variable format microinstructions:
IR-→CMAR→Passes this address to Decoder→Decoder identifies control word from
Control memory .

• In this technique two formats are used. In such a technique, one bit is needed in the
microinstruction to differentiate between control microinstruction or a branching
microinstruction. The first format provides the control microinstruction(i.e. the bits are
6 Prepared by Dr. Mamta Kurvey/Prof. Sukhada Aloni/Prof. Reshma Koli/Computer Engineering
 used to generate control signals) , while the second format provides the branch logic
and address(there can be conditional or unconditional branch).
• In the first format, the microinstruction contains control signals, then the next
microinstruction address is calculated either by using the op-code of the instruction
register or it is the address of the next microinstruction in sequence. In this approach ,
an extra cycle is needed for branch microinstruction.

4) What is state table method used for design hardwired Control Unit. (Dev-Nov 2023)
(5M)

Solution:
Hardwired Control Unit:

3 Ways to design hardwired Control Unit:

1. State Table Method
2. Delay Element Method
3. Sequence Counter Method

7 Prepared by Dr. Mamta Kurvey/Prof. Sukhada Aloni/Prof. Reshma Koli/Computer Engineering

 1. State Table Method: Behaviour of control unit is designed in the form of state table

• Here, each row represents the T-states and the columns represent the instructions.
• Every intersection of the specific column to each row indicates which control signal will be
produced in the corresponding T- state of an instruction.
• Here the hardware circuitry is designed for each column(i.e. for a specific instruction) for
producing control signals in different T-states.
Advantage –
• It is the simplest method.
• This method is mainly used for small instruction set processors (i.e. in RISC processors).
Disadvantages:
• In modern processors, there is a very large number of instruction set. Therefore,
the circuit becomes complicated to design, difficult to debug, and if we make any
modifications to the state table then the large parts of the circuit need to be changed.
• Therefore ,this is not widely used for these kinds of processors.

5) What is state table and Delay element method used for design hardwired Control Unit.
(Dec 2022 and May 2024) (5M)

Solution:
Note: Refer 4’th question answer for State Stable Method.
1. State Table Method:
2. Delay element method:
• Here the control unit behaviour is represented in the form of a flowchart.
• Each step in the flowchart represents a control signal that needs to be produced
for processing the instructions.

8 Prepared by Dr. Mamta Kurvey/Prof. Sukhada Aloni/Prof. Reshma Koli/Computer Engineering

 • If all the steps of the instructions are performed, this means the instruction is executed
completely.
• Control signals perform micro-operations and each micro-operation requires one
T-state.
• For the micro-operations which are independent, they are required to be performed in
different T-state. Therefore, for every consecutive control signal an exactly 1-state
delay is required, which can be produced with the help of D FF.
• Therefore. D Flip-Flops are inserted between every two consecutive control signals.

• In a flowchart, if there is a multiple entry point for control signal then to combine two
or more paths, we use an OR gate.

• A decision box is converted into a set of two complementing AND gates.

9 Prepared by Dr. Mamta Kurvey/Prof. Sukhada Aloni/Prof. Reshma Koli/Computer Engineering

 • Example –
Suppose the processor has two instructions add or subtract (Therefore an opcode of 1
bit is needed in which 0 opcode for add instruction and 1 for subtract is used.

• Flowchart design –

Say C1,C2,C3 is the control signals for fetching the instruction. When X= 0, then
C4 control signal is produced (i.e. decoding) which is used for performing add
operation, and when x=1, then control signal C 5 will be produced for performing the
subtract operation. And c6 control signal is used for storing the result and the process
ends.

• Advantage –
This method has a logical approach; therefore, it helps to reduce the circuit complexity.

• Drawback –
As the number of instructions increases, the number of D FF for generating delay
is increased, so overall circuit complexity and cost increases.

10 Prepared by Dr. Mamta Kurvey/Prof. Sukhada Aloni/Prof. Reshma Koli/Computer Engineering

 6) Explain with diagram functioning of Microprogrammed control unit. (May 2022) (5M)
Solution:
A Microprogrammed Control Unit is a type of control unit used in computers to generate
control signals by interpreting a set of instructions, called microinstructions, stored in a control
memory. This is in contrast to a Hardwired Control Unit, which generates signals through fixed
logic circuits.

Functioning:
The microprogrammed control unit generates control signals using a sequence of
microinstructions stored in a control memory, often ROM (Read-Only Memory). Each instruction
specifies a set of control signals that define the operations to be performed by the CPU.

1. Control Memory: Stores the microinstructions that define the behavior of the control unit.
2. Microinstruction Register (MIR): Holds the current microinstruction fetched from the control
memory.
3. Control Address Register (CAR): Holds the address of the next microinstruction to be fetched
from the control memory.
4. Sequencing Logic Unit: Decides the next address to be fed into the CAR based on conditions,
such as the result of previous operations.
5. Control Signals: Microinstructions are translated into control signals, which direct other parts
of the CPU.

Steps of Operation:
1. The Control Address Register (CAR) holds the address of the next microinstruction.
2. This address is sent to the Control Memory, which outputs the corresponding
microinstruction.
3. The microinstruction is loaded into the Microinstruction Register (MIR).
4. The Microinstruction Register decodes the instruction and generates the required control
signals to execute the current operation.
5. The Sequencing Logic Unit determines the next address based on conditions like instruction
type or status flags.

11 Prepared by Dr. Mamta Kurvey/Prof. Sukhada Aloni/Prof. Reshma Koli/Computer Engineering

 6. The next address is fed into the Control Address Register (CAR), and the process repeats.

7) Explain Microinstruction Format (May 2024) (5 M)

Solution:

1. Microinstruction format is 20 bit

2. Consist of following fields:
✓ Opcode or field F1, F2 and F3 -Micro-operation filed
✓ CD (Condition Field)
✓ BR (Branch Field)
✓ AD (Address Field)

2. F1, F2, F3 are the micro-operation fields. They determine micro-operations for the
computer.
3. CD is the condition for branching. They choose the status bit conditions.
4. BR is the branch field. It determines the type of branch.

12 Prepared by Dr. Mamta Kurvey/Prof. Sukhada Aloni/Prof. Reshma Koli/Computer Engineering

 5. AD is the address field. It includes the address field whose length is 7 bits.
6. The micro-operations are divided into three fields of three bits each. These three bits can
define seven different micro-operations. In total there are 21 operations as displayed in
the table.

➢ Field F1, F2 and F3:

Name: Code Symbol

000 None NOP

001 AC ← AC + DR ADD

010 AC ← 0 CLRAC

011 AC ← AC + 1 INCAC
F1
100 AC ← DR DRTAC

101 AR ← DR(0 − 10) DRTAR

110 AR ← PC PCTAR

111 AC ← AC + DR WRITE

000 None NOP

001 AC ← AC + DR SUB

010 AC ← AC ∨ DR OR

011 AC ← AC ∧ DR AND
F2
100 DR ← M[AR] READ

101 DR ← AC ACTDR

110 DR ← DR + 1 INCDR

111 DR(0 − 10) ← PC PCTDR

000 None NOP

F3 001 AC ← AC ⊕ DR XOR

010 AC ← AC′ COM

13 Prepared by Dr. Mamta Kurvey/Prof. Sukhada Aloni/Prof. Reshma Koli/Computer Engineering

 Name: Code Symbol

011 AC ← shl AC SHL

100 AC ← shr AC SHR

101 PC ← PC + 1 INCPC

110 PC ← AR ARTPC

111 DR(0 − 10) ← PC Reserved

7. As shown in the table, each microinstruction can have only three micro-operations, one
from each field. If it uses less than three, it will result in more than one operation using
the no operation binary code.

➢ Condition Field

A condition field includes 2 bits. They are encoded to define four status bit conditions. As
stated in the table, the first condition is always a 1, with CD = 0. The symbol that can indicate
this condition is ‘U’. The table displays the multiple condition fields and their summary in
an easy manner.

Condition Field Symbols and Descriptions

14 Prepared by Dr. Mamta Kurvey/Prof. Sukhada Aloni/Prof. Reshma Koli/Computer Engineering

 ➢ Branch Field

The BR (branch) field includes 2 bits. It can be used by connecting with the AD (address) field.
The reason for connecting with the AD field is to select the address for the next microinstruction.
The table illustrates the various branch fields and their functions.

Branch Field Symbols and Descriptions

As shown in the table, when BR = 00, a JMP operation is implemented and when BR = 01, a
subroutine is called. The only difference between the two instructions is that when the
microinstruction is saved, the return address is saved in the Subroutine Register (SBR).

These two operations are dependent on the CD field values. When the status bit condition of the CD
field is defined as 1, the address that is next in order is transferred to CAR. Else, it gets incremented.
If the instruction needs to return from the subroutine, its BR field is determined as 10.

This results in the transfer of the return address from SBR to CAR. The opcode bits of instruction
can be mapped with an address for CAR if the BR field is 11. They are present in DR (11 - 14) after
instruction is read from memory. The last two conditions in the BR fields are not dependent on
the CD and AD field values.

➢ Address Field:

• AD is 7-bit field
• Control memory of control unit Consist of 128 words (27=128)

15 Prepared by Dr. Mamta Kurvey/Prof. Sukhada Aloni/Prof. Reshma Koli/Computer Engineering