SiHG125N65E

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Vishay Siliconix
E Series Power MOSFET
FEATURES
D
• 4th generation E series technology
TO-247AC
• Low figure-of-merit (FOM) Ron x Qg
• Low effective capacitance (Co(er))
G • Reduced switching and conduction losses
• Avalanche energy rated (UIS)
S • Kelvin connection for reduced gate noise
D
G S • Material categorization: for definitions of compliance
N-Channel MOSFET
please see www.vishay.com/doc?99912

APPLICATIONS
PRODUCT SUMMARY • Server and telecom power supplies
VDS (V) at TJ max. 700 • Switch mode power supplies (SMPS)
RDS(on) typ. () at 25 °C VGS = 10 V 0.106 • Power factor correction power supplies (PFC)
Qg max. (nC) 57
• Lighting
- High-intensity discharge (HID)
Qgs (nC) 15
- Fluorescent ballast lighting
Qgd (nC) 14
• Industrial
Configuration Single
- Welding
- Induction heating
- Motor drives
- Battery chargers
- Solar (PV inverters)

ORDERING INFORMATION
Package TO-247AC
Lead (Pb)-free and halogen-free SiHG125N65E-GE3

ABSOLUTE MAXIMUM RATINGS (TC = 25 °C, unless otherwise noted)

PARAMETER SYMBOL LIMIT UNIT
Drain-source voltage VDS 650
V
Gate-source voltage VGS ± 30
TC = 25 °C 27
Continuous drain current (TJ = 150 °C) VGS at 10 V ID
TC = 100 °C 17 A
Pulsed drain current a IDM 60
Linear derating factor 1.67 W/°C
Single pulse avalanche energy b EAS 81 mJ
Maximum power dissipation PD 208 W
Operating junction and storage temperature range TJ, Tstg -55 to +150 °C
Drain-source voltage slope 100
dv/dt V/ns
Reverse diode dv/dt c 7.1
Notes
a. Repetitive rating; pulse width limited by maximum junction temperature
b. VDD = 140 V, starting TJ = 25 °C, L = 28.2 mH, Rg = 25 , IAS = 2.4 A
c. ISD  ID, di/dt = 100 A/μs, starting TJ = 25 °C

S24-0434-Rev. B, 29-Apr-2024 1 Document Number: 92528

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THERMAL RESISTANCE RATINGS

PARAMETER SYMBOL TYP. MAX. UNIT
Maximum junction-to-ambient RthJA - 40
°C/W
Maximum junction-to-case (drain) RthJC - 0.6

SPECIFICATIONS (TJ = 25 °C, unless otherwise noted)

PARAMETER SYMBOL TEST CONDITIONS MIN. TYP. MAX. UNIT
Static
Drain-source breakdown voltage VDS VGS = 0 V, ID = 250 μA 650 - - V
VDS temperature coefficient VDS/TJ Reference to 25 °C, ID = 1 mA - 0.61 - V/°C
Gate-source threshold voltage (N) VGS(th) VDS = VGS, ID = 250 μA 3.0 - 5.0 V
VGS = ± 20 V - - ± 100 nA
Gate-source leakage IGSS
VGS = ± 30 V - - ±1 μA
VDS = 650 V, VGS = 0 V - - 1
Zero gate voltage drain current IDSS μA
VDS = 520 V, VGS = 0 V, TJ = 125 °C - - 10
Drain-source on-state resistance RDS(on) VGS = 10 V ID = 12 A - 0.106 0.120 
Forward transconductance a gfs VDS = 8 V, ID = 12 A - 11 - S
Dynamic
Input capacitance Ciss VGS = 0 V, - 1938 -
Output capacitance Coss VDS = 100 V, - 71 -
Reverse transfer capacitance Crss f = 100 kHz - 2 -
Effective output capacitance, energy pF
Co(er) - 81 -
related a
VDS = 0 V to 400 V, VGS = 0 V
Effective output capacitance, time 
Co(tr) - 546 -
related b
Total gate charge Qg - 38 57
Gate-source charge Qgs VGS = 10 V ID = 12 A, VDS = 520 V - 15 - nC
Gate-drain charge Qgd - 14 -
Turn-on delay time td(on) - 26 52
Rise time tr VDD = 520 V, ID = 12 A, - 59 118
ns
Turn-off delay time td(off) VGS = 10 V, Rg = 9.1  - 46 92
Fall time tf - 26 52
Gate input resistance Rg f = 1 MHz, Open Drain 0.4 0.8 1.6 
Drain-Source Body Diode Characteristics
MOSFET symbol
Continuous source-drain diode current IS D
- - 25
showing the 
integral reverse G
A
Pulsed diode forward current ISM p - n junction diode S - - 60

Diode forward voltage VSD TJ = 25 °C, IS = 12 A, VGS = 0 V - - 1.2 V

Reverse recovery time trr - 345 690 ns
TJ = 25 °C, IF = IS = 12 A,
Reverse recovery charge Qrr - 4.4 8.8 μC
di/dt = 100 A/μs, VR = 25 V
Reverse recovery current IRRM - 22 - A

S24-0434-Rev. B, 29-Apr-2024 2 Document Number: 92528

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TYPICAL CHARACTERISTICS (25 °C, unless otherwise noted)

Axis Title Axis Title

80 10000 3.0 10000

RDS(on) - Drain-to-Source On-Resistance

15 V TJ = 25 °C ID =12 A
14 V
ID - Drain-to-Source Current (A)

13 V
2.5
60 12 V 9V
11 V
8V 1000 2.0 1000
10 V

(Normalized)
2nd line

2nd line
2nd line

1st line

1st line
40 1.5
VGS = 10 V
7V 100 1.0 100
20
0.5
6V
0 5V 10 0 10
0 5 10 15 20 -60 -40 -20 0 20 40 60 80 100 120 140 160
VDS - Drain-to-Source Voltage (V) TJ - Junction Temperature (°C)

Fig. 1 - Typical Output Characteristics Fig. 4 - Normalized On-Resistance vs. Temperature

Axis Title Axis Title

60 10000 100 000 10000
15 V VGS = 0 V, f = 100 kHz
14 V TJ = 150 °C Ciss = Cgs + Cgd, Cds shorted
10 000 Crss = Cgd
ID - Drain-to-Source Current (A)

13 V Ciss
12 V Coss = Cds + Cgd
45
C - Capacitance (pF)

11 V
10 V 1000 1000 1000
8V Coss

2nd line
2nd line

1st line
1st line

2nd line
2nd line

30 100

Crss
7V 100 10 100
15
1
6V
5V
0 10 0.1 10
0 5 10 15 20 0 100 200 300 400 500 600
VDS - Drain-to-Source Voltage (V) VDS - Drain-to-Source Voltage (V)

Fig. 2 - Typical Output Characteristics Fig. 5 - Typical Capacitance vs. Drain-to-Source Voltage

Axis Title Axis Title

Eoss - Output Capacitance Stored Energy (µJ)

80 10000 10 000 16

TJ = 25 °C
ID - Drain-to-Source Current (A)

Coss - Output Capacitance (pF)

60 12
1000 1000
2nd line
2nd line
2nd line
1st line
2nd line

40 Coss 8
Eoss

100 100
20 4
TJ = 150 °C

VDS = 8 V
0 10 10 0
0 5 10 15 20 0 100 200 300 400 500 600
VGS - Gate-to-Source Voltage (V) VDS - Drain-to-Source Voltage (V)

Fig. 3 - Typical Transfer Characteristics Fig. 6 - Coss and Eoss vs. VDS

S24-0434-Rev. B, 29-Apr-2024 3 Document Number: 92528

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Axis Title Axis Title

12 10000 30 10000
VGS - Gate-to-Source Voltage (V)

VDS = 520 V
VDS = 325 V 25
9 VDS = 130 V

ID - Drain Current (A)

1000 20 1000
2nd line

2nd line

2nd line
1st line

1st line
2nd line
6 15

100 10 100
3
5

0 10 0 10
0 12 24 36 48 25 50 75 100 125 150
Qg - Total Gate Charge (nC) TC - Case Temperature (°C)

Fig. 7 - Typical Gate Charge vs. Gate-to-Source Voltage Fig. 10 - Maximum Drain Current vs. Case Temperature

Axis Title Axis Title

VDS - Drain-to-Source Breakdown Voltage (V)

100 10000 1.2 10000
ISD - Reverse Drain Current (A)

1.1
1000 1000
(Normalized)

TJ = 150 °C
2nd line

2nd line
1st line

1st line
2nd line

10 1.0
TJ = 25 °C
100 100
0.9

VGS = 0 V
ID = 1 mA
1 10 0.8 10
0.2 0.4 0.6 0.8 1.0 1.2 1.4 -60 -40 -20 0 20 40 60 80 100 120 140 160
VSD - Source-Drain Voltage (V) TJ - Junction Temperature (°C)

Fig. 8 - Typical Source-Drain Diode Forward Voltage Fig. 11 - Temperature vs. Drain-to-Source Voltage

Axis Title
1000 10000
Operation in this area
limited by RDS(on)

100 IDM limited

ID - Drain Current (A)

BVDSS limited
1000
Limited by RDS(on) a
10 100 µs
2nd line

2nd line
1st line

1
100
1 ms

0.1 TC = 25 °C, 10 ms
TJ = 150 °C,
single pulse
0.01 10
1 10 100 1000
VDS - Drain-to-Source Voltage (V)

Fig. 9 - Maximum Safe Operating Area

Note
a. VGS > minimum VGS at which RDS(on) is specified

S24-0434-Rev. B, 29-Apr-2024 4 Document Number: 92528

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Axis Title
1 10000
Duty cycle = 0.5
Normalized Effective Transient

0.2
Thermal Impedance

1000

2nd line
0.1

1st line
0.1
0.05

0.02 100
Single pulse

0.01 10
0.0001 0.001 0.01 0.1 1
Pulse Time (s)

Fig. 12 - Normalized Transient Thermal Impedance, Junction-to-Case

RD VDS
VDS
tp
VGS
D.U.T. VDD
Rg
+
- VDD
VDS
10 V
Pulse width ≤ 1 μs
Duty factor ≤ 0.1 %
IAS

Fig. 16 - Unclamped Inductive Waveforms

Fig. 13 - Switching Time Test Circuit

Qg
VDS 10 V

90 %
Qgs Qgd

VG
10 %
VGS
td(on) tr td(off) tf Charge
Fig. 14 - Switching Time Waveforms Fig. 17 - Basic Gate Charge Waveform

L Current regulator
VDS Same type as D.U.T.
Vary tp to obtain
required IAS
50 kΩ

Rg D.U.T. + 12 V 0.2 μF
0.3 μF
- VDD
+
IAS VDS
D.U.T. -
10 V
tp 0.01 Ω
VGS

3 mA
Fig. 15 - Unclamped Inductive Test Circuit
IG ID
Current sampling resistors

Fig. 18 - Gate Charge Test Circuit

S24-0434-Rev. B, 29-Apr-2024 5 Document Number: 92528

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Peak Diode Recovery dv/dt Test Circuit

+ Circuit layout considerations

D.U.T.
• Low stray inductance
3 • Ground plane
• Low leakage inductance
current transformer
-

+
2
- 4 +
-

Rg • dv/dt controlled by Rg +
• Driver same type as D.U.T. V
- DD
• ISD controlled by duty factor “D”
• D.U.T. - device under test

1 Driver gate drive

P.W.
Period D=
P.W. Period

V GS = 10 V a

D.U.T. ISD waveform

2
Reverse
recovery Body diode forward
current current
di/dt
3 D.U.T. VDS waveform
Diode recovery
dv/dt
V DD

Re-applied
voltage
Body diode forward drop
4 Inductor current

Ripple ≤ 5 % ISD

Note
a. VGS = 5 V for logic level devices

Fig. 19 - For N-Channel

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Technology and Package Reliability represent a composite of all qualified locations. For related documents such as package / tape drawings, part marking, and
reliability data, see www.vishay.com/ppg?92528.

S24-0434-Rev. B, 29-Apr-2024 6 Document Number: 92528

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 Package Information
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Vishay Siliconix
TO-247AC (High Voltage)
VERSION 1: FACILITY CODE = 9

MILLIMETERS MILLIMETERS
DIM. MIN. NOM. MAX. NOTES DIM. MIN. NOM. MAX. NOTES
A 4.83 5.02 5.21 D1 16.46 16.76 17.06 5
A1 2.29 2.41 2.55 D2 0.56 0.66 0.76
A2 1.17 1.27 1.37 E 15.50 15.70 15.87 4
b 1.12 1.20 1.33 E1 13.46 14.02 14.16 5
b1 1.12 1.20 1.28 E2 4.52 4.91 5.49 3
b2 1.91 2.00 2.39 6 e 5.46 BSC
b3 1.91 2.00 2.34 L 14.90 15.15 15.40
b4 2.87 3.00 3.22 6, 8 L1 3.96 4.06 4.16 6
b5 2.87 3.00 3.18 ØP 3.56 3.61 3.65 7
c 0.40 0.50 0.60 6 Ø P1 7.19 ref.
c1 0.40 0.50 0.56 Q 5.31 5.50 5.69
D 20.40 20.55 20.70 4 S 5.51 BSC
Notes
(1) Package reference: JEDEC® TO247, variation AC
(2) All dimensions are in mm
(3) Slot required, notch may be rounded
(4) Dimension D and E do not include mold flash. Mold flash shall not exceed 0.127 mm per side. These dimensions are measured at the
outermost extremes of the plastic body
(5) Thermal pad contour optional with dimensions D1 and E1
(6) Lead finish uncontrolled in L1
(7) Ø P to have a maximum draft angle of 1.5° to the top of the part with a maximum hole diameter of 3.91 mm
(8) Dimension b2 and b4 does not include dambar protrusion. Allowable dambar protrusion shall be 0.1 mm total in excess of b2 and b4
dimension at maximum material condition

Revision: 31-Oct-2022 1 Document Number: 91360

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THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
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 Package Information
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VERSION 2: FACILITY CODE = Y
A A
4
E 7 ØP (Datum B)
B
E/2 S A2 Ø k M DBM
3 R/2 ØP1
A
D2
Q

4 4
2xR
D D1
(2)

1 2 3 D 4
Thermal pad
5 L1

C L 4
E1
See view B A
0.01 M D B M
2 x b2 C View A - A
2x e
3xb
b4 A1
0.10 M C A M
(b1, b3, b5)
Planting Base metal
Lead Assignments
1. Gate D DE E
2. Drain
3. Source (c) c1
C C
4. Drain
(b, b2, b4)
(4)
Section C - C, D - D, E - E
View B

MILLIMETERS MILLIMETERS
DIM. MIN. MAX. NOTES DIM. MIN. MAX. NOTES
A 4.58 5.31 D2 0.51 1.30
A1 2.21 2.59 E 15.29 15.87
A2 1.17 2.49 E1 13.72 -
b 0.99 1.40 e 5.46 BSC
b1 0.99 1.35 Øk 0.254
b2 1.53 2.39 L 14.20 16.25
b3 1.65 2.37 L1 3.71 4.29
b4 2.42 3.43 ØP 3.51 3.66
b5 2.59 3.38 Ø P1 - 7.39
c 0.38 0.86 Q 5.31 5.69
c1 0.38 0.76 R 4.52 5.49
D 19.71 20.82 S 5.51 BSC
D1 13.08 -
Notes
(1) Dimensioning and tolerancing per ASME Y14.5M-1994
(2) Contour of slot optional
(3) Dimension D and E do not include mold flash. Mold flash shall not exceed 0.127 mm (0.005") per side. These dimensions are measured at
the outermost extremes of the plastic body
(4) Thermal pad contour optional with dimensions D1 and E1
(5) Lead finish uncontrolled in L1
(6) Ø P to have a maximum draft angle of 1.5 to the top of the part with a maximum hole diameter of 3.91 mm (0.154")
(7) Outline conforms to JEDEC outline TO-247 with exception of dimension c

Revision: 31-Oct-2022 2 Document Number: 91360

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THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
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 Package Information
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VERSION 3: FACILITY CODE = N
A
A

D2
B E P1
R/2 P
N A2

K M D BM
R

D1
D

D
L1

L
b4 C E1
b2 e A1
b 0.01 M D B M

0.10 M C A M
b1, b3, b5
Base metal

c1
c

b, b2, b4
Plating

MILLIMETERS MILLIMETERS
DIM. MIN. MAX. DIM. MIN. MAX.
A 4.65 5.31 D2 0.51 1.35
A1 2.21 2.59 E 15.29 15.87
A2 1.17 1.37 E1 13.46 -
b 0.99 1.40 e 5.46 BSC
b1 0.99 1.35 k 0.254
b2 1.65 2.39 L 14.20 16.10
b3 1.65 2.34 L1 3.71 4.29
b4 2.59 3.43 N 7.62 BSC
b5 2.59 3.38 P 3.56 3.66
c 0.38 0.89 P1 - 7.39
c1 0.38 0.84 Q 5.31 5.69
D 19.71 20.70 R 4.52 5.49
D1 13.08 - S 5.51 BSC
ECN: E22-0452-Rev. G, 31-Oct-2022
DWG: 5971
Notes
(1) Dimensioning and tolerancing per ASME Y14.5M-1994
(2) Contour of slot optional
(3) Dimension D and E do not include mold flash. Mold flash shall not exceed 0.127 mm (0.005") per side. These dimensions are measured at
the outermost extremes of the plastic body
(4) Thermal pad contour optional with dimensions D1 and E1
(5) Lead finish uncontrolled in L1
(6) Ø P to have a maximum draft angle of 1.5 to the top of the part with a maximum hole diameter of 3.91 mm (0.154")

Revision: 31-Oct-2022 3 Document Number: 91360

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THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
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Revision: 01-Jan-2025 1 Document Number: 91000

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