Combinational Logic Circuits :

Combinational Logic Circuits are made up from different gates that are
“combined” or connected together to produce switching circuits. These
logic gates are the building blocks of combinational logic circuits.

Some of the characteristics of combinational circuits are as follows:

 The output of combinational circuit at any instant of time depends
only on the levels present at input terminals.
 The combinational circuit does not use any memory. The previous
state of input does not have any effect on the present state of the
circuit.
 A combinational circuit can have an n number of inputs and m
number of outputs.

Block diagram

Adder
An adder is a digital circuit that performs addition of numbers. The adder
adds two or three binary digits called augend , addend or carry and
produces two outputs as sum and carry.

Half Adder
Half adder is a combinational logic circuit with two inputs and two
outputs. The half adder circuit is designed to add two binary input
number A and B and produces two outputs sum (S) and carry ( C ).
Block diagram

Truth Table Algebraic Expression

S = AB’ + A’B
=A⊕B

C = AB

Circuit Diagram
Full Adder
Full adder is developed to overcome the drawback of Half Adder circuit. Half adder
cannot able to handle the carry from previous output. Therefore full adder adds two
one-bit numbers A and B and carry from the previous output Cin and produces sum (S)
and carry (Co). That is, the full adder is a three input and two output combinational
circuit.

Block diagram

Truth Table
Circuit Diagram
Logical Expression for Sum
= ABCin + ABCin+ ABCin + ABCin
= Cin (AB + AB) + Cin’ (A’B + AB’)
= Cin XOR (A XOR B)
=A ⊕ B ⊕ Cin

Another form in which COut can be implemented:

= A B + A Cin + B Cin (A + A’)
= A B Cin + A B + A Cin + A’ B Cin
= A B (1 + Cin) + ACin + A’ B C Cin
= A B + A Cin + A’ B Cin
= A B + A C-IN (B + B’) + A’ B Cin
= A B Cin + A B + A B’ Cin + A’ Cin
= A B (Cin + 1) + A B’ Cin + A’ B Cin
= A B + A B’ Cin + A’ B Cin
= AB + Cin (A’ B + A B’)
Therefore COut = AB + Cin (A EX – OR B)

Full Adder Logic Diagram

As the full adder circuit above is basically two half adders connected
together, the truth table for the full adder includes an additional
column to take into account the Carry-in, CIN input as well as the
summed output, S and the Carry-out, COut bit.

Multiplexer :
Multiplexer is a combinational circuit that has maximum of 2n data inputs,
‘n’ selection lines and single output line. One of these data inputs will be
connected to the output based on the values of selection lines.
Since there are ‘n’ selection lines, there will be 2n possible combinations of
zeros and ones. So, each combination will select only one data input.
Multiplexer is also called as Mux.

4x1 Multiplexer

4x1 Multiplexer has four data inputs I3, I2, I1 & I0, two selection lines s1 &
s0 and one output Y. The block diagram of 4x1 Multiplexer is shown in the
following figure.

One of these 4 inputs will be connected to the output based on the

combination of inputs present at these two selection lines. Truth table of
4x1 Multiplexer is shown below.

Selection Lines Output

S1 S0 Y
0 0 I0
0 1 I1
1 0 I2
1 1 I3
From Truth table, we can directly write the Boolean function for output, Y
as
Y=S1′ S0′ I0+S1′ S0 I1+S1 S0′ I2+S1 S0 I3
We can implement this Boolean function using Inverters, AND gates & OR
gate. The circuit diagram of 4x1 multiplexer is shown in the following
figure.

We can easily understand the operation of the above circuit. Similarly, you
can implement 8x1 Multiplexer and 16x1 multiplexer by following the same
procedure.

De-Multiplexer :

De-Multiplexer is a combinational circuit that performs the reverse

operation of Multiplexer. It has single input, ‘n’ selection lines and
maximum of 2n outputs. The input will be connected to one of these
outputs based on the values of selection lines.
Since there are ‘n’ selection lines, there will be 2n possible combinations of
zeros and ones. So, each combination can select only one output. De-
Multiplexer is also called as De-Mux.
1x4 De-Multiplexer

1x4 De-Multiplexer has one input I, two selection lines, s1 & s0 and four
outputs Y3, Y2, Y1 &Y0. The block diagram of 1x4 De-Multiplexer is
shown in the following figure.

The single input ‘I’ will be connected to one of the four outputs, Y3 to
Y0 based on the values of selection lines s1 & s0. The Truth table of 1x4
De-Multiplexer is shown below.

Selection Inputs Outputs

S1 S0 Y3 Y2 Y1 Y0

0 0 0 0 0 I

0 1 0 0 I 0

1 0 0 I 0 0

1 1 I 0 0 0

From the above Truth table, we can directly write the Boolean functions for
each output as
 Y3=S1 S0 I
Y2=S1 S0′ I
Y1=S1′ S0 I
Y0=S1′ S0′ I
We can implement these Boolean functions using Inverters & 3-input AND
gates. The circuit diagram of 1x4 De-Multiplexer is shown in the following
figure.

We can easily understand the operation of the above circuit. Similarly, you
can implement 1x8 De-Multiplexer and 1x16 De-Multiplexer by following
the same procedure.

Decoders

A Decoder can be described as a combinational circuit that converts binary

information from the 'n' coded inputs to a maximum of 2n different outputs.
The following figure shows a 3-to-8 line decoder with three input variables
which are decoded into eight output, each output representing one of the
combinations of the three binary input variables.

The three inverter gates provide the complement of the inputs

corresponding to which the eight AND gates at the output generates one
binary combination for each input. The most common application of this
decoder is binary-to-octal conversion.

The truth table for a 3-to-8 line decoder can be represented as:

x y Z D0 D1 D2 D3 D4 D5 D6 D7

0 0 0 1 0 0 0 0 0 0 0
0 0 1 0 1 0 0 0 0 0 0
 0 1 0 0 0 1 0 0 0 0 0
0 1 1 0 0 0 1 0 0 0 0
1 0 0 0 0 0 0 1 0 0 0
1 0 1 0 0 0 0 0 1 0 0
1 1 0 0 0 0 0 0 0 1 0
1 1 1 0 0 0 0 0 0 0 1

Let us consider an example of 2-to-4 line NAND Gate Decoder which uses
NAND Gates instead of AND gate in the central logic.

The following image shows a 2-to-4 line decoder with NAND gates.

The truth table for a 2-to-4 line decoder can be represented as:

E A1 A0 D0 D1 D2 D3

0 0 0 0 1 1 1
 0 0 1 1 0 1 1
0 1 0 1 1 0 1
0 1 1 1 1 1 0
1 0 0 1 1 1 1

It is also possible to combine two or more decoders to form a large decoder

whenever needed. For instance, we can construct a 3 * 8 decoder by
combining two 2 *4 decoders.

The following image shows a 3 * 8 decoder constructed with two 2 * 4

decoders.

Encoder
An Encoder is a combinational circuit that performs the reverse operation
of Decoder. It has maximum of 2n input lines and ‘n’ output lines. It will
produce a binary code equivalent to the input, which is active High.
Therefore, the encoder encodes 2n input lines with ‘n’ bits.

4 to 2 Encoder

Let 4 to 2 Encoder has four inputs Y3, Y2, Y1 & Y0 and two outputs A1 &
A0. The block diagram of 4 to 2 Encoder is shown in the following figure.

At any time, only one of these 4 inputs can be ‘1’ in order to get the
respective binary code at the output. The Truth table of 4 to 2 encoder is
shown below.

Inputs Outputs

Y3 Y2 Y1 Y0 A1 A0

0 0 0 1 0 0

0 0 1 0 0 1

0 1 0 0 1 0

1 0 0 0 1 1

From Truth table, we can write the Boolean functions for each output as
 A1=Y3+Y2

A0=Y3+Y1

We can implement the above two Boolean functions by using two input OR
gates. The circuit diagram of 4 to 2 encoder is shown in the following
figure.

The above circuit diagram contains two OR gates. These OR gates

encode the four inputs with two bits

Octal to Binary Encoder

Octal to binary Encoder has eight inputs, Y7 to Y0 and three outputs A2,
A1 & A0. Octal to Binary encoder is nothing but 8 to 3 encoder. The block
diagram of octal to binary Encoder is shown in the following figure.
At any time, only one of these eight inputs can be ‘1’ in order to get the
respective binary code. The Truth table of octal to binary encoder is shown
below

Inputs Outputs

Y7 Y6 Y5 Y4 Y3 Y2 Y1 Y0 A2 A1 A0

0 0 0 0 0 0 0 1 0 0 0

0 0 0 0 0 0 1 0 0 0 1

0 0 0 0 0 1 0 0 0 1 0

0 0 0 0 1 0 0 0 0 1 1

0 0 0 1 0 0 0 0 1 0 0

0 0 1 0 0 0 0 0 1 0 1

0 1 0 0 0 0 0 0 1 1 0

1 0 0 0 0 0 0 0 1 1 1

From Truth table, we can write the Boolean functions for each output as
A2=Y7+Y6+Y5+Y4

A1=Y7+Y6+Y3+Y2

A0=Y7+Y5+Y3+Y1
We can implement the above Boolean functions by using four input OR
gates. The circuit diagram of octal to binary encoder is shown in the
following figure.

The above circuit diagram contains three 4-input OR gates. These OR

gates encode the eight inputs with three bits.