Embedded Systems 6
Embedded Systems 6
• PIC
(USUALLY PRONOUNCED AS "PICK") IS A FAMILY
OF MICROCONTROLLERS MADE BY MICROCHIP
TECHNOLOGY, DERIVED FROM THE PIC1650
EMBEDDED SYSTEM
SOL; = 7CH
MOVLW, ADDLW instructions
ADDWF FIleReg, D
IF D=0 → TO WREG
IF D = 1 → TO FILE REGISTER
EXAMPLE
• WHAT DO YOU EXPECT IN WREG AND GPR ?
SOLUTION
WREG = 88H
EXAMPLE
• WHAT DO YOU EXPECT IN WREG AND GPR ?
SLOUTION
WREG = 66H
EASIER FORMAT
EXAMPLE
• State the contents of RAM and WREG of the following.
SOLUTION
WREG = 22H
EXAMPLE
• State the contents of RAM and WREG of the following.
SOLUTION
WREG = 88H
WREG. filereg, and ALU in PIC18
COMPF instruction
•COMPF FileReg, D
HOW
→
WHAT’S THE SUMMATION?
MYVAL = 9
→ →
SUM = ?
QESTION
NEW CHAPTER
Looping in PIC
DECFSZ Instruction and looping
Write a program to
A. Load the PORTB SFR register with value 55h.
B. Complement PORTB 700 times
SOLUTION
→
Looping 100.000 times
→
Other conditional jumps
EXAMPLE
→
FOLLOW SOLUTION
GOTO to itself using $ sign
HERE GOTO HERE
→
Instruction cycle time for the PIC
→
SOLUTION
Loop inside a loop delay
Find the time delay in the following subroutine:
SOLUTION
For the HERE loop, we have (5x 250) 1µs = 1250 µs. The AGAIN loop
repeats the HERE loop 200 times; therefore, we have 200 *1250 µs =
250000 µs, if we do not include the overhead.
MYREG EQU 0X8 EXAMPLE NOP 1
DELAY MOVLW D'200’ 1 NOP 1
MOVWF MYREG 1 NOP 1
AGAIN NOP 1 NOP 1
NOP 1 NOP 1
NOP 1 NOP 1
NOP 1 DECF MYREG, F 1
NOP 1 BNZ AGAIN 2
NOP 1 RETURN 1
SOLUTION
Write a program to toggle all the bits of SFR PORTB every I s. Assume
that the crystal frequency is 10 MHz.
SOLUTION
→
BCD (BINARY CODED DECIMAL) NUMBER
SYSTEM
BCD stands for binary coded
decimal. BCD is needed because in
everyday life we use the digits 0 to
9 for numbers, not binary or hex
numbers. Binary representation of0
to 9 is called BCD
DAW Instruction
The DAW ( decimal adjust WREG) instruction in the PIC 18
is provided to correct the aforementioned problem associated
with BCD addition.
Second Complement
N Flag Vs. C flag
MOVLW 0X23
SUBLW 0X3F
MULLW Instruction
MOVLW 0X25
MULLW 0X65
OVERFLOW
When is the OV flag set?
In 8-bit signed number operations, OV is set to I if either of the
following
two conditions occurs:
I. There is a carry from D6 to D7 but no carry out of D7 (C = 0).
2. There is a carry from D7 out (C = I) but no carry from D6 to D7.
OVERFLOW
OVERFLOW
OVERFLOW
OVERFLOW
QUESTION TO THINK
If t = 75 then wreg = 75
If t > 75 then greg =t
If t < 75 then lreg =t
SOLUTION
EXAMPLE
→
EXAMPLE
ANOTHER SOLUTION
SOLUTION_B
A 66% duty cycle means that the "on" state is twice the "off'
state
EXAMPLE
Write a program and simulate it in Protus ISIS to perform the
following:
(a) keep monitoring the RB2 bit until it becomes HIGH;
(b) when RB2 becomes HIGH, write value 45H to port C, and
also send a high to low pulse to RD3.
SOLUTION
In this program, instruction "BTFSS PORTB,
2" stays in the loop as long as
RB2 is LOW. When RB2 becomes HIGH, it
skips the branch instruction to get out of
The loop, and writes the value 45H to port
C. It also sends a high-to-low pulse to
RD3.
EXAMPLE
Assume that bit RB3 is an input and
represents the condition of a door
alarm. If it goes LOW, it means that
the door is open. Monitor the bit
continuously. Whenever it goes LOW,
send a high-to-low pulse to port RCS
to tum on a buzzer.
SOLUTION
EXAMPLE
A switch is connected to pin RB2. Write a program to
check the status of SW and perform the following:
(a) If SW = 0, send the letter 'N' to PORTD.
(B) If SW =1,send the letter ‘Y' to PORTD.
SOLUTION
ANOTHER SOLUTION
EXAMPLE
→
EXAMPLE
→
SWAPF Instruction
SWAPF fileReg, d
EXAMPLE
A) Swap the contents of the MYREG register if it
contains 0x72.
(B) in the absence of a swapf instruction, how would
you exchange the nibbles?
SOLUTION
NEW CHAPTER
PROGRAM
MEMORY
MAP AND
STACK
FOR
PIC18F25
8/458
IMMEDIATE AND DIRECT ADDRESSING MODES
Write code to send 55H to port B. Include
(a) the register names.
(B) their addresses
REGISTER INDIRECT ADDRESSING MODE
In the register indirect addressing mode, a register is used as a pointer to
the data RAM location. In the PIC 18, three registers are used for this
purpose: FSR0, FSR1, and FSR2.
FSR (file select register)
One of the advantages of register indirect addressing mode is that it makes
accessing data dynamic rather than static.
REGISTER INDIRECT ADDRESSING MODE
• Special register is used as a pointer (actually three of them)
• FSRs (File Register Select) are 12 bit registers: FSR0, FSR1,
FSR2. Each is represented by two SFRs, e.g., FSR0 has FSR0L
and FSR0H.
– LFSR 1, 0x030 ; load 0x30 into FSR 1
– LFSR 0, 0x130 ; load 0x130 into FSR 0
REGISTER INDIRECT ADDRESSING MODE
The file register that the FSR is pointing to can be than reached in
INDF0, INDF1, and INDF2, respectively.
- MOVLW 55H
– LFSR 0, 0x130
– MOVWF INDF0 ; contents of W moved to fileReg 0x130
FSR0-2 REGISTERS USED FOR REGISTER INDIRECT
→
STORING DATA IN ROM
• The ROM (program memory) can be used to store constants (e.g.,
Strings) to save RAM.
• Assembler directive DB (define byte) can be used to Store bytes is
ROM:
READING TABLE ELEMENTS IN THE PIC18
(READING DATA FROM ROM)
Register indirect ROM addressing, i.e., Accessing ROM is done through SFR registers.
• A.K.A. Table processing
• TBLPTR is a 21 bit register (TBLPTRL, TBLPTRH, TBLPTRU) pointing to the data
Accessed in ROM
• TBLAT (table latch) is used to copy the data pointed by TBLPTR, once instructed.
TABLE READ OPERATION
PIC18 TABLE READ INSTRUCTIONS
EXAMPLE
In this program, assume that the word "USA" is burned into
ROM locations starting at 500H, and that the program is
burned into ROM locations starting at 0. Analyze how the
program works and state where "USA" is stored after this
program is run.
SOLUTION
ORG 00H TBLRD*
CLRF TRISB MOVFF TABLAT, PORTB
MOVLW 0X0 INCF TBLPTRL,F
MOVWF TBLPTRL TBLRD*
→
MOVLW 0X05 MOVFF TABLAT, PORTB
Write a program to get the x value from port B and send x^2
to port C. Assume that RB3-RB0 has the x value of 0-9. Use a
look-up table instead of a multiply instruction. What is the
value of port C if we have 9 at port B?
X MULLW 0X2
MOVFF PRODL, WREG
SOLUTION
ORG 0
ADDWF PCL
RETLW D'0'
SETF TRISB RETLW D'1'
CLRF TRISC RETLW D'4'
ANDLW 0X0F
→ RETLW D'16'
RETLW D'25'
CALL X
RETLW D'36'
MOVWF PORTC
RETLW D'49'
BRA LABEL
RETLW D'64'
RETLW D'81'
END
BANK SWITCHING IN PIC16F877A
Data memory organization
The data memory is partitioned into multiple banks which contain the
general purpose registers and the special function registers. Bits RP1
(status) and RP0 (status) are the bank select bits.
BANK SWITCHING IN PIC16F877A
BANK SWITCHING IN PIC18F458
• Max 4K of RAM
• only 256 bytes are addressable
• RAM is divided into a max of 16 banks
• MOVWF filereg , A
– until now we have ignored A
– if A=0 then default bank is used
– if A=1 then bank selector register is used to Determine
bank
BANK SWITCHING IN PIC18F458
MYREG EQU 0x40
MOVLB 0x2 ; use bank 2
MOVLW 0
MOVWF MYREG, 1 ;loc 0x240=0
INCF MYREG, F, 1 ; loc 0x240=1
INCF MYREG, F, 1 ; loc 0x240=2
• what would happen if we omitted the 1 at the end of The
instructions?
EXAMPLE