0% found this document useful (0 votes)
16 views

unit 4-1

Unit 4

Uploaded by

Anant Sharma
Copyright
© © All Rights Reserved
Available Formats
Download as DOCX, PDF, TXT or read online on Scribd
0% found this document useful (0 votes)
16 views

unit 4-1

Unit 4

Uploaded by

Anant Sharma
Copyright
© © All Rights Reserved
Available Formats
Download as DOCX, PDF, TXT or read online on Scribd
You are on page 1/ 13

UNIT -4

Data flow computing is a software paradigm that uses data flow graphs to represent
computations. Data flow graphs are graph models that show how data moves through a program
and how operations are performed on that data. Data flow architecture is an alternative to the von
Neumann architecture, and it can be static or dynamic:

 Data flow graphs


A graph model that uses nodes to represent operations and edges to represent data
dependencies. Data flow graphs can show how data moves through a program and how
operations are performed on that data.
 Data flow architecture
A software paradigm that uses data flow graphs to represent computations. Data flow
architecture can be static or dynamic. In static data flow machines, a single representation of a
data flow graph is loaded before program execution. In dynamic data flow, computation
proceeds as if copies of a data flow graph were generated during program execution.
Here are some other things to know about data flow computing:

 Data flow computing is also known as stream processing or reactive programming.


 Data flow computing can be used for intrasystem scenarios, where data remains within a single
application or infrastructure, or intersystem scenarios, where data flows between interconnected
systems.
 Data flow computing is data-centric, which promotes high-level functional specifications and
simplifies formal reasoning about system components.
Data flow computing is a software paradigm that uses data flow graphs to represent
computations. A data flow graph is a graphical model that shows how data moves between parts
of a computer program.
Data flow computing Data flow graph

Definition A software paradigm that uses data flow A graphical model that shows how
graphs to represent computations data moves between parts of a
computer program

Components Nodes represent operations, and edges Nodes represent operations, and arcs
represent data dependencies represent channels for data objects to
move between actors
Benefits Promotes high-level functional Can be used to determine feasible
specifications and simplifies formal reorderings of operations to reduce
reasoning about system components pipeline or cache conflicts

Key elements of a data flow system

An efficient data flow system requires data consistency, latency, error handling, and
synchronization. As such, these are the most common technologies needed to manage and
implement data flow:

 Batch processing frameworks process and analyze a set of data that has been stored over a period
of time.
 Stream processing platforms continuously capture, store, and process data streams.
 Event-driven architectures permit systems to detect, process, manage, and react to real-time
events.
 Data pipelines move data from one location to another.

Proper data flow design is key in optimizing data processing efficiency, reducing bottlenecks,
and ensuring the reliable delivery of information within complex computing environments.

Data flow diagrams


Data flow diagrams (DFDs) are graphical representations, which describe the processing of data
and its movement through a system or a process. They give a definite picture of how data is fed
into a particular system, how it is processed, where it is stored, and how again it is retrieved.
They are vital in understanding the systems and their efficiency.

Key components of a DFD include:

External entities
Illustrate entities that exist outside of the system that act as the source and or destination of data
as rectangles.

Processes
These are represented in the figure by circles or ovals to indicate the processing or changed form
of data within the system.

Data stores
These are illustrated as open-ended rectangles and are the locations where information is stored
for later use.

Data flows
Lines connecting data entities indicating data flow from one entity to the next from an entity to a
process or from a process to an entity.

Levels of DFDs
There are two different levels of DFDs, each providing varying degrees of detail:

Level 0 DFD (Context Diagram): These diagrams provide a big picture at once, presenting the
system as a single process with interconnections with other systems and objects that is also
oriented more to the data conversion rather than the inner process description.

Level 1 DFD: These divide the single process in Level 0 into sub-processes and consequently
describes the flow of data within the system in detail.

Data flow benefits and use cases

Here are five benefits of implementing efficient data flow within a system:

Optimized processing
Properly structured data flow enables the efficient movement of data through various processing
stages. This optimization reduces unnecessary data transfers, transformations, and computations,
resulting in faster and more streamlined data processing.

Resource utilization
Data flow facilitates resource allocation by ensuring that processing resources are utilized
effectively. It prevents resource overload by distributing data processing tasks based on the
available capacity, thus maximizing system performance and minimizing latency.

Scalability
Well-designed data flow architectures can scale horizontally or vertically to accommodate
increasing data volumes and processing demands. This scalability ensures that systems can
handle growing workloads without sacrificing performance or responsiveness.

Real-time insights
Data flow mechanisms can support real-time processing and analysis, enabling organizations to
gain immediate insights from incoming data. This is especially critical in scenarios like IoT
applications, financial trading platforms, and monitoring systems, where real-time decision-
making is essential.

Error detection and handling


Clear data flow pathways make it easier to identify and address errors or anomalies in data. By
implementing checkpoints, monitoring points, and error-handling mechanisms along the data
flow route, organizations can enhance data quality and reliability.
In essence, a well-defined data flow enhances the overall efficiency, scalability, responsiveness,
and reliability of computational systems, enabling organizations to harness the full potential of
their data for informed decision-making and strategic planning.

Challenges with data flows


Here are five challenges commonly associated with managing data flow:

Data consistency and integrity


Ensuring data remains consistent and accurate as it flows through various processing stages can
be challenging. Synchronizing data updates, dealing with concurrent modifications, and avoiding
data corruption are crucial considerations.

Latency and real-time processing


In scenarios where real-time data processing is essential, managing low-latency data flow
becomes a challenge. Minimizing the time it takes for data to traverse the system while
maintaining accuracy and quality requires careful architecture and optimization.

Data security and privacy


As data moves between different processing points, ensuring its security and maintaining user
privacy become significant challenges. Encryption, access controls, and secure data transmission
mechanisms are necessary to mitigate risks.

Complexity in scaling
While data flow architectures can be designed to scale, managing the scaling process itself can
be complex. Handling load distribution, resource allocation, and maintaining consistent
performance across scaling instances requires careful planning.

Error handling and monitoring


Detecting errors and anomalies in data flow, as well as implementing effective error-handling
mechanisms, is essential. This becomes challenging in large and intricate data flow scenarios
where pinpointing the root cause of an issue can be time-consuming.

Scalable, real-time data flow with Confluent


Building complex data flows capable of processing and governing data in real time is
challenging enough. But these days, most developers are expected to build their organization’s
mission-critical applications and services in the cloud.
data flow graph (DFG)

 Nodes: Represent functions or predicates that are applied to data objects. Nodes are also known
as actors.
 Arcs: Represent data dependencies between functions and the channels through which data
objects move. Arcs contain data values or tokens.
 Data flow: Shows the processing sequence, parallelism, and data dependence.
DFGs can be used to: Model straight-line code, Model complete programs, Optimize
performance, and Optimize for power consumption.

Here are some characteristics of nodes in a DFG:

 Nodes fire only when a single token is present on every input to the node.
 If at least one input is missing a token, the node is blocked.
 The output of the nodes (edges) is implemented as FIFO buffers

Data-Flow Graphs

A data-flow graph (DFG) is a graph which represents a data dependancies between a number of
operations. Any algorithm consists of a number of ordered operations. Since examples are
always better than words, consider the procedure for finding the root of a quadratic equation
(algorithm assumes real roots):
quad( a, b, c)
t1 = a*c;
t2 = 4*t1;
t3 = b*b;
t4 = t3 - t2;
t5 = sqrt( t4);
t6 = -b;
t7 = t6 - t5;
t8 = t7 + t5;
t9 = 2*a;
r1 = t7/t9;
r2 = t8/t9;
One could implement this algorithm line by line, but a more general realization would note the
dependancies between each operation. For example t2 can not be computed before t1, but t3
could be computed before t1 or t2.
Here are some differences between 8-bit and 16-bit Intel microprocessors:

 Data bus
An 8-bit microprocessor has an 8-bit data bus, while a 16-bit microprocessor has a 16-bit data
bus.
 Address bus
An 8-bit microprocessor has a 16-bit address bus, while a 16-bit microprocessor has a 20-bit
address bus.
 Memory capacity
An 8-bit microprocessor can access up to 64 kilobytes of memory, while a 16-bit
microprocessor can access up to 1 megabyte of memory.
 Data processing
An 8-bit microprocessor can process 8 bits of data in a single cycle, while a 16-bit
microprocessor can process 16 bits of data in a single cycle.
Here are some other details about Intel microprocessors:

 The Intel 8085 microprocessor was designed in 1976.


 The Intel 8086 microprocessor was designed in 1976 as an improved model of the 8085.
 The 8085 microprocessor has an 8-bit accumulator, six 8-bit general purpose registers, a 16-bit
stack pointer, and a 16-bit program counter.
 The 8086 microprocessor has general purpose 16-bit registers, such as AX, BX, CX, and DX.
 The AX register is used as a 16-bit accumulator, with the lower 8-bit designated as AL and the
higher 8-bit designated as AH.

Architecture of 8085 microprocessor

8085 is an 8-bit, general-purpose microprocessor. It consists of the following


functional units:
Arithmetic and Logic Unit (ALU) :

It is used to perform mathematical operations like addition, multiplication,


subtraction, division, decrement, increment, etc. Different operations are carried
out in ALU: Logical operations, Bit-Shifting Operations, and Arithmetic
Operations.

Flag Register:

It is an 8-bit register that stores either 0 or 1 depending upon which value is stored
in the accumulator. Flag Register contains 8-bit out of which 5-bits are important
and the rest of 3-bits are “don’t Care conditions”. The flag register is a dynamic
register because after each operation to check whether the result is zero, positive or
negative, whether there is any overflow occurred or not, or for comparison of two
8-bit numbers carry flag is checked. So for numerous operations to check the
contents of the accumulator and from that contents if we want to check the
behavior of given result then we can use Flag register to verify and check. So we
can say that the flag register is a status register and it is used to check the
status of the current operation which is being carried out by ALU.
Different Fields of Flag Register:

1. Carry Flag
2. Parity Flag
3. Auxiliary Carry Flag
4. Zero Flag
5. Sign Flag

Accumulator:

Accumulator is used to perform I/O, arithmetic, and logical operations. It is


connected to ALU and the internal data bus. The accumulator is the heart of the
microprocessor because for all arithmetic operations Accumulator’s 8-bit pin will
always there connected with ALU and in most-off times all the operations carried
by different instructions will be stored in the accumulator after operation
performance.

General Purpose Registers:

There are six general-purpose registers. These registers can hold 8-bit values.
These 8-bit registers are B,C,D,E,H,L. These registers work as 16-bit registers
when they work in pairs like B-C, D-E, and H-L. Here registers W and Z are
reserved registers. We can’t use these registers in arithmetic operations. It is
reserved for microprocessors for internal operations like swapping two 16-bit
numbers. We know that to swap two numbers we need a third variable hence here
W-Z register pair works as temporary registers and we can swap two 16-bit
numbers using this pair.

Program Counter :

Program Counter holds the address value of the memory to the next instruction that
is to be executed. It is a 16-bit register.

For Example: Suppose current value of Program Counter : [PC] = 4000H

(It means that next executing instruction is at location 4000H.After


fetching,program Counter(PC) always increments

by +1 for fetching of next instruction.)


Stack Pointer :

It works like a stack. In stack, the content of the register is stored that is later used
in the program. It is a 16-bit special register. The stack pointer is part of memory
but it is part of Stack operations, unlike random memory access. Stack pointer
works in a continuous and contiguous part of the memory. whereas Program
Counter(PC) works in random memory locations. This pointer is very useful in
stack-related operations like PUSH, POP, and nested CALL requests initiated by
Microprocessor. It reserves the address of the most recent stack entry.

Temporary Register:

It is an 8-bit register that holds data values during arithmetic and logical
operations.

Instruction register and decoder:

It is an 8-bit register that holds the instruction code that is being decoded. The
instruction is fetched from the memory.

Timing and control unit:

The timing and control unit comes under the CPU section, and it controls the flow
of data from the CPU to other devices. It is also used to control the operations
performed by the microprocessor and the devices connected to it. There are certain
timing and control signals like Control signals, DMA Signals, RESET signals and
Status signals.

Interrupt control:

Whenever a microprocessor is executing the main program and if suddenly an


interrupt occurs, the microprocessor shifts the control from the main program to
process the incoming request. After the request is completed, the control goes back
to the main program. There are 5 interrupt signals in 8085 microprocessors: INTR,
TRAP, RST 7.5, RST 6.5, and RST 5.5.

Priorities of Interrupts: TRAP > RST 7.5 > RST 6.5 > RST 5.5 > INTR

Address bus and data bus:

The data bus is bidirectional and carries the data which is to be stored. The address
bus is unidirectional and carries the location where data is to be stored.
Serial Input/output control:

It controls the serial data communication by using Serial input data and Serial
output data.

Different Classes of CPU Registers


In Computer Architecture, the Registers are very fast computer memory that is used to execute
programs and operations efficiently. This is done by giving access to commonly used values, i.e.,
the values that are at the point of operation/execution at that time. So, for this purpose, there are
several different classes of CPU registers that work in coordination with the computer memory to
run operations efficiently.
The sole purpose of having a register is fast retrieval of data for processing by CPU. Though
accessing instructions from RAM is comparatively faster with a hard drive, it still isn’t enough
for the CPU. For even better processing, there are memories in the CPU that can get data from
RAM which are about to be executed beforehand. After registers, we have cache memory, which
is faster but less fast than registers.

m
CPU registers are essential for the execution of instructions, and understanding the different
types, such as general-purpose, segment, and special-purpose registers, is crucial for studying
computer architecture.

Different Types Of CPU Registers


There are several types of registers available in the CPU for different purposes let’s discuss each
one by one:
 Accumulator : This is the most frequently used register used to store data taken from
memory. It is indifferent numbers in different microprocessors.
 Memory Address Registers (MAR) : It holds the address of the location to be accessed
from memory. MAR and MDR (Memory Data Register) together facilitate the
communication of the CPU and the main memory.
 Memory Data Registers (MDR) : It contains data to be written into or to be read out from
the addressed location.
 General Purpose Registers : These are numbered as R0, R1, R2….Rn-1, and used to store
temporary data during any ongoing operation. Its content can be accessed by assembly
programming. Modern CPU architectures tend to use more GPR so that register-to-register
addressing can be used more, which is comparatively faster than other addressing modes .
 Program Counter (PC) : Program Counter (PC) is used to keep the track of the execution of
the program. It contains the memory address of the next instruction to be fetched. PC points
to the address of the next instruction to be fetched from the main memory when the previous
instruction has been successfully completed. Program Counter (PC) also functions to count
the number of instructions. The incrementation of PCs depends on the type of architecture
being used. If we are using a 32-bit architecture, the PC gets incremented by 4 every time to
fetch the next instruction.
 Instruction Register (IR): The IR holds the instruction which is just about to be executed.
The instruction from the PC is fetched and stored in IR. As soon as the instruction is placed
in IR, the CPU starts executing the instruction, and the PC points to the next instruction to be
executed.
 Stack Pointer (SP): The stack PCs pointer points to the top of the stack, which is a part of
the memory used to store function calls and other operations.
 Flag Register: A flag register , also known as a status register or condition code register, is a
special type of register in a computer’s central processing unit (CPU) used to indicate the
status of the CPU or the outcome of various operations such as Zero Flag, Carry flag, Sign
Flag, Overflow Flag, Parity Flag, Auxiliary Carry Flag, and Interrupt Enable Flag.
 Condition code register ( CCR ): Condition code registers contain different flags that
indicate the status of any operation. For instance, let’s suppose an operation caused the
creation of a negative result or zero, then these flags are set high accordingly. and the flags
are
1. Carry C: Set to 1 if an add operation produces a carry or a subtract operation produces a
borrow; otherwise cleared to 0.
2. Overflow V: Useful only during operations on signed integers.
3. Zero Z: Set to 1 if the result is 0, otherwise cleared to 0.
4. Negate N: Meaningful only in signed number operations. Set to 1 if a negative result is
produced.
5. Extend X: Functions as a carry for multiple precision arithmetic operations.
These are generally decided by ALU.
So, these are the different registers that are operating for a specific purpose.
Size of CPU Register
The number and size of the register in the CPU depend on the processor design and can have an
important impact on its performance and capabilities on the CPU. Now, let’s discuss the different
sizes of the register available in the CPU:
 8-bit registers: These can store 8 bits of data, which is the same as 1 byte. They are used for
simple arithmetic and data manipulation.
 16-bit registers: These hold 16 bits of data, or 2 bytes. These registers are found in older
processors or certain systems that need 16-bit operations.
 32-bit registers: These can store 32 bits of data or 4 bytes. They are common in many
processors and can handle larger data sizes and more complex calculations than 8-bit or 16-
bit registers.
 64-bit registers: These hold 64 bits of data, or 8 bytes. Modern processors often use these,
providing more computational power and better memory-addressing capabilities.
Most modern computers use 32-bit or 64-bit registers, and that’s why we call them 32-bit or 64-
bit processors. This terminology refers to the width of the processor’s registers and how much
data it can handle at once.
In some specialized processors, you might see even larger registers like 128-bit or 256-bit. These
are used for specific tasks such as vector processing or cryptography where dealing with large
data sets and parallel processing is important.
Purpose of Registers
Registers play a very important role in computers, and they are used by CPU for various
purposes.
 Storing Instruction: Registers are used to store the instruction from programs before the
CPU follows them. This helps the computer quickly find and follow the steps it needs to take.
 Holding Answer: When the computer does math calculations or other tasks, the register
stores the temporary answer.
 Quick Access to Important Stuff: Registers are like the computer’s quick-access shelves.
They keep important things nearby, so the computer can grab them fast without going far
away to get them. It’s like keeping your favorite tools on a shelf right next to you, instead of
in a faraway closet.
So, registers are like the computer’s quick-access memory, helping it work faster and smarter.

Here are some types of registers in computer architecture:

 Accumulator register (AC): A general-purpose register


 Address register (AR): Stores the memory address from which data is fetched to the CPU
registers
 Data register (DR): A type of register
 Instruction register (IR): Fetches instructions from the program counter (PC) and holds each
instruction as it is executed by the processor
 Input register (INPR): A type of register
 Program counter (PC): Also called the instruction pointer
 Temporary register (TR): A type of register
 Output register (OUTR): A type of register
 Memory address register (MAR): Stores the memory address from which data is fetched to the
CPU registers
 Memory buffer register (MBR): An internal register
 Memory data register (MDR): An internal register
 Status register: Holds truth values to determine if an instruction should be executed
 Floating-point register (FPR): Stores floating-point numbers
 Constant register: Holds read-only values such as zero, one, or pi
 Vector register: Holds data for vector processing
 Special-purpose register (SPR): Holds some elements of the program state, such as the program
counter and status register
 Model-specific register: Stores data and settings related to the processor itself
Registers are temporary storage areas for instructions or data that are used immediately by the
CPU.

You might also like