unit 4-1
unit 4-1
Data flow computing is a software paradigm that uses data flow graphs to represent
computations. Data flow graphs are graph models that show how data moves through a program
and how operations are performed on that data. Data flow architecture is an alternative to the von
Neumann architecture, and it can be static or dynamic:
Definition A software paradigm that uses data flow A graphical model that shows how
graphs to represent computations data moves between parts of a
computer program
Components Nodes represent operations, and edges Nodes represent operations, and arcs
represent data dependencies represent channels for data objects to
move between actors
Benefits Promotes high-level functional Can be used to determine feasible
specifications and simplifies formal reorderings of operations to reduce
reasoning about system components pipeline or cache conflicts
An efficient data flow system requires data consistency, latency, error handling, and
synchronization. As such, these are the most common technologies needed to manage and
implement data flow:
Batch processing frameworks process and analyze a set of data that has been stored over a period
of time.
Stream processing platforms continuously capture, store, and process data streams.
Event-driven architectures permit systems to detect, process, manage, and react to real-time
events.
Data pipelines move data from one location to another.
Proper data flow design is key in optimizing data processing efficiency, reducing bottlenecks,
and ensuring the reliable delivery of information within complex computing environments.
External entities
Illustrate entities that exist outside of the system that act as the source and or destination of data
as rectangles.
Processes
These are represented in the figure by circles or ovals to indicate the processing or changed form
of data within the system.
Data stores
These are illustrated as open-ended rectangles and are the locations where information is stored
for later use.
Data flows
Lines connecting data entities indicating data flow from one entity to the next from an entity to a
process or from a process to an entity.
Levels of DFDs
There are two different levels of DFDs, each providing varying degrees of detail:
Level 0 DFD (Context Diagram): These diagrams provide a big picture at once, presenting the
system as a single process with interconnections with other systems and objects that is also
oriented more to the data conversion rather than the inner process description.
Level 1 DFD: These divide the single process in Level 0 into sub-processes and consequently
describes the flow of data within the system in detail.
Here are five benefits of implementing efficient data flow within a system:
Optimized processing
Properly structured data flow enables the efficient movement of data through various processing
stages. This optimization reduces unnecessary data transfers, transformations, and computations,
resulting in faster and more streamlined data processing.
Resource utilization
Data flow facilitates resource allocation by ensuring that processing resources are utilized
effectively. It prevents resource overload by distributing data processing tasks based on the
available capacity, thus maximizing system performance and minimizing latency.
Scalability
Well-designed data flow architectures can scale horizontally or vertically to accommodate
increasing data volumes and processing demands. This scalability ensures that systems can
handle growing workloads without sacrificing performance or responsiveness.
Real-time insights
Data flow mechanisms can support real-time processing and analysis, enabling organizations to
gain immediate insights from incoming data. This is especially critical in scenarios like IoT
applications, financial trading platforms, and monitoring systems, where real-time decision-
making is essential.
Complexity in scaling
While data flow architectures can be designed to scale, managing the scaling process itself can
be complex. Handling load distribution, resource allocation, and maintaining consistent
performance across scaling instances requires careful planning.
Nodes: Represent functions or predicates that are applied to data objects. Nodes are also known
as actors.
Arcs: Represent data dependencies between functions and the channels through which data
objects move. Arcs contain data values or tokens.
Data flow: Shows the processing sequence, parallelism, and data dependence.
DFGs can be used to: Model straight-line code, Model complete programs, Optimize
performance, and Optimize for power consumption.
Nodes fire only when a single token is present on every input to the node.
If at least one input is missing a token, the node is blocked.
The output of the nodes (edges) is implemented as FIFO buffers
Data-Flow Graphs
A data-flow graph (DFG) is a graph which represents a data dependancies between a number of
operations. Any algorithm consists of a number of ordered operations. Since examples are
always better than words, consider the procedure for finding the root of a quadratic equation
(algorithm assumes real roots):
quad( a, b, c)
t1 = a*c;
t2 = 4*t1;
t3 = b*b;
t4 = t3 - t2;
t5 = sqrt( t4);
t6 = -b;
t7 = t6 - t5;
t8 = t7 + t5;
t9 = 2*a;
r1 = t7/t9;
r2 = t8/t9;
One could implement this algorithm line by line, but a more general realization would note the
dependancies between each operation. For example t2 can not be computed before t1, but t3
could be computed before t1 or t2.
Here are some differences between 8-bit and 16-bit Intel microprocessors:
Data bus
An 8-bit microprocessor has an 8-bit data bus, while a 16-bit microprocessor has a 16-bit data
bus.
Address bus
An 8-bit microprocessor has a 16-bit address bus, while a 16-bit microprocessor has a 20-bit
address bus.
Memory capacity
An 8-bit microprocessor can access up to 64 kilobytes of memory, while a 16-bit
microprocessor can access up to 1 megabyte of memory.
Data processing
An 8-bit microprocessor can process 8 bits of data in a single cycle, while a 16-bit
microprocessor can process 16 bits of data in a single cycle.
Here are some other details about Intel microprocessors:
Flag Register:
It is an 8-bit register that stores either 0 or 1 depending upon which value is stored
in the accumulator. Flag Register contains 8-bit out of which 5-bits are important
and the rest of 3-bits are “don’t Care conditions”. The flag register is a dynamic
register because after each operation to check whether the result is zero, positive or
negative, whether there is any overflow occurred or not, or for comparison of two
8-bit numbers carry flag is checked. So for numerous operations to check the
contents of the accumulator and from that contents if we want to check the
behavior of given result then we can use Flag register to verify and check. So we
can say that the flag register is a status register and it is used to check the
status of the current operation which is being carried out by ALU.
Different Fields of Flag Register:
1. Carry Flag
2. Parity Flag
3. Auxiliary Carry Flag
4. Zero Flag
5. Sign Flag
Accumulator:
There are six general-purpose registers. These registers can hold 8-bit values.
These 8-bit registers are B,C,D,E,H,L. These registers work as 16-bit registers
when they work in pairs like B-C, D-E, and H-L. Here registers W and Z are
reserved registers. We can’t use these registers in arithmetic operations. It is
reserved for microprocessors for internal operations like swapping two 16-bit
numbers. We know that to swap two numbers we need a third variable hence here
W-Z register pair works as temporary registers and we can swap two 16-bit
numbers using this pair.
Program Counter :
Program Counter holds the address value of the memory to the next instruction that
is to be executed. It is a 16-bit register.
It works like a stack. In stack, the content of the register is stored that is later used
in the program. It is a 16-bit special register. The stack pointer is part of memory
but it is part of Stack operations, unlike random memory access. Stack pointer
works in a continuous and contiguous part of the memory. whereas Program
Counter(PC) works in random memory locations. This pointer is very useful in
stack-related operations like PUSH, POP, and nested CALL requests initiated by
Microprocessor. It reserves the address of the most recent stack entry.
Temporary Register:
It is an 8-bit register that holds data values during arithmetic and logical
operations.
It is an 8-bit register that holds the instruction code that is being decoded. The
instruction is fetched from the memory.
The timing and control unit comes under the CPU section, and it controls the flow
of data from the CPU to other devices. It is also used to control the operations
performed by the microprocessor and the devices connected to it. There are certain
timing and control signals like Control signals, DMA Signals, RESET signals and
Status signals.
Interrupt control:
Priorities of Interrupts: TRAP > RST 7.5 > RST 6.5 > RST 5.5 > INTR
The data bus is bidirectional and carries the data which is to be stored. The address
bus is unidirectional and carries the location where data is to be stored.
Serial Input/output control:
It controls the serial data communication by using Serial input data and Serial
output data.
m
CPU registers are essential for the execution of instructions, and understanding the different
types, such as general-purpose, segment, and special-purpose registers, is crucial for studying
computer architecture.