modif
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UNIT 5
COURSE B.TECH
SEMESTER 4-1
PREPARED BY
(Faculty Name/s) B Chandrakala
Assistant Professor
VERSION 1.0
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TABLE OF CONTENTS – UNIT 2
SNO CONTENTS PAGE
1 COURSE OBJECTIVES 1
2 PREREQUISITES 1
3 SYLLABUS 1
4 COURSE OUTCOMES 1
5 CO - PO/PSO MAPPING 1
6 LESSON PLAN 2
7 ACTIVITY BASED LEARNING 2
8 LECTURE NOTES 3
8.1 Introduction 3
8.2 Color Models 3
8.2.1 RGB color model 4
8.2.2 HSI color model 4
8.2.3 YUV color model 4
8.3 Color Transformations 4
8.3.1 Formulation 4
8.3.2 Color complements 5
8.3.3 Color Slicing 5
8.3.4 Tone and Color Corrections 5
8.3.5 Smoothing and Sharpening 5
8.3.6 Color Segmentation 6
9 PRACTICE QUIZ 43
10 ASSIGNMENTS 44
11 PART A QUESTIONS & ANSWERS (2 MARKS QUESTIONS) 44
12 PART B QUESTIONS 46
13 SUPPORTIVE ONLINE CERTIFICATION COURSES 46
14 REAL TIME APPLICATIONS 46
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1. COURSE OBJECTIVES
The objectives of this course is to
To introduce fundamentals of Image Processing.
To teach various color models and to introduce the concepts of color image
segmentation.
2. PREREQUISITES
Students should have knowledge on
1. Preliminary Mathematics
2. Principals of Signals and systems
1. SYLLABUS
UNIT V :
Color Image Processing-color models- RGB, YUV,HIS; Color transformations-
formulation, color complements, color slicing, tone and color corrections; Color
image smoothing and sharpening; Color Segmentation.
2. COURSE OUTCOMES
1. Analyze various types of images mathematically.
2. Compare image enhancement methods in spatial and frequency domains.
3. Demonstrate various segmentation algorithms for given image.
4. Justify DCT and wavelet transform techniques for image compression.
5. Describe various color models for color image processing.
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4. LESSON PLAN
LECTU WEE REFEREN
TOPICS TO BE COVERED
RE K CES
1. Instruction set of 8086 MicroProcessor T1,T2,R2
2. Assemble Directives of 8086 processor T1,T2,R2
1
3. Simple Example of Assembler Directives T1,T2,R2
4. 8086 Procedures and it different types T1,T2,R2
5. Simple Programs on Procedures T1,T2,R2
6. weekly test conducting T1,T2,R2
2
7. Introduction to Macros of 8086 T1,T2,R2
8. simple Programs on Macros T1,T2,R2
9. Introduction to Assembly Language Programming T1,T2,R2
10. Arithmetic and Logical expressions using ALP T1,T2,R2
3
11. Branch and Call Instructions using ALP T1,T2,R2
String Manipulation and Sorting evaluation programs
12. T1,T2,R2
using ALP
13. Simple programs on all syntax and Instruction set T1,T2,R2
4
14. slip Test on ALP T1,T2,R2
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8. LECTURE NOTES
MACHINE LANGUAGE
Machine language is the lowest level programming language. In this
language, every instruction is described by binary patterns. This is the form
in which instructions are stored in memory. This is the only form that the
microprocessor understands.
ASSEMBLY LANGUAGE
In this language, the binary patterns are assigned mnemonics (short
abbreviated names). There is usually one assembly language instruction for
each machine language instruction.
Assemblers are software programs that convert assembly language into
machine language.
HIGH LEVEL LANGUAGES
These are languages like C, PASCAL and FORTRON. These are more natural
for humans to use than assembly or machine languages. They are also more
compact (i.e. it takes less statement to write the program).One high level
instruction translates into many assembly or machine language instructions.
Compilers are software programs that convert high level language into
machine language.
ULTRA HIGH LEVEL LANGUAGES
These include C++, and JAVA. Here a single instruction may translate into
hundreds of assembly or machine language instructions.
Addressing modes describe the types of operands and the way they are
accessed for executing an instruction.
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2.2.1 IMMEDIATE ADDRESSING MODE
In these types of addressing, immediate data is a part of instruction, and
appears in the form of successive byte or bytes.
Example: MOV CX, 0005H.
In the above example, 0005H is the immediate data. The immediate data
may be 8-bit or 16-bit in size.
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registers BX, BP, SI and DI in the default (either DS or ES) segment. The
example given below explains this mode.
Example: MOV AL,[BX+50H].
Here, the effective address is given as 10H*DS+50H+[BX].
2.4.1 MOV
Move this instruction transfers data from one register/memory location to
another register/ memory location. The source may be any one of the
segment registers or other general or special purpose registers or a
memory location or immediate number and another register or memory
location may act as destination. Both source and destination operands
cannot be memory.
Example:
MOV AX, 5000H; Immediate
MOV AX, BX; Register
MOV AX, [SI]; Indirect
MOV AX, [2000H]; Direct
MOV AX, 50H [BX]; Based relative, 50H Displacement
2.4.2 PUSH
Push to stack this instruction pushes the contents of the specified register/
memory location on to the stack. The stack pointer is decremented by 2,
after each execution of the instruction. The higher byte is pushed first and
then the lower byte.
Example:
1. PUSH AX
2. PUSH DS
3. PUSH [5000H] ; Content of location 5000H and 5001H in DS are pushed
onto the stack.
2.4.3. PUSHF
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Push Flags to Stack The push flag instruction pushes the flag register on to
the stack; first the upper byte and then the lower byte will be pushed on to
the stack. The SP is decremented by 2, for each push operation.
2.4.4. POP
Pop from Stack This instruction when executed, loads the specified register/
memory location with the contents of the memory location of which the
address is formed using the current stack segment and stack pointer as
usual. The stack pointer is incremented by 2.
Example
1. POP AX
2. POP DS
3. POP [5000H]
2.4.5. POPF
Pop Flags from Stack The pop flags instruction loads the flag register
completely (both bytes) from the word contents of the memory location
currently addressed by SP and SS. The SP is incremented by 2 for each pop
operation.
2.4.6. XCHG
Exchange This instruction exchanges the contents of the specified source
and destination operands, which may be registers or one of them, may be a
memory location.
Example
XCHG [5000H], AX ;
XCHG BX,AX ;
2.4.7. IN
Input the port This IN instruction will copy data from a port to the AL or AX
register.
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For the Fixed port IN instruction, the 8 – bit port address of a port is
specified directly in the instruction.
Example:
IN AL, 0C8H ;
Input a byte from port 0C8H to AL
IN AX, 34H ;
Input a word from port 34H to AX
For a variable port IN instruction, the port address is loaded in DX register
before IN instruction.
Port address can range from 0000H – FFFFH.
Example:
MOV DX, 0FF78H ;
Initialize DX point to port
IN AL, DX ;
Input a byte from a 8 bit port 0FF78H to AL
IN AX, DX ;
Input a word from 16 bit port to 0FF78H to AX.
2.4.8. OUT
Output to the Port This instruction is used for writing to an output port.
Contents of AX or AL are transferred to a port after execution of this
instruction.
Example
For the Fixed port OUT instruction, the 8 – bit port address of a port is
specified directly in the instruction.
OUT 0C8H, AL ;
Sends a byte from AL to port 0C8H OUT 34H, AX ; Output a word from AX to
port 34H
For a variable port OUT instruction, the port address is loaded in DX
register before OUT instruction. Port address can range from 0000H –
FFFFH.
Example:
MOV DX, 0FF78H ;
Initialize DX point to port
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OUT DX, AL ;
Output a byte from AL to a 8 bit port 0FF78H OUT DX, AX ; Output a word
from AX to 16 bit port 0FF78H
2.4.9. XLAT
Translate Replaces the byte in AL from a user table addressed by BX.
AL ← [AL+BX]
2.4.10. LEA
Load Effective Address The load effective address instruction loads the
offset of an operand in the specified register.
For example, the instruction
LEA BX, ADR loads the offset of the label ADR in BX
2.4.11. LDS/LES
Load Pointer to DS/ES The instruction, Load DS/ES with pointer, loads the
DS or ES register and the specified destination register in the instruction
with the content of memory location specified as source in the instruction.
2.4.12. LDS
LDS BX, [1100] loads the content of offset address 1100 &1101 in BX and
1102 &1103 in DS.
2.4.13. LAHF
Load AH from Lower Byte of Flag This instruction loads the AH register with
the lower byte of the flag register. This instruction the source string is
10H*DS+[SI], while the starting address of the destination string is
10H*ES+[DI]. may be used to observe the status of all the condition code
flags (except over flow) at a time.
2.4.14. SAHF
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Store AH to Lower Byte of Flag Register This instruction sets or resets the
condition code flags (except overflow) in the lower byte of the flag register
depending upon the corresponding bit positions in AH.
2.4.15. REP
Repeat Instruction Prefix the instruction to which the REP prefix is provided,
is executed repeatedly until the CX register becomes zero (at each iteration
CX is automatically decremented by one). There are two more options of
the REP instruction.
The first is REPE/REPZ, i.e. repeat operation while equal/zero.
The second is REPNE/REPNZ allows for repeating the operation while not
equal/not zero.
These options are used for CMPS, SCAS instructions only, as instruction
prefixes.
2.4.16. MOVSB/MOVSW
Move String Byte or String Word
The MOVSB/MOVSW instruction moves a string of bytes/ words pointed to
by DS: SI pair (source) to the memory location pointed to by ES: DI pair
(destination).
SI and DI are incremented when the direction flag is clear and decremented
when the direction flag is set.
The REP instruction prefix is used with MOVS instruction to repeat it by a
value given in the counter (CX).
2.4.17. LODSB/LODSW
Load String Byte or String Word
The LODS instruction loads the AL/AX register by the content of a string
pointed to by DS:SI register pair.
The SI is incremented when the direction flag is clear and decremented
when the direction flag is set. Use with REP instruction prefix.
2.4.18. STOSB/STOSW
Store String Byte or String Word The STOS instruction stores the AL/AX
register contents to a location in the string pointed by ES : DI register pair.
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The DI is incremented when the direction flag is clear and decremented
when the direction flag is set. Used with REP instruction prefix.
2.5.1 ADD
Add this instruction adds an immediate data or contents of a memory
location or a register (source) to the contents of another register
(destination) or memory location. The result is in the destination operand.
However, both the source and destination operands cannot be memory
operands. Examples
ADD AX, 0100H Immediate
ADD AX, BX Register
ADD AX, [SI] Register indirect
ADD AX, [5000H] Direct
ADD [5000H], 0100H Immediate
2.5.2 ADC
Add with Carry This instruction adds an immediate data or contents of a
memory location or a register (source) to the contents of another register
(destination) or memory location and carry flag. The result is in the
destination operand.
Example
ADC AX, 0100H Immediate
ADC AX ,BX Register
ADC AX, [SI] Register indirect
ADC AX, [5000H] Direct
ADC [5000H], 0100HImmediate
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These instructions increment the contents of the specified register or
memory location by 1. All the condition code flags are affected except the
carry flag CF.
Example
INC AX Register
INC [BX] Register indirect
INC [5000H] Direct
2.5.4 DEC-DECREMENT
The decrement instruction subtracts 1 from the contents of the specified
register of memory location. All the condition code flags except carry flag
are affected.
Example
DEC AX Register
DEC [5000H] Direct
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SBB AX, BX Register
SBB AX, [5000H] Direct
SBB [5000H], 0100H Immediate
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Let AX contain 0508 unpacked BCD for 58 decimal. The result of AAD
execution will give the hexadecimal number 3A in AL ( 58D =3AH) and 00
in AH.
Example
AL = 53 CL = 29
ADD AL, CL ; 7C ← 53 + 29
DAA ; AL =82 7C + 06 (as C>9)
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MUL CX ; (DX) (AX)←(AX) x (CX)
MUL WORD PTR [SI] ; (DX) (AX)←(AX) x ([SI])
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2.6 LOGICAL INSTRUCTIONS
These type of instructions are used for carrying out the bit by bit shift,
rotate, or basic logical operations. All the condition code flags are affected
upon the result.
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OR [5000H],0008H
If the contents of AX are 3F0FH, then the first example instruction will be
carried out as given below. Thus the result 3F9FH will be stored in the AX
register
0 0 1 1 1 1 1 1 0 0 0 0 1 1 1 1 = 3F0F H [AX]OR
0 0 0 0 0 0 0 0 1 0 0 1 1 0 0 1 = 0098 H
0 0 1 1 1 1 1 1 1 0 0 1 1 1 1 1 = 3F9F H [AX] =Result
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2.6.5 NOT: LOGICAL INVERT
The NOT instruction complements (inverts) the contents of an operand
register or a memory location, bit by bit.
Example
NOT AX
NOT [5000 H]
If the content of AX is 200FH, the first example instruction will be
executed as shown. The result DFF0H will be stored in the destination
register AX.
AX = 0010 0 0 0 0 0000 1111
invert
AX
1 1 0 1 1 1 1 1 11 1 1 0 0 0
0
location .
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zero in the shifted position. The count is either 1 or specified by register
CL. The operand may reside in a register or a memory location.
2.6.10ROR DESTINATION,COUNT
Rotate Right without Carry This instruction rotates the contents of the
destination operand to the right (bit-wise) either by one or by the count
specified in CL, excluding carry. The least significant bit is pushed into the
carry flag and simultaneously it is transferred into the most significant bit
position at each operation. The remaining bits are shifted right by the
specified position.
2.6.11ROL DESTINATION,COUNT
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Rotate Left without Carry This instruction rotates the content of the
destination operand to the left by the specified count (bit-wise) excluding
carry. The
most significant bit is pushed into the carry flag as well as the least
significant bit position at each operation. The remaining bits are shifted
left subsequently by the specified count positions.
2.6.12RCR DESTINATION,COUNT
Rotate Right through Carry This instruction rotates the contents (bit-wise)
of the destination operand right by the specified count through carry flag
(CF). For each operation, the carry flag is pushed into the MSB of the
operand, and the LSB is pushed into carry flag. The remaining bits are
shifted right by the specified count positions.
2.6.13RCL DESTINATION,COUNT
Rotate Left through Carry This instruction rotates (bit-wise) the contents
of the destination operand left by the specified count through the carry
flags (CF). For each operation, the carry flag is pushed into LSB, and the
MSB of the operand is pushed into carry flag. The remaining bits are
shifted left by the specified positions. The SF, PF, ZF are left unchanged.
The operand may be a register or a memory location. The count for
rotation or shifting is either 1 or is specified using register CL, in case of
all the shift and rotate instructions.
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2.7 CONTROL TRANSFER OR BRANCHING INSTRUCTION
The control transfer instructions transfer the flow of execution of the
program to a new address specified in the instructions directly or indirectly.
Unconditional Control Transfer (Branch) Instruction In these
instructions, the execution control is transferred to the specified
location independent of any status or conditions. The CS and IP are
unconditionally modified to the new CS and IP.
Conditional Control Transfer (Branch) Instructions In these
instructions, the control is transferred to the specified location
provided the result of the previous operation satisfies a particular
condition, otherwise, the execution continues in normal flow sequence.
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Loop through a sequence of instructions from ‘Label’ while ZF=0 and
CX ≠ 0.
2.7.10MISCELLANEOUS INSTRUCTIONS:
CLC - Clear carry flag
CMC - Complement carry flag
STC - Set carry flag
CLD- Clear direction flag
STD - Set direction flag
CLI - Clear interrupt flag
STI - Set interrupt flag
2.7.11 WAIT
The processor goes on inserting WAIT states in the instruction cycle,
till the TEST pin goes low. Once the TEST pin goes low, it continues
further execution.
2.7.12 HLT
Halt the processor until RESET line is activated.
2.7.13 NOP
No operation. The processor does not perform any operation till 4 clock
cycles, except incrementing the IP by one
2.7.14 ESC
Escape to external device like NDP (numeric co-processor)
2.7.15 LOCK
This instruction is a prefix that causes the CPU assert bus lock signal
during the execution of the next instruction.
2.7.16 FALC
Fills AL with carry. If CF=0, AL =00H. If CF=1,AL=FFH
DW: Define Word The DW directive serves the same purposes as the
DB directive, but it now makes the assembler reserve the number of
memory word (16-bit) instead of bytes. Some example are given to
explain this directive.
Example WORDS DW 1234H, 78ABH, 045CH,
This makes the assembler reserve four words in memory (8bytes), and
initialize the word with the specified values in the statement, During
initialsation, the lower bytes are stored at the lower memory
addresses, while the upper bytes are stored at the higher addresses.
Another option of the DW directive is explained with the DUP operator.
WDATA DW 5 DUP (6666H)
This statement reserves five words, i.e. 10-bytes of memory for a word
lable WDATA and initialises all the word locations with 6666H.
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ENDS: END of Segment This directive marks the end of a logical
segment. The logical segments are assigned with the names using the
ASSUME directive. The names appear with the ENDS directive as
prefixes to mark the end of those particular segments.
DATA SEGMENT:
DATA ENDS
ASSUMECS : CODE,
DS : DATA CODE SEGMENT
:
CODE ENDS END
EQU: Equate The directive EQU is used to assign a label with a value
or a symbol. The use of this directive is just to reduce the recurrence
of the numerical values or constants in a program code. The recurring
value is assigned with a label, and that label is used in place of that
numerical value, throughout the program.
Example
LABEL EQU 0500H
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ADDITION EQU ADD
The first statement assigns the constant 500H with the label LABEL,
while the second statement assigns another label ADDITION with
mnemonic ADD.
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replaces the string ‘OFFSET LABEL’ by the computed
displacementExample
CODE SEGMENT MOV SI, OFFSET LIST CODE ENDS
DATA SEGMENT LIST DB 10H DATA ENDS
ORG: Origin The ORG directive directs the assembler to start the
memory allotment for the particular segment, block or code from the
declared address in the ORG statement. While starting the assembly
process for a module, the assembler initialises a location counter to
keep track of the allotted addresses for the module. If ORG statement
is not written in the program, the location counter is initialised to 0000.
If the ORG 200H statement is present at the starting of the code
segment of that module, then the code will start from 200H address in
code segment
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MOV AL, BYTE PTR [SI] - Moves content of memory location addressed
by SI (8-bit) to AL INC BYTE PTR [BX] - Increments byte contents of
memory location addressed by BX
SHORT The SHORT operator indicates to the assemble that only one
byte is required to code the displacement for a jump (i.e. displacement
is within –128 to + 127 bytes from the address of the byte next to the
jump opcode). This method of specified the jump address saves the
memory. Otherwise, the assembler may reserve two bytes for the
displacement. The syntax of the statement is as given below. JMP
SHORT LABEL
TYPE The TYPE operator directs the assembler to decide the data type
of the specified label and replaces the ”TYPE label’ by the decided data
type. For the word type variable, the data type is 2, for double word
type, it is 4, and for byte type, it is 1. Suppose, the STRING is a word
array. The instruction MOV AX, TYPE STRING moves the value 0002H in
AX.
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GLOBAL The labels, variable, constants or procedures declared
GLOBAL may be used by other modules of the program. Once a
variable is declared GLOBAL, it can be used by any module in the
program. The following statement declares the procedure ROUTINE as
a global label.
ROUTINE PROC GLOBAL
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procedure also must be declared for the Assembler to generate correct
code.
File 2: PROG2.ASM
.MODEL SMALL
.DATA
EXTRN BUF1:BYTE EXTRN BUF2:WORD
.CODE
EXTRN RDKEY:FAR
.STARTUP
MOV DX, OFFSET BUF1 MOV CX, 10
L1: CALL RDKEY STOSB
LOOP L1
MOV BUF2, AX
.EXIT END
. We now have 2 Files: PROG1.ASM and PROG2.ASM
. These can be assembled and Linked by the following command
ML PROG1.ASM PROG2.ASM
Now assemble the two programs separately, getting the two .OBJ files.
MASM PROG1; MASM PROG2;
Run LINK utility and specify the two .OBJ files as inputs.
LINK PROG1.OBJ PROG2.OBJ
2.11 LIBRARIES
. Frequently used procedures for a given application domain may be
placed in a .Library File. as .OBJ files.
. The Library file can be specified at LINK time.
Modular Programming in 8086
. Only the required .OBJ files are extracted from the Library File and
linked to the program.
. Thus, Libraries provide a powerful reuse mechanism.
LIB Command:
The LIB command provides the following facilities:
. Create a new Library file
. Add .OBJ file to a Library file.
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. Delete .OBJ file from a Library file.
. Replace an existing .OBJ file in the Library with another .OBJ file with
the same name (equivalent to Delete followed by Add)
. The LIB command is used as follows:
LIB library file name
If the named Library file does not exist, the system prompts whether
to create? Type Y
It prompts for operation (operation could be specified on command
line also). The Operation can be: + (add) ; - (remove) ; -+ (replace)
Example:
Create a Library file called MYP1.LIB and add the module PROG1 to the
library:
> LIB MYP1.LIB
; some messages are displayed Library file does not exist. Create? Y
Operations: + PROG1
List File: MYP1
To the Library file called MYP1.LIB, add the module PROG2:
> LIB MYP1.LIB
; some messages are displayed
Operations: +PROG2
>
To the Library file called MYP1.LIB add the module PROG3:
>LIB MYP1.LIB
; some messages are displayed
Operations: +PROG3
>
Alternatively, the 3 modules could be added to the Library file as
shown below:
>LIB MYP1.LIB
; some messages are displayed from the utility Library file does not
exist. Create? Y Operations: PROG1 + PROG2 + PROG3
List File: MYP1
>
From the Library file called MYP1.LIB, remove the module PROG2:
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> LIB MYIO1.LIB
Copyright messages etc from the utility
Operations: -PROG2
>
Modular Programming in 8086
. List file shows:
. Sizes and names of the files in the Library
. Public labels available in the Library
. Once we create Library files, we can use them to link the required
modules into the application program by specifying the Library files to
the Linker. With ML or with LINK, specify the Library files required in
response to the prompt
Libraries [.lib]:
. Library files have .lib as the default extension.
2.12 PROCEDURES
. Procedure or a subroutine or a function is a key concept for
modular programming, the essential way to conquer complexity.
. A procedure is a reusable set of instructions that has a name.
. Only one copy of the procedure is stored in the memory; and it can
be .called. as many times as needed.
. As only one copy is stored, it saves memory; but has execution time
overhead for the
.call. and .return. operations.
. Macros are faster but consume more space.
. .CALL. transfers control to the procedure like with a jump; but unlike
a jump, procedure has a .RETURN. instruction which returns control to
the instruction following the CALL instruction! In order to implement
such a return, the necessary information is stored on a stack, before
transferring control to the procedure. . Further, nested procedures
calls are possible. In other words, Procedure A can call Procedure B
which in turn calls Procedure C. After completing Procedure C, control
returns to Procedure B and after completing Procedure B, control
returns to Procedure
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A. Logically, such a nesting of calls can be to any level, though in
practice Assemblers impose implementation-dependent limits on the
nesting depth.
. It is also possible for a Procedure to call itself (a recursive procedure).
Of course, to avoid infinite regress, the procedure would have an
alternative that would not involve recursion. Examples of recursive
procedures are described in later sessions.
. We see that return addresses are known in one order and are used
for implementing
.return. in exactly the reverse order. Thus a Stack would be the most
convenient data structure for storing return addresses
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. As with JMP, 16-Bit register may be used as the operand for the CALL
instruction. (Indirect CALL)
. Again, as with JMP, contents of the register are transferred directly
into IP (not relative displacement).
. This is always a Near CALL.
. Example: Assume BX = 0080H. Now the execution of the instruction:
CALL BX ; calls the procedure at 0080H in the current code segment
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. In ALP, RET is written within the procedure, before the ENDP directive
and the Assembler will automatically select the proper (Near or Far)
RET instruction!
. Another form: RET immediate value
Example: RET 6
In this case, after popping return address from the stack, the specified
number (in this case, 6) is added to SP, effectively removing some (in
this case 3) words from the stack! These words could have been
pushed onto stack before calling. This is the scheme followed by
compilers.
2.16 MACRO
Macros provide several powerful mechanisms useful for the
development of generic programs.
Modular Programming in 8086
MACRO is a group of instructions with a name.
When a macro is invoked, the associated set of instructions is inserted
in place into the source, replacing the macro name. This .macro
expansion. is done by a Macro
Preprocessor and it happens before assembly. Thus the actual
Assembler sees the .expanded. source !
We could consider the macro as shorthand for a piece of text.
9. Practice Quiz
1. Find the odd instruction out of these.
(a)AAA (b) AAS (c) AAM (d) AAD
2. In 8086 microprocessor one of the following statements is not
true.
(a)Coprocessor is interfaced in MAX mode
(b)Coprocessor is interfaced in MIN mode
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BTECH_ECE-SEM 32
(c)I/O can be interfaced in MAX/MIN mode
(d)Supports Pipelining
3. What is the length of flag register and how many flags are there in
8086?
(a)16 bits and 9 (b) 8 bits and 9 (c) 16 bits and 8 (d) 16 bits
and 10
4. If there are 20 address lines in a microprocessor, what is the size
of memory that can be interfaced?
(a)64 KB (b) 1 MB(c) 10 MB(d) 2 MB
5. If SP = 4FFFAH, after execution of POP AX instruction SP becomes
(a)4FFFCH (b) 4FFF8H (c) 4FFECH (d) 4FFE8H
6. If Direction flag = 0, on executing MOVSB instruction the address
of the string will be
(a)Decrementing (b) Incrementing (c) Will not change (d)
None
7. Which segment is used to store interrupt and subroutine return
address?
(a)Code Segment (b) Data segment (c) Extra segment (d)Stack
segment
8. The method of accessing data in Stack and Queue is
(a)LIFO, LILO (b)FIFO, LIFO (c) LIFO, FIFO (d) LILO, FIFO
9. The LOCK prefix instruction, when executed locks ______
(a) the registers (b) the I/O devices(c) the bus (d) the Master
10. A high on HOLD pin indicates
(a)The master processor is holding the Bus
(b)Another master is requesting to take over the system bus
(c)The master is holding the slave bus
(d)All the above
11. If the result is too large positive number or a too small negative
number, which flag is set?
(a)Trap flag (b) Direction flag (c) Overflow flag (d) Auxiliary
Carry flag
12. The instruction IN AL,80H copies
(a)8 bit content from AL to 80H port address
(b)8 bit content from 80H port address to AL
(c)16 bit content from AL to 80H port address
(d)16 bit content from 80H port address to AL
10. Assignments
S.No Question BL CO
Explain with examples the following 8086 instructions
1 2 CO2
a) AAA b) CBW c) IMUL d) INTO
Write an assembly language program for 8086 to sort the CO2
2 2
array of elements in ascending order.
Write an assembly language program for 8086 to find the CO2
3 2
largest element in an array.
Write an assembly language program for 8086 to convert BCD CO2
4 2
data to binary data
What is the function of the ASSUME, DB, EQU, EVEN assembler CO2
5 2
directives of 8086?
Explain the assembler directives ASSUME, EQU, DW, and EVEN CO2
6 2
with suitable examples.
Explain data transfer, arithmetic and logical group instructions CO2
7 2
of 8086 microprocessor
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4. WAIT
3 What is the purpose of LEA instruction in 8086?
Load Effective Address (LEA) instruction determines the offset of the
variable or memory location named as the source and loads this
address in the specified 16-bit register. Flags are not affected by
LEA instruction.
Eg: LEA Cx, TOTAL CO
2
2
Or
Load Effective Address (LEA) instruction determines and loads the
offset of the variable or memory location in the specified 16-bit
register. Flags are not affected by LEA instruction.
Eg: LEA Cx, TOTAL
4 List any four program control instructions available in 8086.
12.Part B- Questions
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BTECH_ECE-SEM 32
S.No Question BL CO
1 Write an assembly language program for 8086 to find the
2 CO2
largest element in an array.
2 Write an assembly language program for 8086 to convert
2 CO2
BCD data to binary data
3 What is the function of the ASSUME, DB, EQU, EVEN
2 CO2
assembler directives of 8086?
4 Explain the assembler directives ASSUME, EQU, DW, and
2 CO2
EVEN with suitable examples.
5 Explain data transfer, arithmetic and logical group
2 CO2
instructions of 8086 microprocessor
References:
1. http://processors.wiki.ti.com/index.php/
MSP430_LaunchPad_Low_Power_Mode
2. http://processors.wiki.ti.com/index.php/MSP430_16-Bit_Ultra-
Low_Power_MCU_Training
|MPMC UNIT II
BTECH_ECE-SEM 32