MICRF218

3.3V, 315/433MHz Wide-IF Bandwidth ASK

Receiver

General Description Features

The MICRF218 is a 3.0V to 3.6V, 300MHz to 450MHz • Fully integrated 300MHz to 450MHz ASK/OOK
ASK/OOK super-heterodyne receiver with user receiver
selectable Intermediate Frequency (IF) Bandwidths of • No external IF filter required
550kHz or 1500kHz at 433.92MHz, making it an
• Wide IF-bandwidth filter supports reception of SAW
excellent solution for use with low-cost SAW-based
based and medium-grade (~30ppm) transmitter
transmitters or transmitters which use low-cost, medium-
grade (~30ppm) crystals. The device requires a single, • Sensitivity at 433.92MHz at 1kbps with 0.1% BER
low-cost crystal to select the proper RF frequency, o -108dBm sensitivity with 550kHz IF bandwidth
integrated Automatic Gain Control (AGC), data slicer, o -106dBm sensitivity with 1500kHz IF bandwidth
and programmable baseband filter bandwidths of • Low-supply current
1.6kHz to 13kHz allowing the device to support bit-rates
o 4.0mA at 315MHz
up to 20kbps at 433.92MHz.
o 5.5mA at 433.92MHz
The MICRF218 consumes 4.0mA of supply current at
315MHz and 5.5mA of supply current at 433.92MHz. o 1µA low-power shutdown mode
The device also features a low-power shutdown mode • Data rates to 10kbps (Manchester Encoded) @
where the device consumes 1µA of supply current. The 433.92MHz
device achieves a sensitivity of -108dBm at 1kbps. For • Duty cycling capable > 100:1 (shut down mode)
transmitters using higher-quality (~10ppm) crystals, the • 60dB analog received signal strength indicator
MICRF219A/MICRF220 offer an IF-bandwidth of
• 16-pin QSOP (4.9mm x 6.0mm) package
330kHz and a sensitivity of -110dBm at 1kbps, which
can provide better sensitivity and longer range
performance.
Datasheets and support documentation are available on
Micrel’s website at: www.micrel.com.

Typical Application
Y1
9.8131MHz

ANT
PCB Pattern
U1 MICRF218AYQS
1 16
C2 RO1 RO2
2 15
1.5pF 50V GNDRF NC
3 14
ANT RSSI RSSI
4 13
GNDRF CAGC
5 12
+3V VDD CTH
L1 C1 L2 6
IF_BW SEL1 11
39nH 6.8pF 68nH 7 10
SEL0 DO DO C4 C5
C3 8 9 0.1µF 4.7µF
0.1µF 16V SHDN GND 16V 6.3V

IF_BW CONTROL

315MHz/315.802, 900Hz Baud Rate Example

QwikRadio is a registered trademark of Micrel, Inc.

MLF and MicroLeadFrame are trademarks of Amkor Technology, Inc.
Micrel Inc. • 2180 Fortune Drive • San Jose, CA 95131 • USA • tel +1 (408) 944-0800 • fax + 1 (408) 474-1000 • http://www.micrel.com

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Ordering Information
Part Number Temperature Range Package
MICRF218AYQS –40° to +85°C 16-Pin QSOP

Pin Configuration
RO1 1 16 RO2
GNDRF 2 15 NC
ANT 3 14 RSSI
GNDRF 4 13 CAGC
Vdd 5 12 CTH
IF_BW 6 11 SEL1
SEL0 7 10 DO
SHDN 8 9 GND

MICRF218AYQS

Pin Description
16-Pin
Pin Name Pin Function
QSOP
Reference resonator input connection to Colpitts oscillator stage. May also be driven by external
1 RO1
reference signal of 1.5V p-p amplitude maximum.
2 GNDRF Negative supply connection associated with ANT RF input.
RF signal input from antenna. Internally AC-Coupled. It is recommended that a matching network with an
3 ANT
inductor to RF ground is used to improve ESD protection.
4 GNDRF Negative supply connection associated with ANT RF input.
5 VDD Positive supply connection for all chip functions.
IF bandwidth control logic input. Use VDD for Wide IF Bandwidth or VSS for Narrow IF Bandwidth. This
6 IF_BW
pin must not be left floating, must be tied to VDD or VSS.
Logic control input with active internal pull-up. Used in conjunction with SEL1 to control the demodulator
7 SEL0
low pass filter bandwidth. (See filter table for SEL0 and SEL1 in application subsection)
8 SHDN Shutdown logic control input. Active internal pull-up and must be pulled low for Normal Operation.
9 GND Negative supply connection for all chip functions except RF input.
10 DO Demodulated data output.
Logic control input with active internal pull-up. Used in conjunction with SEL0 to control the demodulator
11 SEL1
low pass filter bandwidth. (See filter table for SEL0 and SEL1 in application subsection)
Demodulation threshold voltage integration capacitor. Capacitor to GND sets the settling time for the
12 CTH demodulation data slicing level. Values above 1nF are recommended and should be optimized for data
rate and data profile.
13 CAGC AGC filter capacitor. A capacitor, normally greater than 0.47uF, is connected from this pin to GND
Received signal strength indication output. Output is from a buffer with 200 ohms typical output
14 RSSI
impedance.
15 NC Not Connected
Reference resonator connection. 7pF in parallel with low resistance MOS switch to GND during normal
16 RO2
operation. Driven by startup excitation circuit during the internal startup control sequence.

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Absolute Maximum Ratings(1) Operating Ratings(2)

Supply Voltage (VDD) .................................................+5V Supply voltage (VDD) ............................ +3.0V to +3.6V
Input Voltage ............................................................. +5V Ambient Temperature (TA).................. –40°C to +85°C
Junction Temperature ......................................... +150°C Input Voltage (VIN) ..................................... 3.6V (max.)
Lead Temperature (soldering, 10sec.) ................ +260°C Maximum Input RF Power .............................. –20dBm
Storage Temperature (TS) ..................... -65ºC to +150°C Operating Frequency .................... 300MHz to 450MHz
Maximum Receiver Input Power ........................+10dBm
ESD Rating(3) .......................................................... 3kV

Electrical Characteristics(4)
Specifications apply for VDD = 3.0V, VSS = 0V, CAGC = 4.7µF, CTH = 0.1µF, Bold values indicate –40°C ­ TA +85°C.
Symbol Parameter Condition Min Typ Max Units
Continuous Operation, fRX = 315MHz 4.0 mA
20:1 Duty Cycle, fRX = 315MHz 0.2 mA
MICRF218 Operating
IDD
Supply Current Continuous Operation, fRX = 433.92MHz 5.5 mA

20:1 Duty Cycle, fRX = 433.92MHz 0.3 mA

Ishut Shut down Current 1 µA
RF/IF Section
Image Rejection 20 dB
st
1 IF Center fRX = 315MHz, Narrow IF 0.98 MHz
Frequency fRX = 433.92MHz, Narrow IF 1.4 MHz
st
1 IF Center fRX = 315MHz, Wide IF 1.8 MHz
Frequency fRX = 433.92MHz, Wide IF 2.4 MHz

Receiver Sensitivity @ fRX = 315MHz, Narrow IF (50Ω) -108 dBm

1kbps fRX = 433.92MHz, Narrow IF (50Ω) -108 dBm

Receiver Sensitivity @ fRX = 315MHz, Wide IF (50Ω) -106 dBm

1kbps fRX = 433.92MHz, Wide IF (50Ω) -106 dBm
fRX = 315MHz, Narrow IF 400 kHz
fRX = 433.92MHz, Narrow IF 550 kHz
IF Bandwidth
fRX = 315MHz, Wide IF 1000 kHz
fRX = 433.92MHz, Wide IF 1500 kHz

Antenna Input fRX = 315MHz 16-j211 Ω

Impedance fRX = 433.92MHz 9.54-j152 Ω
Receive Modulation
Note 6 20 80 %
Duty Cycle

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Electrical Characteristics(4) (Continued)

Specifications apply for VDD = 3.0V, VSS = 0V, CAGC = 4.7µF, CTH = 0.1µF, Bold values indicate –40°C ­ TA +85°C.
Symbol Parameter Condition Min Typ Max Units
AGC Attack / Decay
tATTACK / tDECAY 0.1
Ratio

AGC pin leakage TA = 25ºC ±2 nA

current TA = +85ºC ± 800 nA
AGC Dynamic Range RFIN @ -50dBm 1.13 V
@ fRX = 433.92MHz RFIN @ -110dBm 1.70 V
Reference Oscillator
fRX = 315MHz, Narrow IF, IF_BW = VSS
9.8131 MHz
Crystal Load Cap = 10pF
fRX = 315MHz, Wide IF, IF_BW = VDD
9.78823 MHz
Crystal Load Cap = 10pF
Frequency
fRX = 433.92MHz Narrow IF, IF_BW = VSS
13.5178 MHz
Crystal Load Cap = 10pF
fRX = 433.92MHz Wide IF , IF_BW = VDD
13.48352 MHz
Crystal Load Cap = 10pF
Input Impedance 300 kΩ
Input Range 0.2 1.5 Vp-p
Source Current V(REFOSC) = 0V 3.5 µA
Demodulator
CTH Source
fREFOSC = 9.8131MHz, 315MHz, Note 8 165 kΩ
Impedance
TA = 25ºC ±2
CTH Leakage Current nA
TA = +85ºC ± 800
SEL0=0, SEL1=0 1180 Hz
Demodulator Filter
SEL0=0, SEL1=1 2360 Hz
Bandwidth @ 315
SEL0=1, SEL1=0 4720 Hz
MHz
SEL0=1, SEL1=1 9420 Hz
CTH Source
fREFOSC = MHz, 433.92MHz, note 8 120 kΩ
Impedance
TA = 25ºC ±2
CTH Leakage Current nA
TA = +85ºC ± 800
SEL0=0, SEL1=0 1625 Hz
Demodulator Filter
SEL0=0, SEL1=1 3250 Hz
Bandwidth @ 433.92
SEL0=1, SEL1=0 6500 Hz
MHz
SEL0=1, SEL1=1 13000 Hz

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Electrical Characteristics(4) (Continued)

Specifications apply for VDD = 3.0V, VSS = 0V, CAGC = 4.7µF, CTH = 0.1µF, Bold values indicate –40°C ­ TA +85°C.
Symbol Parameter Condition Min Typ Max Units
Digital / Control Functions
Input High Voltage Pins DO (As input), SHDN 0.8VDD V
Input Low Voltage Pins DO (As input), SHDN 0.2VDD V
Source @ 0.8 Vdd 260
DO pin output current µA
Sink @ 0.2 Vdd 600
Output rise and fall
CI = 15 pF, pin DO, 10-90% 2 µsec
times
RSSI
RSSI DC Output 0.22
V
Voltage Range to 2
mV/
RSSI response slope -90dBm to -40dBm 35
dBm
RSSI Output Current ±1.5 mA
RSSI Output
200 Ω
Impedance
50% data duty cycle, input power to
RSSI Response Time 0.3 Sec
Antenna = -20 dBm
Notes:
1. Exceeding the absolute maximum rating may damage the device.
2. The device is not guaranteed to function outside its operating rating.
3. Device are ESD sensitive. Use appropriate ESD precaution. Exceeding the absolute maximum rating may damage the device.
4. Sensitivity is defined as the average signal level measured at the input necessary to achieve 10-2 BER (bit error rate). The input signal
is defined as a return-to-zero (RZ) waveform with 50% average duty cycle (Manchester encoded) at a data rate of 1kBPS. Conductive
measurement is performed using 50 ohm test circuit .
5. Spurious reverse isolation represents the spurious component that appear on the RF input pin (ANT) measured into 50 Ohms with an
input RF matching network.
6. When data burst does not contain preamble, the duty cycle is then defined as total duty cycle, including any “quiet” time between
data bursts. When data bursts contain preamble sufficient to charge the slice level on capacitor Cth, then duty cycle is the effective
duty cycle of the burst alone. [For example, 100msec burst with 50% duty cycle, and 100msec “quiet” time between bursts. If burst
includes preamble, duty cycle is TON/(TON + tOFF) = 50%; without preamble, duty cycle is TON/(TON + TOFF + TQUIET) = 50msec/(200msec) =
25%. TON is the (Average number of 1’s/burst) × bit time, and TOFF = TBURST – TON.)
7. Parameter scales linearly with reference oscillator frequency fT. For any reference oscillator frequency other than one of the tabulated
frequencies (called FTAB), compute new parameter value as the ratio:
Parameter at fREFOSCMHz = ( fREFOSCMHz /FTAB ) × ( parameter at FTABMHz )
8. Parameter scales inversely with reference oscillator frequency fT. For any reference oscillator frequency other than one of the
tabulated frequencies (called FTAB), compute new parameter value as the ratio:
Parameter at fREFOSCMHz = ( FTAB / fREFOSCMHz ) × ( parameter at FTABMHz )

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Typical Characteristics

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LO Leakage in RF Port

Re-radiation from MICRF218 Antenna Port

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Figure 1 Simplified Block Diagram

Functional Description Receiver Operation

Figure 1 illustrates the basic structure of the
LNA
MICRF218. It is composed of three sub-blocks; Image
Rejection UHF Down-converter with Switch-able Dual The RF input signal is AC-coupled into the gate circuit
IF Bandwidths, the OOK Demodulator, and Reference of the grounded source LNA input stage. The LNA is
and Control Logics. a Cascoded NMOS.
Outside the device, the MICRF218 requires only three Mixers and Synthesizer
components to operate: two capacitors (CTH, and
CAGC) and the reference frequency device, usually a The LO ports of the Mixers are driven by quadrature
quartz crystal. local oscillator outputs from the synthesizer block.
The local oscillator signal from the synthesizer is
Additional five components may be used to improve placed on the low side of the desired RF signal to
performance. These are: low cost linear regulator allow suppression of the image frequency at twice the
decoupling capacitor, two components for the IF frequency below the wanted signal. The local
matching network, and two components for the pre- oscillator is set to 32 times the crystal reference
selector band pass filter. frequency via a phase-locked loop synthesizer with a
fully integrated loop filter.

Image Reject Filter and IF Band-Pass Filter

The IF ports of the mixer produce quadrature down
converted IF signals. These IF signals are low-pass
filtered to remove higher frequency products prior to

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the image reject filter where they are combined to frequency may use the wider IF bandwidth by utilizing
reject the image frequencies. The IF signal then the appropriate equation (1) or (2) for each crystal
passes through a third order band pass filter. The IF frequency.
Band-Pass filters are fully integrated inside the The following circuit, Figure 4, is an example of
MICRF218. After filtering, four active gain controlled switched crystal operation. The IF Bandwidth Control
amplifier stages enhance the IF signal to proper level and REF-OSC Control allow switching between two
for demodulation. operating frequencies with either a narrow bandwidth
IF Bandwidth General Description or a wide bandwidth. In this case, the logic control
switches between 390MHz in Wide Band Mode and
The MICRF218 has IF filters which may be configured 315MHz in Narrow Bandwidth Mode. The advantage
for operation in a narrow band or wide band mode of this circuit is when a RF interferer is at one
using the IF_BW pin. This pin must not be left floating; frequency, the receiver can go to another frequency to
it must be tied to VDD or VSS. With the use of a get clear reception.
13.4835MHz crystal and the IF_BW = VDD (wide
Figure 5 shows PCB layout for MICRF218 with
mode) the IF frequency is set to 2.4MHz with a
switched crystal operation. Please contact the Micrel
bandwidth of 1500kHz. With the use of a 13.5178MHz
RF Application Group for detailed document.
crystal and the IF_BW = VSS (narrow mode) the IF
frequency is set to 1.4MHz with a bandwidth of Dual Frequency Configuration Examples:
550kHz at 433.92MHz.
The crystal frequency for Wide Bandwidth IF Scenario 1:
operation is given by: • Frequency 1 - 315MHz Narrow Bandwidth
Operating Freq • Frequency 2 - 433.92MHz Wide Bandwidth
REFOSC = MHz Eq. 1
2.178 A 9.81314MHz crystal switched in circuit during
(32 + )
12 narrow IF mode, combined with a 13.48352MHz
crystal, allows operation at 315MHz with 400kHz IF
The crystal frequency for Narrow Bandwidth IF
bandwidth, and at 433.92MHz with 1500kHz
operation is given by:
bandwidth.
Operating Freq
REFOSC = MHz Eq. 2 Scenario 2:
1.198
(32 + )
12 • Frequency 1 - 315MHz Wide Bandwidth
Note: The IF frequency, IF bandwidth, and IF • Frequency 2 - 433.92MHz Narrow Bandwidth
separation between IF_BW modes using a single A 9.78823MHz crystal switched in circuit during Wide
crystal will scale linearly and can be calculated as IF mode, combined with a 13.51783MHz crystal,
follows: allows operation at 315MHz with 1000kHz IF
IF_Parameter = IF_Parameter @ 433.92 MHz bandwidth, and 433.92MHz with 550kHz IF
bandwidth.
 Operating Freq (MHz)  Eq. 3
*   Scenario 3:
 433.92(MHz)  • Frequency 1 - 315MHz Narrow Bandwidth
Switched Crystal Application • Frequency 2 - 433.92MHz Narrow Bandwidth
Operation A 9.8131MHz crystal switched in circuit, combined
with a 13.51783MHz crystal during narrow IF mode,
Appropriate choice of two crystal frequencies and allows operation at 315MHz with 400kHz IF
IF_BW mode switching allows operation at two bandwidth, and at 433.92MHz with 550kHz
different frequencies; one with low bandwidth bandwidth.
operation and the other with high bandwidth
operation. Either the lower or higher reception

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J4 J1
IF BANDWIDTH 1 1 EXTERNAL REFERENCE
CONTROL 2 2 OSCILLATOR INPUT

CON2 REFOSC
C1
NP
VDD = WIDE BANDWIDTH
0V = NARROW BANDWIDTH
+3V
Y1 Y2
JPR1 JPR2 9.8131MHz 12.1287MHz
U1 MICRF218AYQS 0 OHMS NP
1 16
J2 L4 C2 L3 RO1 RO2
2 15 R1
RF IN 100nH 2.2pF 100nH GNDRF NC NP
3 14
ANT RSSI TSDF1220W TSDF1220W
4 13 Q1 Q2
GNDRF CAGC
5 12
+3V VDD CTH R2
C3 L2 6
IF_BW SEL1 11
NP
33pF 3.9nH 7 10
C5 SEL0 DO C4 C5 R7
8 9
100nF SHDN GND 0.047µF 4.7µF 100k R11
100k

Notes: R3 R5
1. 0V = Common NP 100K C7 R4
2. VDD Input = 3.0 to 3.3V +3V NP 0 OHMS R6
3. Ref-Osc Control: 10k
0V = 315 MHz Operation,
VDD = 390.1 MHz Operation R8 R9
J3 L3 10k 10k
ZCB-0603
3.0 to 3.3V 1 R10
3.0 to 3.3V 2 100k
COM 3 +3V
SHDN 4 DATA OUT
DO 5
REF-OSC CNTR 6
COM 7
NP = Not Placed

Figure 4. Dual Frequency QR218BP_SWREF, 315 MHz and 390 MHz

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Single Crystal Operation for Dual Slicer and Slicing Level

Frequency Operation The signal prior to slicer is still linear demodulated
AM. Data slicer converts this signal into digital “1”s
When using a single crystal, the IF_BW function may and “0”s by comparing with the threshold voltage built
be used to switch between two operating frequencies. up on the CTH capacitor. This threshold is
Bandwidth will scale directly with operating frequency determined by detecting the positive and negative
(equation 3). Higher operating frequency will have the peaks of the data signal and storing the mean value.
wider IF bandwidth. Slicing threshold is at 50%. After the slicer, the signal
Given one operating frequency, the other frequency is now digital OOK data.
can be determined.: During long periods of “0”s or no data period,
(384 + 1.198) threshold voltage on the CTH capacitor may be very
Freq2 Narrow Bandwidth = Freq1 Wide Bandwidth * low. Large random noise spikes during this time may
(384 - 2.178) cause erroneous “1”s at DO pin.
Eq. 4
AGC Comparator
(384 + 2.178) The AGC comparator monitors the signal amplitude
Freq2 Wide Bandwidth = Freq1 Narrow Bandwidth * from the output of the programmable low-pass filter.
(384 - 1.198) When the output signal is less than 750mV, the
Eq. 5 threshold 1.5µA current is sourced into the external
CAGC capacitor. When the output signal is greater
OOK Demodulator than 750mV, a 15µA current sink discharges the
The following section discusses the demodulator CAGC capacitor. The voltage developed on the
which is comprised of Detector, Programmable Low CAGC capacitor acts to adjust the gain of the mixer
Pass Filter, Slicer, and AGC comparator. and the IF amplifier to compensate for RF input signal
level variation.
Detector and Programmable Low-Pass Filter
The demodulation starts with the detector removing Reference Control
the carrier from the IF signal. Post detection, the There are two components in Reference and Control
signal becomes baseband information. The sub-block: 1) Reference Oscillator and 2) Control
programmable low-pass filter further enhances the Logic through parallel Inputs: SEL0, SEL1, SHDN and
baseband information through the use of SEL0 and IF_BW.
SEL1. There are four programmable low-pass filter
BW settings for 433.92MHz operation, see Table 1. Reference Oscillator
Low pass filter BW will vary with RF Operating
Frequency. Filter BW values can be easily calculated
by direct scaling. See equation below for filter BW
calculation:
(Operating Freq)
BW Operating Freq = BW @433.92MHz * Eq. 6
433.92
It is very important to choose the filter setting that
best fits the intended data rate to minimize data
distortion.
Demod BW is set at 13000Hz @ 433.92MHz as
default (assuming both SEL0 and SEL1 pins are
floating). The low pass filter can be hardware set by
external pins SEL0 and SEL1.
SEL0 SEL1 Demod BW (@ 434MHz)
0 0 1625Hz
1 0 3250Hz
0 1 6500Hz Figure 6. Reference Oscillator Circuit
1 1 13000Hz - default
Table 1. Demodulation BW Selection

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The reference oscillator in the MICRF218 (Figure 6) Crystal Parameters

uses a basic Colpitts crystal oscillator configuration To operate the MICRF218 with minimum offset,
with MOS transconductor to provide negative crystal frequencies should be specified with 10pF
resistance. All capacitors shown in Figure 6 are loading capacitance. Please contact Micrel RF
integrated inside the MICRF218. R01 and R02 are Applications department for crystal parameters.
external pins of MICRF218. User only needs to
connect reference oscillation crystal.
See equation (1) and (2) to calculate reference
oscillator crystal frequency for either narrow or wide
bandwidth.

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Application Information

Figure 7. QR218HE1 Application Example, 433.92 MHz, Narrow Band

The MICRF218 can be fully tested by using one of Table 2 shows the matching elements for the device
many evaluation boards designed at Micrel for this frequency range. For additional information look for
device. As simple demonstrator, the QR218HE1 Small PCB Antennas for Micrel RF Products
(Figure 7) offers a good start for most applications. It application note.
has a helical PCB antenna with its matching network, Freq (MHz) C9 (pF) L3(nH)
a bandpass-filter front-end as a pre-selector filter,
315.0 1.2 75
matching network and the minimum components
required to make the device work, which are a crystal, 390.0 1.2 43
Cagc, and Cth capacitors. 418.0 1.2 36
The matching network of the helical PCB antenna (C9 433.92 1.5 30
and L3) can be removed and a whip antenna (ANT2)
or a RF connector (J2) can be used instead. Figure 7 Table 2. Matching Values for the Helical PCB Antenna
shows the entire schematic of it for 433.92MHz. Other If whip antenna is used, remove C9 and place the
frequencies can be used. Matching network values whip antenna in the hole provided in the PCB. Also,
for other frequencies are listed in the tables below. RF signal can be injected there (add RF connector).
Capacitor C9 and inductor L3 are the passive L1 and C8 form the pass-band-filter front-end. Its
elements for the helical PCB matching network. Tight purpose is to attenuate undesired outside band noise
tolerance is recommended for these devices, like 2% which reduces the receiver performance. It is
for the inductor and 0.1pF for the capacitor. PCB calculated by the parallel resonance equation:
variations may require different component values and
optimization. 1
f=
(2 * π L1 * C8)

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Table 3 shows the most used frequency values. Q = SQRT (Rp/50 + 1)

Freq (MHz) C8 (pF) L1(nH) Q = 7.06
315.0 6.8 39 Xm = Rp / Q
390.0 6.8 24 Xm = 345.8Ω
418.0 6.0 24 Resonance Method For L-shape Matching Network:
433.92 5.6 24 Lc = Xp / (2×Pi×f); Lp = Xm / (2×Pi×f)
L2 = (Lc×Lp) / (Lc + Lp); C3 = 1 / (2×Pi×f×Xm)
Table 3. Band-Pass-Filter Front-End Values L2 = 38.9nH
There is no need for the bandpass-filter front-end for
C3 = 1.06pF
applications where it is proven that the outside band
noise does not cause a problem. The MICRF218 has Doing the same calculation example with the Smith
image reject mixers which improve significantly the Chart, it would appear as follows,
selectivity and rejection of outside band noise. First, the input impedance of the device is plotted,
Capacitor C3 and inductor L2 form the L-shape (Z = 9.54 – j152)Ω @ 433.92MHz.(Figure 8).
matching network. The capacitor provides additional
attenuation for low frequency outside band noise, and
the inductor provides additional ESD protection for the
antenna pin. Two methods can be used to find these
values, which are matched close to 50Ω. One method
is done by calculating the values using the equations
below, and the other method uses a Smith chart. The
latter is made easier by using software that plots the
values of the components C8 and L1, like WinSmith
by Noble Publishing.
To calculate the matching values, one needs to know
the input impedance of the device. Table 4 4 shows
the input impedance of the MICRF218 and suggested
matching values for the most used frequencies. These
suggested values may be different if the layout is not
exactly the same as the one made here.
Freq (MHz) C3 (pF) L2(nH) Z device (Ω)
315.0 1.5 68 16.3 -j210.8
390.0 1.2 47 8.26 – j163.9
418.0 1.2 43 11.1 – j161.9
433.92 1.1 39 9.54 – j152.3
Figure 8. Device’s Input Impedance, Z = 9.54-j152Ω
Table 4. Matching values for the most used frequencies Second, the shunt inductor (39nH) and the series
For the frequency of 433.92MHz, the input impedance capacitor (1.1pF) for the desired input impedance are
is Z = 9.54 – j152.3Ω. The matching components are plotted (Figure 9). One can see the matching leading
calculated by: to the center of the Smith Chart or close to 50Ω.
Equivalent parallel = B = 1/Z = 0.410 + j6.54
msiemens
Rp = 1 / Re (B); Xp = 1 / Im (B)
Rp = 2.44kΩ; Xp = 345.8Ω

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Figure 9. Plotting the Shunt Inductor and Series Capacitor

Crystal Y1 may be either SMT or leaded. It is the

reference clock for all the device internal circuits.
Crystal characteristics of 10pF load capacitance,
30ppm, ESR < 50Ω, -40ºC to +85ºC temperature
range are desired. Table 5 shows the crystal
frequencies for WB or NB and one of Micrel’s
approved crystal manufacturers (www.hib.com.br).

REFOSC (MHz) Carrier (MHz) HIB Part Number

9.813135, NB 315 SA-9.813135-F-10-G-30-30-X
12.149596, NB 390.0 SA-12.149596-F-10-G-30-30-X
13.021874, NB 418.0 SA-13.021874-F-10-G-30-30-X
13.517827, NB 433.92 SA-13.517827-F-10-G-30-30-X
9.788232, WB 315 SA-9.788232-F-10-G-30-30-X
12.118764, WB 390.0 SA-12.118764-F-10-G-30-30-X
12.988829, WB 418.0 SA-12.988829-F-10-G-30-30-X
13.483523, WB 433.92 SA-13.483523-F-10-G-30-30-X

Table 5. Crystal Frequency and Vendor Part Number

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The oscillator of the MICRF218 is Colpitts in

configuration. It is very sensitive to stray capacitance Maximum
loads. Thus, very good care must be taken when Demod. Shortest
SEL0 SEL1 baud rate for
BW Pulse
laying out the printed circuit board. Avoid long traces JP1 JP2 50% Duty
(hertz) (µsec)
and ground plane on the top layer close to the Cycle (hertz)
REFOSC pins RO1 and RO2. When care is not taken Short Short 1625 400 1250
in the layout, and crystals from other vendors are
Open Short 3250 200 2500
used, the oscillator may take longer times to start as
well as the time to good data in the DO pin to show Short Open 6500 100 5000
up. In some cases, if the stray capacitance is too high Open Open 13000 50 10000
(> 20pF), the oscillator may not start at all. Table 6. JP1 and JP2 setting, 433.92 MHz
Refer to Equations 1 and 2 for crystal frequency
calculations. The local oscillator is low side injection Other frequencies will have different demodulator
(32 × 13.51783MHz = 432.571MHz), that is, its bandwidth limits, which are derived from the reference
frequency is below the RF carrier frequency and the oscillator frequency. Table 7 and 8 below shows the
image frequency is below the LO frequency. See limits for the other two most used frequencies.
Figure 10. The product of the incoming RF signal and
local oscillator signal will yield the IF frequency, which Maximum
will be demodulated by the detector of the device. Demod. Shortest
SEL0 SEL1 baud rate for
BW Pulse
JP1 JP2 50% Duty
(hertz) (µsec)
Cycle (hertz)
Image Desired
Frequency Short Short 1565 416 1204
Signal
Open Short 3130 208 2408
Short Open 6261 104 4816
Open Open 12523 52 9633
Table 7. JP1 and JP2 setting, 418.0 MHz

-fLO f (MHz)
Demod. Maximum
Shortest
Figure 10. Low Side Injection Local Oscillator SEL0 SEL1 baud rate for
BW Pulse
JP1 JP2 50% Duty
(hertz) (µsec)
Cycle (Hertz)
Narrow and Wide Band Crystal Part Numbers,
Short Short 1460 445 1123
WB = IF Wide Band, NB = IF Narrow Band
Open Short 2921 223 2246
JP1 and JP2 are the bandwidth selection for the
demodulator bandwidth. To set it correctly, it is Short Open 5842 111 4493
necessary to know the shortest pulse width of the Open Open 11684 56 8987
encoded data sent in the transmitter. Similar to the Table 8. JP1 and JP2 setting, 390.0 MHz
example of the data profile in the Figure 11 below,
PW2 is shorter than PW1, so PW2 should be used for Maximum
the demodulator bandwidth calculation which is found Demod. Shortest
SEL0 SEL1 baud rate for
by 0.65/shortest pulse width. After this value is found, BW Pulse
JP1 JP2 50% Duty
(hertz) (µsec)
the setting should be done according to Table 6. For Cycle (Hertz)
example, if the pulse period is 100µsec, 50% duty Short Short 1180 551 908
cycle, the pulse width will be 50µsec (PW = (100µsec
Open Short 2360 275 1815
× 50%) / 100). So, a bandwidth of 13kHz would be
necessary (0.65 / 50µsec). However, if this data Short Open 4720 138 3631
stream had a pulse period with 20% duty cycle, then Open Open 9400 69 7230
the bandwidth required would be 32.5kHz (0.65 / Table 9. JP1 and JP2 setting, 315.0 MHz.
20µsec), which exceeds the maximum bandwidth of
the demodulator circuit. If one tries to exceed the
maximum bandwidth, the pulse would appear
stretched or wider.

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Selection of CTH and CAGC Capacitors RF signal intensity vs. voltage. It is very useful to
Capacitors C6 and C4, Cth and Cagc respectively determine the signal to noise ratio of the RF link,
provide time-based reference for the data pattern crude range estimate from the transmitter source and
received. These capacitors are selected according to AM demodulation, which requires a low Cagc
data profile, pulse duty cycle, dead time between two capacitor value.
received data packets, and if the data pattern has or
Shut Down Control
does not have a preamble. See Figure 11 for an
example of a data profile. The shut down pin (SHDN) is useful to save energy.
When its level close to Vdd (SHDN = 1), the device is
not in operation. Its DC current consumption is less
PW1 PW2
Preamble than 1µA (do not forget to remove R3). When toggling
from high to low, there will be a time required for the
Header
device to come to steady state mode, and a time for
1 2 3 4 5 6 7 8 9 10
t1 t2
data to show up in the DO pin. This time will be
PW2 = Narrowest pulse width dependent upon many things such as temperature,
t1 & t2 = data period choice of crystal used, and if the there is an external
Figure 11. Example of a Data Profile oscillator with faster startup time. Normally, with the
crystal vendors suggested, the data will show up in
For best results, the capacitors should always be the DO pin around 1msec time, and 2msec over the
optimized for the data pattern used. As the baud rate temperature range of the device. See Figures 12.
increases, the capacitor values decrease. Table 10
shows suggested values for Manchester Encoded
data, 50% duty cycle.

Demod. Cth Cagc

SEL0 SEL1
BW
JP1 JP2 (C6) (Cagc)
(hertz)
Short Short 1625 100nF 4.7µF
Open Short 3250 47nF 2.2µF
Short Open 6500 22nF 1µF
Open Open 13000 10nF 0.47µF

Table 10. Suggested Cth and Cagc Values.

Other components used include C5, which is a

decoupling capacitor for the Vdd line; R4 reserved for
future use and not needed for the evaluation board; Figure 12. Time-to-Good Data After Shut Down Cycle,
R3 for the shutdown pin (SHDN = 0, device is Room Temperature
operation), which can be removed if that pin is
connected to a microcontroller or an external switch,
and R1 and R2 which form a voltage divider for the
AGC pin. One can force a voltage in this AGC pin to
purposely decrease the device sensitivity. Special
care is needed when doing this operation, as an
external control of the AGC voltage may vary from lot
to lot and may not work the same for several devices.

DO, RSSI and Shutdown Functions

Three other pins are worthy of comment. They are the
DO, RSSI, and shut down pins. The DO pin has a
driving capability of 0.6mA. This drive current is good
enough for most of the logic family ICs in the market
today. The RSSI pin provides a transfer function of the

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Important Note
A few customers have reported that some MICRF218
receiver do not start up correctly. When the issue
occurs, DO either chatters or stays at low voltage
level. An unusual operating current is observed and VDD pin
the part cannot receive or demodulate data even
when a strong OOK signal is present.
Micrel has confirmed that this is the symptom of
incorrect power on reset (POR) of internal register
bits. The MICRF218 is designed to start up in
shutdown mode (SHDN pin must be in logic high SHDN pin
during VDD ramp up). When the SHDN pin is tied to
GND, and if the supply is ramped up slowly, a “test
bus pull down” circuit may be activated. Once the
chip enters this mode, the POR does not have the
chance to set register bits (and hence operating
modes) correctly. The test bus pull down acts on the
SHDN pin, and can be illustrated in the following The suggestion provided above will generally
diagram. serve to prevent the startup issue from happening
to the MICRF218 series ASK receiver. However,
exact values of the RC network depend on the
3.3V
ramp rate of the supply voltage, and should be
MICRF2XX 10 ohm (Vdd) pin
MICRF2XX
determined on a case-by-case basis.
Bias 4.7uF
control &
POR

2.2uF

Change the SHDN

Test Mode pin and Vdd pin
Circuits connections to

Test Bus
(SHDN) pin
(SHDN) pin

100K

This device turns on,

preventing POR from setting
operating modes correctly

To prevent the erroneous startup, a simple RC

network is recommended. The 10Ω resistor and the
4.7µF capacitor provide a delay of about 200µs
between VDD and SHDN during power up, thus
ensuring the part enters the shutdown stage before
the part is actually turned on. The 2.2µF capacitor
bootstraps the voltage on SHDN, ensuring that SHDN
voltage leads the supply voltage on VDD during power
up. This gives the POR circuit time to set internal
register bits. The SHDN pin can be brought low to
turn the chip on once the initialization is completed.
The 2.2µF and 100kΩ network form a RC delay of
about 200ms before the SHDN pin is brought to low
again. The 100kΩ resistor discharges the SHDN pin to
turn the chip on.

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PCB Considerations and Layout

Figures 14 to 17 show top, bottom and silkscreen vias. Ground plane must be solid and possibly without
layers of printed circuit board for the QR218HE1 interruptions. Avoid ground plane on top next to the
board. Gerber files are provided and are matching elements. It normally adds additional stray
downloadable from Micrel Website: www.micrel.com, capacitance which changes the matching. Do not use
to fabricate this board. Keep traces as short as phenolic material. Use only FR4 or better materials.
possible. Long traces will alter the matching network, Phenolic material is conductive above 200MHz. RF
and the values suggested will not be valid. Suggested path should be as straight as possible avoiding loops
Matching Values may vary due to PCB variations. A and unnecessary turns. Separate ground and Vdd
PCB trace 100 mills (2.5mm) long has about 1.1nH lines from other circuits (microcontroller, etc). Known
inductance. Optimization should always be done with sources of noise should be laid out as far as possible
exhaustive range tests. Make individual ground from the RF circuits. Avoid thick traces, the higher the
connections to the ground plane with a via for each frequency, the thinner the trace should be in order to
ground connection. Do not share vias with ground minimize losses in the RF path.
connections. Each ground connection = 1 via or more

Figure 14. QR218HE1 Top Layer.

Figure15. QR218HE1 Bottom Layer, Mirror Image.

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Figure 16. QR218HE1 Top Silkscreen Layer.

Figure 17. QR218HE1 Dimensions.

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QR218HE1 Bill of Materials, 433.92 MHz

Item Part Number Manufacturer Description Qty.
ANT1 Helical PCB Antenna Pattern 1
ANT2 (np)50-ohm Ant 168mm 20 AWG, rigid wire 0
C9 Murata 1.5pF , 0402/0603 1
C4 Murata / Vishay 4.7µF, 0805 1
C3 Murata/Vishay 1.1pF, 0402/0603
C6,C5 Murata / Vishay 0.1µF, 0402/0603 2
C8 Murata 5.6pF, 0402/0603 1
JP1,JP
Vishay short, 0402, 0Ω resistor 2
2, JP3
JP4 (np) not placed 0
J2 (np) not placed 0
J3 CON6 1
Coilcraft / Murata /
L1 24nH 5%, 0402/0603 1
ACT1
Coilcraft / Murata /
L2 39nH 5%, 0402/0603 1
ACT1
Coilcraft / Murata /
L3 30nH 2%, 0402/0603 1
ACT1
R1,R2,
(np) 0402, not placed 0
R4
R3 Vishay 100kΩ , 0402 1
Y1 HCM49 www.hib.com.br (np)13.51783MHz Crystal 0
Y1A HC49/US www.hib.com.br 13.51783MHz Crystal 1
U1 MICRF218AYQS Micrel, Inc. 3.3V, 315/433MHz Wide-IF Bandwidth ASK Receiver 1

Table 11. QR218HE1 Bill of Materials, 433.92 MHz, Narrow Band.

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Package Information and Recommended Land Pattern(1)

QSOP16 Package Type (AQS16)

Note:
1. Package information is correct as of the publication date. For updates and most current information, go to www.micrel.com.

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MICREL, INC. 2180 FORTUNE DRIVE SAN JOSE, CA 95131 USA

TEL +1 (408) 944-0800 FAX +1 (408) 474-1000 WEB http:/www.micrel.com

Micrel, Inc. is a leading global manufacturer of IC solutions for the worldwide high performance linear and power, LAN, and timing &
communications markets. The Company’s products include advanced mixed-signal, analog & power semiconductors; high-performance
communication, clock management, MEMs-based clock oscillators & crystal-less clock generators, Ethernet switches, and physical layer
transceiver ICs. Company customers include leading manufacturers of enterprise, consumer, industrial, mobile, telecommunications, automotive,
and computer products. Corporation headquarters and state-of-the-art wafer fabrication facilities are located in San Jose, CA, with regional sales
and support offices and advanced technology design centers situated throughout the Americas, Europe, and Asia. Additionally, the Company
maintains an extensive network of distributors and reps worldwide.

Micrel makes no representations or warranties with respect to the accuracy or completeness of the information furnished in this datasheet. This
information is not intended as a warranty and Micrel does not assume responsibility for its use. Micrel reserves the right to change circuitry,
specifications and descriptions at any time without notice. No license, whether express, implied, arising by estoppel or otherwise, to any
intellectual property rights is granted by this document. Except as provided in Micrel’s terms and conditions of sale for such products, Micrel
assumes no liability whatsoever, and Micrel disclaims any express or implied warranty relating to the sale and/or use of Micrel products including
liability or warranties relating to fitness for a particular purpose, merchantability, or infringement of any patent, copyright, or other intellectual
property right.

Micrel Products are not designed or authorized for use as components in life support appliances, devices or systems where malfunction of a
product can reasonably be expected to result in personal injury. Life support devices or systems are devices or systems that (a) are intended for
surgical implant into the body or (b) support or sustain life, and whose failure to perform can be reasonably expected to result in a significant
injury to the user. A Purchaser’s use or sale of Micrel Products for use in life support appliances, devices or systems is a Purchaser’s own risk
and Purchaser agrees to fully indemnify Micrel for any damages resulting from such use or sale.

© 2007 Micrel, Incorporated.

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