VSK – 6748 User Manual

Technical Clarification /Suggestion :

Technical Support Division,
Vi Microsystems Pvt. Ltd.,
Plot No :75,Electronics Estate,
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TMS320C6748 Manual VSK-6748

Chapter 1

Introduction to the
TMS320C6748

Chapter One provides a description of the VSK-6748 board along

with the key features and a block diagram of the circuit board.

S.No Topics Page No

1.1 Key Features 2

1.2 Functional Overview Of The VSK-6748 4
1.3 Basic Operation 4
1.4 Boot Switch Settings 4
1.5 Power Supply 6

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1.1 Key Features

The VSK-6748 is a standalone development platform that enables users to

evaluate and develop applications for the DSP processor.

Hardware Overview

The VSK comes with a full complement of on board devices that suit a wide varie-
ty of Application environments. Key features include:

 A Texas Instruments TMS320C6748 device with a DSP floating

point processor and processor operating up to 300 MHz

 128 Megabytes SDRAM

 TLV320AIC3106 Stereo Codec

 On chip real time clock

 Configurable boot load options

 8 user LEDs/8 position user DIP switch

 Single voltage power supply (+5V)

 Expansion connectors for video port interface/SPI/GPIO

termination.

 Embedded JTAG Emulation

 14 Pin TI JTAG Interfaces

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VSK – 6748 Module

Fig – 1.1: VSK-6748 Module

1.2 Functional Overview of the VSK-6748

The TMS320C6748 on the VSK interfaces to on-board peripherals through the 16-
bit wide multiplexed EMIF interface pins. The SDRAM memory is connected to its own
dedicated 16 bit wide bus.

An on-board AIC3106 codec allows the DSP to transmit and receive analog audio
Signals. The I2C bus is used for the codec control interface, while the McASP controls
the audio stream. Signal interfacing is done through 3.5mm audio jacks that correspond
to microphone input, headphone output, line input, and line output. The VSK includes 8
user LEDs, a 8 position user DIP switch, and on chip real time clock.

An included +5V external power supply is used to power the board. On-board
switching voltage regulators provide the CPU core voltage, +3.3V, +1.8V for peripheral
interfacing. The board is held in reset by the on board power controller until these sup-
plies are within operating specifications. Code Composer Studio communicates with the
VSK through an embedded emulator or via the TI 14 pin JTAG connectors.

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1.3 Basic Operation

The VSK is designed to work with TI’s Code Composer Studio IDE. Code Com-
poser communicates with the board through an on board JTAG emulator. To start, follow
the instructions in the Quick Start Guide to install Code Composer. This process will in-
stall all of the necessary development tools, documentation and drivers.

1.4 Boot Switch Settings

The VSK has a 4 position switch that allows users to configure the operational
state of the processor when it is released from reset and determine the source for process
or booting. Switch SW2 configures the boot mode that will be used when the DSP starts
executing. By default the switches are configured to serial EEPROM boot. The table be-
low shows the boot mode sources and their respective switch positions.

Fig - 1.2: DIP Switch

1.4.1 Switch Settings

B1 B2 B3 B4 B5 B6 B7 B8 Boot Mode

On On On On X X X X On Board JTAG Emulation Debug

Off On Off Off X X X X NOR Flash Boot

Table - 1.1: Boot Mode Selection

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1.5Power Supply

The VSK operates from a single +5V external power supply connected to the main
power input (P1), a 2.5 MM. barrel-type plug. Internally, the +5V input is converted into
core voltage, +1.8V and +3.3V using Texas Instruments TPS65023 Power Management
Unit. The +3.3V and +1.8V supply are used for the DSP's I/O Buffers and other chips on
the board.

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Chapter 2

BOARD COMPONENTS

This chapter describes the operation of the major board components on the.

S.No Topics Page No

2.1 EMIF-B SDRAM Memory Interfaces 7

2.2 AIC3106 Interfaces 7
2.3 Interfaces 7
2.4 ADC interface 9
2.5 DAC interface 10

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2.1 SDRAM Memory Interface (EMIF-B)

The TMS320C6748 VSK device incorporates a dedicated 32 bit wide SDRAM

memory bus. The VSK uses two 128 Megabit, 16 bit wide memories on this bus, for a
total of 64 megabytes of memory for program, data, and voice storage. The internal
SDRAM controller uses a PLL to control the SDRAM memory timing. Memory refresh
for SDRAM is handled automatically by the TMS320C6748 internal SDRAM controller.

2.2 AIC3106 Interface

The VSK incorporates a Texas Instruments TLV320AIC3106 stereo codec for in-
put and output of audio signals. The codec samples analog signals on the microphone or
line inputs and converts them into digital data so it can be processed by the DSP. When
the DSP is finished with the data it uses the codec to convert the samples back into ana-
log signals on the line output so the user can hear the output.

The codec communicates using two serial channels, one to control the codec’s in-
ternal configuration registers and one to send and receive digital audio samples. The I2C
bus is used as the AIC3106’s control channel. The control channel is generally only used
when configuring the codec, it is typically idle when audio data is being transmitted, and
McASP1 is used as the bi-directional data channel. All audio data flows through the data
channel. Many data formats are supported based on the three variables of sample width,
clock signal source and serial data format. The VSK examples generally use a 16-bit
sample width with the codec in master mode so it generates the frame sync and bit clocks
at the correct sample rate without effort on the DSP side.

The codec is clocked via a 24.576 MHz oscillator. The internal sample rate gene-
rator subdivides the default system clock to generate common audio frequencies. The
sample rate is set by a codec register. The figure below shows the codec interface on the
TMS320C6748 VSK.

2.3 C Interface

The C bus on the TMS320C6748- VSK is ideal for interfacing to the control
registers of many devices. On the TMS320C6748- VSK the I2C bus is used to configure
the Ethernet phy and Codec.

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2.4 ADC SOC Selection:

In TMS320C6748 VSK Trainer Having 2 Channels SPI based ADC(Interface with

SPI0). The channels has been selected by the following table

Bit7(MSB) Bit6 Bit5 Bit4 Bit3 Bit2 Bit1 Bit0

DONTC DONTC ADD2 ADD1 ADD0 DONTC DONTC DONTC

Table – 2.2: Control registers bit

ADD2 ADD1 ADD0 Input

Channel

X 0 0 IN1(default)

X 0 1 IN2

Not allowed. The output signal of Dout pin

X 1 X is indeterminate if ADD1 is high

Table - 2.3: ADC input Channel Selection

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2.5 DAC Channel Selection:

In TMS320C6748 VSK Trainer Having 2 Channels SPI based DAC(Interface with

SPI1). The channels has been selected by the following table

Data writing format:

Fig 2.1: DAC Channel Selection

DAC Selection Table:

S.No Data Write DAC

1 1000 DAC Channel 1 selection

2 5000 DAC Channel 2 selection

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Chapter 3

PHYSICAL DESCRIPTION

This chapter describes the physical layout of the TMS320C6748 VSK and its interfaces.

S.No Topics Page No

3.1 Block diagram 12

3.2 Board Layout (VSK -6748) 13
3.3 Connectors 14
3.4 Hardware Description 14

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3.1 Block Diagram

Fig 3.1 Block of VSK - 6748

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3.2 Board Layout

Fig 3.2 VSK – 6748 Board Layout

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3.3 Connectors
3.3.1 VSK – 6748 Board
1. Power Supply
2. TMS320C6748 processor
3. SDRAM interface
4. Line IN,MIC IN
5. Speaker out, Line out
6. DIP switch(8 – switch)
7. LED (8 – led)
8. ADC/DAC interface (2 channels)
9. Boot Mode selection switch
10. External JTAG
11. On board JTAG
12. Reset

3.4 Description
3.4.1 Power supply

The VSK operates from a single +5V external power supply connected to the main
power input (P1), a 2.5 MM. barrel-type plug. Internally, the +5V input is converted into
core voltage, +1.8V and +3.3V using Texas Instruments TPS65023 Power Management
Unit. The +3.3V and +1.8V supply are used for the DSP's I/O Buffers and other chips on
the board.

3.4.2 TMS320C6748 Processor

The C6745/6748 is a low-power digital signal processor based on C6748 DSP

core. It consumes significantly lower power than other members of the TMS320C6000
platform of DSPs. The C6745/6748 DSP core uses a two-level cache-based architecture.
The Level 1 program cache (L1P) is a 32KB direct mapped cache and the Level 1 data
cache (L1D) is a 32KB 2-way set-associative cache. The Level 2 program cache (L2P)
consists of a 256KB memory space that is shared between program and data space. L2
memory can be configured as mapped memory, cache, or combinations of the two. Al-
though the DSP L2 is accessible by other hosts in the system, an additional 128KB RAM
shared memory (C6748 only) is available for use by other hosts without affecting DSP
performance.

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3.4.3 SDRAM

The TMS320C6748 VSK device incorporates a dedicated 16 bit wide SDRAM

memory bus. The VSK uses one 128 Megabit, 16 bit wide memories on this bus, for a
total of 128 megabytes of memory for program, data, and voice storage. The internal
SDRAM controller uses a PLL to control the SDRAM memory timing. Memory refresh
for SDRAM is handled automatically by the TMS320C6748 internal SDRAM controller.

3.4.4 Audio Codec

The codec communicates using two serial channels, one to control the codec’s in-
ternal configuration registers and one to send and receive digital audio samples. The I2C
bus is used as the AIC3106’s control channel. The control channel is generally only used
when configuring the codec, it is typically idle when audio data is being transmitted, and
McASP1 is used as the bi-directional data channel. All audio data flows through the data
channel. Many data formats are supported based on the three variables of sample width,
clock signal source and serial data format. The VSK examples generally use a 16-bit
sample width with the codec in master mode so it generates the frame sync and bit clocks
at the correct sample rate without effort on the DSP side.

The codec is clocked via a 24.576 MHz oscillator. The internal sample rate gene-
rator subdivides the default system clock to generate common audio frequencies. The
sample rate is set by a codec register. The figure below shows the codec interface on the
TMS320C6748 VSK. Line IN & MIC IN are the audio input it’s connected in P8, P9 and
Line Out, Speaker out are output its connected in P10,P12.

3.4.5 DIP switch & LED

8 port DIP switch and 8 LED’s are used in VSK – 6748 module it’s connected in
SW4 & DS(2 – 9).

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3.4.6 Boot Mode selection switch

VSK – 6748 have 3 types of Boot modes. To set the DIP Switch to select the spe-
cified Boot mode options its mention below the table 3.1

B1 B2 B3 B4 B5 B6 B7 B8 Boot Mode

On On On On X X X X On Board JTAG Emulation Debug

Off On Off Off X X X X NOR Flash Boot

Table - 3.1: Boot Mode Selection

3.4.7 ADC / DAC interface

In TMS320C6748 VSK Trainer Having 2 ADC & 2 DAC Channels . The ADC
& DAC are configured with SPI based interfaces. The channels selections are mentioned
chapter 2. It support 5/3.3 v input voltage and its supported max 1mbps speed. The set-
tling time of DAC is 8.5us.

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Chapter 4

Software Over view

Chapter Four provides a CCS software Overview and Execute

the programs by using TMS320C6748 VSK Module.

S.No Topics Page No

4.1 CCS installation 17

4.2 Initial Software Setups 18

4.2.1 CCS Software Working Procedure 26

4.2.1.1 Project Creating Method 26

4.2.1.2 Build and Executing Method 29

4.2.1.3 Program Implementation and I/O View procedure 34

4.3 Waveform Output Window 41

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4.1 CCS Installation

Step 1: Install CCS_v3.3. After the installation of CCS follow the below steps

Step 2: Install ON_Board Emulator driver

(i) XDS100_v1_1_RTM.exe

Step 3: For CCS v3.3 updation

(i) SR12_CCS_v3.3_SR_3.3.82.13.exe
(ii) TI_CGT_C6000_6.1.9_setup.exe
(iii) bios_setupwin32_5_33_05.exe
Note: Install the above software’s step by step.
Step 4: After all above mentioned software’s are installed copy and paste the
following files into the below mentioned location.

1. c6748.gel – “C:\CCStudio_v3.3\cc\gel”
2. C6748_xds100 – “C:\CCStudio_v3.3\drivers\import”

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4.2 Initial Software Setups:

 Click Start Menu  All Programs  Texas Instruments  Code Compos-

er Studio3.3  Setup Code Composer Studio V3.3.

 Now click Custom Boards which is located at the bottom of the window.
 Click the File option and select the import. It’s shown in the figure below.

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 Next you need to browse and select a file C6748_xds100 from the location
C:\CCStudio_v3.3\drivers\import and click ok.
 Next right click the TMS320C674X_0 option and select properties. It’s shown in the
figure below.
 Then, browse the gel file from the location C:\CCStudio_v3.3\cc\gel and click ok. The
window is given below.
 Now click the Save & Quit option, code composer studio setup dialogue box will be
opened. It shown in figure below.

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 Now CCS Window will open without work space.

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Updating component manager

 After the workspace has appeared go to Help menu and click on About to update
component manager.

 Then click on Component manager tab to update Build tools and DSP/BIOS.

 Then component manager window will display. In that click on Build tools on the
left of that window

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 Click on the maximize button near TMS320C67XX and select the last check box

 After that maximize the Target content and then TMS320C67XX by the figure
given below

 Finally click save button which is located under the file menu and click ok.

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 Then close the component manager window and switch over to CCS. In CCS
click Ok above the component manager tab.

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 After that go to FileLaunch setup option , code composer studio setup window
will open .

 Atlast click on save & quit option to update your component manager

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4.2.1 CCS Software Working Procedure:

4.2.1.1 Project Creating Method:

 Click Start Menu  All Programs  Texas Instruments Code Composer Studio

 Now the CCS window will open without Project.

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 Then switch ON the TMS320C6748 VSK module and plug the USB Emulator to
the module. Now press Debug option and then select the connect option.

 Now TMS320C6748 VSK module and CCS software will be connected. Then
click Project and select new. Now open the new project.

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 Save the project in specific location and give Project Name. Then click finish but-
ton. Now project will be added in CCS work space.

 Select the File  New  Source File. Now new untitled window will be open.

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 Next click File and select save option. Now give a name for opened file with dot C.
Copy the Linker cmd, ViDSKC6748-BSL-Lib file path and then paste the copied
file into our project folder.

4.2.1.2 Build and Executing Method

 Write a program in editor window and save the file.

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 Now Right click the Source file in project window and select Add file to project.

 Now click the project file, linker command file and then select Open button.

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 Then click Project  Rebuild All. (Alt + P + R)

 Now an editor file will be builded.

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 Click File option and Load the Program.(Ctrl + L)

 Then double click the debug option and click out file and select the Open button.
Now program will be loaded.

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 Finally select the debug option and click Run (F5). Now run the program.

This is the basic procedure for create a project, build and executing methods.

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4.2.1.3 Program Implementation and Input / Output View Procedure:

 How to create a project, build and executing methods are already see in section
4.1.2.1. Now see in this section how to write a program coding into Editor Window
and how to view the input/output procedure.

 Write the program in editor window and save the file.

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 Now Right click the Source and click Add file to project.

 Select the project file, linker command file and then click Open button.

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 Then select the Project option and click Rebuild All. (Alt + P + R)

 Now an editor file will be builded.

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 Then click View option and select the Memory.

 Now enter the specific Memory address (like 0x80000100) then press Enter and
Select a Particular Data type (Ex 32 bit signed integer).

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 Now double click the data near the specific memory address and enter the inputs.

 Click File  Load Program.(Ctrl + L)

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 Then double click the debug option and click out file and select the Open button.
Now program will be loaded.

 Then select Debug  Run(F5)

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