2022 13th Power Electronics, Drive Systems, and Technologies Conference (PEDSTC)

1-3 February, 2022, Shahid Behesti University, Tehran, Iran

T-type Nested Neutral Point Clamped (T-NNPC)

Multilevel Inverter: Identification and Diagnosis of
IGBT Switch Failures
2022 13th Power Electronics, Drive Systems, and Technologies Conference (PEDSTC) | 978-1-6654-2043-3/22/$31.00 ©2022 IEEE | DOI: 10.1109/PEDSTC53976.2022.9767315

Mahyar Hassanifar Milad Shamouei-Milan Yousef Neyshabouri

Faculty of Electrical and Computer Engineering Faculty of Electrical Engineering Faculty of Electrical and Computer Engineering
Urmia University Shahid Beheshti University Urmia University
Urmia, Iran Tehran, Iran Urmia, Iran
[email protected] [email protected] [email protected]

Abstract— In recent years, T-type nested neutral point each capacitor should be regulated to ensure the correct
clamped (T-NNPC) multilevel inverter has gained attention in operation of MLI and maintain the same voltage stress across
motor drive applications. A lot of insulated gate bipolar the switches [3, 4]. In [5, 6], the authors introduced a new
transistor (IGBT) switches in the converter considerably NNPC topology, which is called T-type nested neutral point
increase the probability of switch failure. In this paper, a fast clamped (T-NNPC). The T-NNPC MLI is suitable for various
and accurate approach is suggested to identify the open-circuit medium voltage and high-power applications, especially
(OC) failure of IGBT switches in a four-level T-NNPC multilevel variable speed motor drives. In T-NNPC, the number of power
inverter. Using the suggested approach, the occurrence and
devices is lower than the other alternative MLIs [6].
exact place of OC fault are determined in less than one cycle. In
the presented fault detection algorithm, the output current and The existence of several IGBT switches makes the
voltage are exploited as detection parameters, in which the reliability of the T-NNPC topology a critical issue. Also, it
predicted and desired values of output waveforms are compared should be highlighted that in T-NNPC, a single failure in an
to the actual values. Then, the dissimilarity between the IGBT not only deteriorates the output waveforms but also
observed and expected values is utilized to find the exactly failed makes the flying capacitors voltages unbalanced and increases
IGBT switch. The four-level T-NNPC multilevel inverter is the voltage stress of some switches. Finally, to prevent failure
simulated in MATLAB/Simulink environment, and the propagation, the entire inverter needs to be shut down. This
feasibility of the suggested method is demonstrated for OC fault
procedure must be implemented as fast as possible to avoid
conditions. In this regard, the effects of OC faults of switches on
additional damages that is the motivation of this research [7].
the capacitor voltages and output waveforms are investigated.
The result of applying the suggested method is shown for all the The first step to maintain the fault resiliency and continuous
switches separately. functioning of power converters is finding the exact location
of the faulty component. In MLIs, capacitors, power switches,
Keywords— fault diagnosis, OC fault, T-type nested neutral control system, gate driver circuits, and sensors are the
point clamped (T-NNPC) elements responsible for fault in the system, among which
capacitors and switches have a greater fault probability than
the others [8].
I. INTRODUCTION
Multilevel inverters are commonly utilized in medium- Open-circuit (OC) and short-circuit (SC) faults are the two
voltage (MV) and high-power applications due to their vast types of problems in IGBT switches. An SC fault can damage
advantages over two-level inverters, such as improved the system in a very short time [8]. Therefore, in MLI-based
harmonic performance and low voltage stress on switches. systems, using hardware protection such as fuses and SC fault
These features increase the capability of multilevel topologies detector gate drivers (e.g., HCPL 316) is expected. On the
in different applications and make them suitable choices in other hand, in OC faults, the systems have more time to deal
industrial applications, such as renewable energy conversion, with the consequences of fault; nevertheless, if it persists for
variable-speed motor drives (VSDs), flexible alternating a long time, it can create secondary issues such as unusual
current transmission system (FACTS), and hybrid and stress on switches and further damage to the other
electrical vehicles (HEVs) [1]. components. Thus, a quick and accurate diagnosis of OC fault
is an important issue [9].
Among the multilevel inverters, neutral point clamped
(NPC), cascaded H-bridge (CHB), and flying capacitor (FC) In [10], a fault detection procedure is presented for a 3-
topologies have become more attractive. These topologies are level T-type converter. In this research, the authors propose an
widely utilized in different applications. Therefore, many approach that exploits an average phase current as a detection
types of researches have been done on them, making them factor. Besides, voltages of DC-link capacitors help to locate
suitable to use in industrial applications [2]. the place of the faulty switch. The presented research in [11]
suggests a fault localization method for FC MLI. The state of
A new NPC-based structure, named the nested neutral charge of the flying capacitors and the expected ac side
point clamped (NNPC) MLI, was suggested in [3]. The voltage in switching states are the key factors to find a faulty
suggested inverter in [3] is formed from the FC and NPC, switch. In [12], an OC-fault in the switches of hybrid ANPC
which has unique characteristics, including operating over a is analyzed. The fault identification unit utilizes many up-
high range of voltages (2.3kV-7.2kV) without the need for counters to pinpoint the fault. Although the presented method
series power semiconductor devices, high-quality output is accurate, the high number of up-counters and the need for
voltage, and fewer number of devices compared to the existing very accurate sensors are the drawbacks of the suggested
similar topologies [3]. In NNPC topology, the voltage across detection method. In [13], the authors are benefited from the

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neural network-based fault detection unit to identify the OC Table I. Switching pattern to generate each voltage level
fault on NPC topology. The other detection method for NPC
MLI is proposed in [14]. In the suggested method of [14], the Switching Device Status Output
State
fault diagnosis algorithm exploits a voltage of DC-link S1 S2 S3 S4 S5 voltage
capacitors and output current. This method needs extra 4 1 1 0 0 0 +Vdc/2
voltage sensors on DC link capacitors. In [15], the fault 3A 0 1 0 1 0
3 +Vdc/6
detection approach is used to find a faulty switch in grid- 3B 1 0 0 0 1
connected NPC MLI, in which the line current and grid 2A 0 0 0 1 1
2 -Vdc/6
voltage are the detection parameters. The presented research 2B 1 0 1 0 0
deals with fault localization in T-NNPC for the first time. 1 0 0 1 1 0 -Vdc/2
Table II. Capacitor discharging and charging process in each
The conducted research is organized as follows: First, the switching state
topology of T-NNPC and its pre-fault working principles are
discussed in Section II. Section III analyses the influence of State Voltage of Cx1 Voltage of Cx2
each OC fault switch on the output waveforms and voltages of 4 No Impact No Impact
capacitors. Then, an OC fault diagnosis scheme is presented Discharging (ix, out > 0) Discharging (ix, out > 0)
A
based on the analysis of switching states and the expected Charging (ix, out < 0) Charging (ix, out < 0)
3
function of the T-NNPC MLI. Finally, Section IV shows the Charging (ix, out > 0)
B No Impact
simulation results to evaluate the performance of the Discharging (ix, out < 0)
introduced method. Discharging (ix, out > 0)
A No Impact
Charging (ix, out < 0)
2
II. PRE-FAULT CONDITION OF 4-LEVEL T-NNPC Charging (ix, out > 0) Charging (ix, out > 0)
B
The topology of a four-level T-NNPC is demonstrated in Discharging (ix, out < 0) Discharging (ix, out < 0)
Fig. 1. The T-NNPC MLI has formed by a combination of an 1 No Impact No Impact
FC inverter with a T-type MLI. In each leg of the T-type
NNPC, two capacitors (Cx1 and Cx2), a bidirectional switch
(Sx5), and four unidirectional switches (Sx1- Sx4) are exploited. V V −V −V 
To ensure the correct working of the T-NNPC topology, the Output Voltage   dc , dc , dc , dc  ()
 2 6 6 2 
voltages of capacitors are regulated in one-third of the voltage
of the input DC source (Vdc), as noted in (1).
III. FAULT DIAGNOSIS IN T-TYPE NNPC CONVERTER
Vdc This section presents a method to find and locate an exact
VCx1 = VCx 2 = , x = a , b, c () open-circuited switch. As a first step, it is crucial to determine
3
whether the current passes through the transistor or anti-
parallel diode of the switch. Fig. 2. illustrates the current path
The feasible switching states for each voltage level are for all voltage levels in the negative and positive output
shown in Table I. As shown in Table I, the T-NNPC MLI has current (ix, out), separately.
six switching states for four levels. The list of available
switching states is mentioned in (2). According to Table I, ix,out > 0
there are some redundant switching states, which are exploited 1
to regulate the voltage of capacitors. The redundant switching Reference signal

State 4
states are (2A, 2B) and (3A, 3B). The effect of each switching 4: Tx1 , Tx2
state on the voltages of capacitors is mentioned in Table II. 3A: Tx2, Dx4 State 2 State 3
3B: Tx1, Sx5
0
2A: Dx4, Sx5
2B: Tx1, Dx3
Phase A
State 1

1: Dx3 , Dx4
+
-1
Sx1
Vdc + (a)
2 ix,out < 0
Cx1 Sx2 1
Reference signal
State 4

ia R L
Vdc O 4: Dx1 , Dx2
ib R L
Cx2 Sx3 n
State 2 State 3

3A: Dx2, Tx4

Sx5 ic R L 3B: Dx1, Sx5
Vdc +
0
2 2A: Tx4, Sx5
Sx4 2B: Dx1, Tx3
-
State 1

1: Tx3 , Tx4

-1

(b)
Fig. 2. Conducting part of each switch during (a) positive and (b) negative
Fig. 1. T-NNPC topology
output current

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 In a faulty condition, the output current and voltage have 4-Level T-NNPC NLC
a huge difference from their expected values. Therefore, the
discrepancy between the actual and expected values of output
waveforms is used to recognize the occurrence of a fault. It
should be noted that measuring the current and voltage does
not impose additional costs on the system since the T-type Vmeasured Expected
NNPC exploits current and voltage sensors even for normal - Voltage

+
operation of the inverter because these sensors are necessary
to regulate the voltages of capacitors. It is possible to add the ix,out
voltages of capacitors as detection factors. Clearly, adding the Er
voltages of capacitors into the detection unit will increase the
degrees of freedom. However, by inserting this parameter into
the detection factors, the fault detection unit becomes more |Er|

sophisticated.
The next step is finding the accurate place of the faulty Detect the Fault Detection Unit
Current Direction
switch. To reach this goal, the explanations, details, and
impacts of an OC-fault on each switch are gathered and Current
Vmeasured Fault Detection Expected
Direction
mentioned below. The power switches in T-type NNPC are Signal Voltage

categorized into three groups, i.e., upper switches (Sx1, Sx2),

lower switches (Sx3, Sx4), and the bidirectional switch (Sx5).
Fault Localization
A. The Impacts of OC Fault on Upper Switches
Sx1 Sx5
The highest voltage level (state 4) is generated by the

•
•
•
upper switches (Sx1 and Sx2). Failure of this voltage level Fault Detection Signal of S x1-Sx5
means OC fault in one of these two switches. Additionally,
Fig. 2(a) shows the impact of OC fault in the transistor of Sx1 Fig. 3. The general scheme of the suggested fault detection method
and Sx2 when the current is positive. According to Table I,
when the OC fault occurs in Sx1, the switching states 4, 3B, and It has two main units, i.e., fault detection and fault diagnosis.
2B are missed. On the other hand, the switching states 4 and First, the fault detection signal is necessary to begin the
3A cannot be generated as an OC fault happens in Sx2. Since process of fault localization. As the variation between
state 3 is critical in balancing the voltage of Cx1, the OC fault measured and expected values of the output voltage is
in Sx1 or Sx2 makes the voltage of Cx1 uncontrollable. It is worth observed and if it is higher than a threshold value, the fault
mentioning that when an OC fault happens in Sx2 and the detection signal is produced and sent to the fault localization
system is in state 4, the positive current cannot flow from unit, where the localization process is started. As shown in
another path. Therefore, the output voltage becomes zero. On Fig. 3, expected voltage magnitude, actual real-time voltage
the other hand, in state 4 and for OC fault in Sx1, there is value, and current direction are the parameters that help the
another alternative current path. Thus, the output voltage is not fault localization unit diagnose the failed switch. The delay of
zero; however, it is reduced. Considering the above sensors and control units should be considered in
explanation is necessary to distinguish the OC fault implementing the suggested method. In Fig. 4, the function of
occurrence between the Sx1 and Sx2. the fault localization unit is detailed. In the fault localization
unit, the place of OC fault is found based on the explanations
B. The Impacts of OC Fault on Lower Switches given in subsections A, B, and C.
The lower switches (Sx3 and Sx4) act similar to the upper
IV. SIMULATION
switches for the lowest state (state 1) and negative current
values. As mentioned in Table I, when in the state 1 and ix,out<0 In this section, with the help of MATLAB/Simulink
the voltage values cannot be generated correctly, it means that software, the T-NNPC topology is simulated. One phase of the
one of the lower switches face a problem. The OC fault in Sx3 T-NNPC MLI is chosen to investigate the performance of the
affects the switching states 1 and 2B, while the states 1, 2A, suggested fault detection and localization method. The
3A are missed by an OC fault of Sx4. Therefore, according to parameters of simulated topology are listed in Table III.
Table II, the voltage of Cx2 cannot remain balanced. Similar to The OC fault is applied to each switch separately. In this
the upper switches, to make a distinction between the OC fault regard, the OC fault condition occurs manually at t=0.5 s.
of Sx3 and Sx4, the output voltage is analyzed based on the Then, the pre and post-fault output waveforms and voltages of
above explanation. The zero voltage level in state 1 is a sign capacitors are shown in Fig. 5 to Fig. 9 for Sx1-Sx5,
of OC fault in Sx3. respectively. In order to obtain a better understanding of
C. The Impacts of OC Fault on Bidirectional Switch current waveforms, they are multiplied by five.
From Fig. 1 and Table I, the bidirectional switch (Sx5) is Table III. Simulation parameters
only involved in middle switching states, i.e., states 2 and 3.
Therefore, if OC fault happens in Sx5, states 1 and 4 can be Parameter value
generated properly. This can be used to identify the failure in Frequency 50 Hz
Sx5. Input Voltage source 6900 V
Load Resistance 10 Ω
To sum it up, all the above discussions are summarized Load Inductance 15 mH
and illustrated in Fig. 3 and Fig. 4. The general scheme of the DC-link capacitors (C1 and C2) 4700 uF
proposed fault diagnosis algorithm is demonstrated in Fig. 3. Flying capacitor (FC) 4700 uF

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 fault signal is on

Fault
occurrence

Check the States

State 4 is faulty State 3&2 State 1 is faulty

is faulty

OC fault of OC fault of
NO ix,out Check State 4 & 1 ix,out NO
diodes diodes
NO NO
YES YES
State 4 State 1

OC fault of upper switches OC fault of lower switches

Is it correct ? Is it correct ?

YES YES
Output Voltage in State 4 == 0 Output Voltage in State 1 == 0

NO YES YES NO

Sx1 fault Sx2 fault Sx5 fault Sx3 fault Sx4 fault

Fig. 4. The general scheme of the suggested fault detection algorithm

In Fig. 5 and Fig. 6, the OC fault occurs in t=0.5 s for Sx1 previous section, the output voltage in state 4 is equal to zero
and Sx2, respectively. The phase voltages and currents are after the OC fault in Sx2, while for the OC fault of Sx1 the post-
demonstrated in Fig. 5(a) and Fig. 6(a). Both Fig. 5 and Fig. 6 fault voltage of state 4 is not zero. This difference between the
show that the output voltage is distorted after the OC fault has OC fault results in Sx1 and Sx2 is well-matched with Fig. 5 and
occurred. Also, as expected, the voltage of Cx1 began to drop Fig. 6. Furthermore, the fault detection signals are generated
right after the fault in Sx1 or Sx2. The voltages of capacitors are in less than one fundamental period and are depicted in Fig.
presented in Fig. 5(b) and Fig. 6(b). As mentioned in the 5(c) and Fig. 6(c).
The OC fault in the lower switches is examined in Fig. 7
and Fig. 8. In Fig. 7(a) and Fig. 8(a), the output ac side
waveforms are shown. The results after a failure occurrence
show that state 1 is missed in the OC fault of Sx3 and Sx4.
However, based on the given information in Section III and
Table I, for Sx3, the generated voltage in state 1 is exactly zero
in the faulty condition. However, it is different for Sx4. The
voltage waveforms of Fig. 7(a) and Fig. 8(a) illustrate the
mentioned difference. According to Table II, the voltage of
Cx2 becomes unbalanced after a failure in Sx3 or Sx4. As
presented in Fig. 7(b) and Fig. 8(b), the voltage of Cx2
continuously drops from its reference of 2300 V after an OC
fault in Sx3 or Sx4. Finally, based on the presented OC fault
diagnosis algorithm, the OC fault detection signal is generated
Fig. 5. Localization of OC fault in Sx1, (a) output waveforms, (b) voltages
correctly for Sx3 and Sx4, as shown in Fig. 7(c) and Fig. 8(c),
of capacitors, (c) fault detection signal respectively.

Fig. 6. Localization of OC fault in Sx2, (a) output waveforms, (b) voltages Fig. 7. Localization of OC fault in Sx3, (a) output waveforms, (b) voltages
of capacitors, (c) fault detection signal of capacitors, (c) fault detection signal

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 given about the faulty conditions. Finally, the simulation
results are demonstrated to verify the availability and
feasibility of the presented diagnosis method. The effects of
OC fault on each switch are analyzed, which are well-matched
with the theoretical claims. The results show that the fault
diagnosis strategy works appropriately for all OC fault
conditions and the diagnosis signal is correctly produced for
the faulty switch.
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