PERCIVAL: The Design and Characterisation

of a CMOS Image Sensor for Direct Detection

of Low-Energy X-rays
B. Marsh 1, D. Das 1, I. Sedgwick 1, R. Turchetta 1, M. Baye r2, J. Correa 2, P. Göttlicher 2, S. Lange 2, A. Marras 2,
I. Shevyakov 2, S. Smoljanin 2, M. Viti 2, C. B. Wunderer 2, Q. Xi a2, M. Zimmer 2, G. Cautero 3, D. Giuressi 3, R.
Menk 3, L. Stebel 3, H. Yousef 3, J. Marchal 4, U. Pedersen 4, N. Rees 4, N. Tartoni 4, H. Graafsma 5

Abstract – Free-Electron Lasers and Synchrotrons are rapidly

increasing in brilliance. This has led a requirement of large
dynamic range and high frame rate sensors that is now being
fulfilled by the PERCVIAL CMOS imager for direct X-ray
detection developed at Rutherford Appleton Laboratory.
Utilising a lateral overflow pixel and back-side illumination,
PERCIVAL simultaneously achieves low-noise single-photon
detection and high full well up to 107 e-, all while maintaining a
frame rate of 120Hz. PERCIVAL is currently in test structure
stage, and will be produced in 2 Mpixel and 13 Mpixel “wafer-
scale” variants in 2015.

I. INTRODUCTION

P
ERCIVAL (Pixelated, Energy Resolving CMOS
Imager, Versatile And Large) is a collaboration led by
Deutsches Elektronen-Synchrotron (DESY; Hamburg,
Germany) and including the wafer-scale, CMOS imager under
development at Rutherford Appleton Laboratory (RAL;
Oxford, UK), Elettra – Sincrotrone Trieste (Trieste, Italy), and
Diamond Light Source (DLS; Oxford, UK).
PERCIVAL aims at developing an instrument for high-speed
and low noise direct detection of soft X-rays. This is to
address the growing need for such sensors in the FEL and
synchrotron research areas, as peak brilliance at these facilities
is rapidly increasing, illustrated in Fig. 1.
Fig. 1: Energy Range and Peak Brilliance of FEL facilities around the world
[1].

The instrument is based around the PERCIVAL sensor

which is designed at RAL. The sensor is a fully-custom 27 µm
pitch, high dynamic range pixel, fabricated in a standard 0.18
µm CIS process using high resistivity, thick epi wafers.
Specifications for the final sensor are a sufficiently low noise
Manuscript received 20 November 2014.
to allow for single photon detection while maintaining 20 bits
1
Rutherford Appleton Laboratory, Harwell Science and Innovation Campus, dynamic range (107e- full well), and a continuous frame rate of
Didcot, OX11 0QX, UK (All authors with the CMOS Sensor Design Group, 120 Hz. The sensor will be Back-Side Illuminated (BSI), with
B. Marsh telephone: +44 1235 446 952, e-mail: [email protected]) a uniform interaction quantum efficiency of greater than 90%
2
Deutsches Elektronen-Synchrotron, Notkestraße 85, D-22607 Hamburg,
Germany over the whole pixel array, and within a target energy range
3
Elettra – Sincrotrone Trieste, Science Park 34149 Basovizza, Trieste, Italy between 0.25 and 1 keV. The sensor will also have good
4
Diamond Light Source, Diamond House, Harwell Science and Innovation performance outside this energy range, but with no exact
Campus, Didcot, OX11 0DE, UK
5
Deutsches Elektronen-Synchrotron and Midsweden University specification for the sensor. The design is produced using

978-1-4799-6097-2/14/$31.00 ©2014 IEEE

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stitching, allowing several sensor formats to be created from C0 and the diode, and then read out. S1 and S2 are then
the same mask set. Presently, the plan is for an initial device connected in turn, and each gain is then read into the sampling
with about 2 Mpixel resolution, and a later “wafer-scale” stage.
device with about 13 Mpixel resolution. The pixel is read out through a column sampling stage to a
12-bit ADC. Seven rows are read simultaneously to achieve
II. PIXEL DESIGN the desired speed and eight ADCs and sampling stages are
The pixel is designed to achieve high dynamic range with provided per column to supply some redundancy. All four
sufficiently low noise for single photon detection. Given that gains are read from the pixel and the sampling stage
W=3.6 eV/pair [2], it can be calculated that in a 250 eV X-ray determines if they are saturated or not. Only the lowest non-
interaction, just under 70 e- are produced. In order to achieve saturated value is then converted by the ADC, thus reducing
single-photon detection, a signal-to-noise ratio of around 5:1 the overall conversion time. Each ADC operates with a
is required. This means that the noise level has to be below conversion time of 7 µs. The reset value is also converted,
15e-. In PERCIVAL, this is achieved through a partially- allowing for off-chip or digital CDS in order to further reduce
pinned photodiode [3], which gives a small capacitance even the noise in the lowest gain mode. On the final sensor, the
for large diodes, along with off-chip Correlated Double digital value will then be passed through high speed
Sampling (CDS). serialisers, operating at 800 Mb/s, and read out over 400 MHz
In order to fulfil the high dynamic range and full well LVDS lines. Standard operation for the sensor is to be run in
requirement, the pixel contains a custom design based around rolling read out, allowing for the full frame to be read out at
a lateral overflow structure. The authors proposed this design 120 Hz with CDS. When operating at full speed the “wafer-
independently from the previously proposed similar design scale”, 13 Mpixel PERCIVAL will then achieve a data rate of
disclosed in [4]. In the PERCIVAL pixel, additional over 38 Gb/s.
capacitors (see Fig. 2) are added to a conventional 3T pixel, With the intended sensitivity of more than 90% in the 0.25 –
allowing for an extended full well capacity while preserving 1 keV range corresponding to an absorption length in silicon
low noise performance. These capacitors aree connected to the of 0.05 – 2 µm [5], it is crucial to use BSI-based technology as
diode through three switches that can each be held in three well as thick epitaxial layer. With a Front-Side Illuminated
different positions: on (closed), off (open), or overflow. (FSI) CMOS device, the thick passivation and embedded
metal routing would greatly reduce the sensitivity. By
reversing the device, and using the back side as the incident
surface for X-rays, the sensitivity can be increased to the
required levels. In PERCIVAL, the device is thinned to give a
12 µm, fully-depleted region. At the end of the BSI process,
the surface needs to be annealed. Laser annealing is the most
common way, but JPL [6] provide passivation by delta-doping
the surface with Molecular-Beam Epitaxy (MBE). This gives
a very uniform and shallow annealed surface for optimum low
energy X-ray detection. Native oxide provides passivation of
the surface and no anti-reflective coating was created in order
to achieve the highest absorption efficiency at the low end of
the selected energy range.
Fig. 2: PERCIVAL Pixel schematic. The in-pixel capacitors are marked as Two sensor test structures have been fabricated, each
C0, C1, and C2. Switches S0, S1, and S2 are able to be held in three states. composed of six different pixel types, giving 12 in total. These
Anti-Blooming (AB) allows for charge to leave the system if all the capacitors
are full without spilling into adjacent pixels. are known as TS1 and TS2. TS1 was designed to investigate
annular partially-pinned photodiode and related spacing, while
In overflow mode, the switches are set near threshold, so that TS2 featured standard N-well photodiodes. These were all of
only once the charge level on the preceding diode or capacitor the form of 210 rows by 160 column m s, with standard CMOS
reaches near full capacity can it “spill over” into the next output. They were both back-thinned. A third test structure
capacitor. This allows the charge collection to continue well was fabricated, known as TS3. TS3’s purpose was to test the
beyond the saturation for a standard diode of this size. By LVDS and serialiser stages, whereby 32 columns are
increasing the capacitance of each storage node, the full well multiplexed to a single LVDS output stage. A fourth test
can be made to increase by three orders of magnitude, while structure, known as TS1v2 is currently undergoing fabrication,
still maintaining the low noise needed for single-photon and is designed to investigate further reductions in noise.
detection.
When the integration time is finished, the three switches are III. TEST METHODOLOGY
then turned off, so that no further charge can be transferred Optical light tests on TS1 and TS2 were performed using a
between the nodes. Then, each node is read out in turn, bespoke test bench that comprises of an FPGA-based camera
starting with the diode. S0 is then fully connected, allowing system and LED array light source with four distinct
for the charge to be evenly distributed across the capacitance

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wavelengths: 480 nm, 540 nm, 635 nm, and 850 nm [7]. This
was lensed to provide a uniform light field over the face of the
sensor. The integration time of the sensor was then varied in
both dark and light conditions to perform an integration
sweep. Data from this was then used to produce a Photon
Transfer Curve (PTC) which provided key sensor
characteristics, such as noise, Quantum Efficiency (QE), gain,
and full well [8].
X-ray tests were performed using an Iron-55 source of
known activity incident to the interacting face of the BSI
sensor, with a 1 cm air gap. The sensor was then run with long
integration times in order to reduce the chance of split-frame
events. Using the primary emission K-alpha and K-beta [9] X-
rays allows for corroboration of the gain results from the PTC,
as well as a measure of the noise based on the spread of the Fig. 3: A full range sweep across all four gains for TS1.
Gaussian peaks.
The LVDS test structure, TS3, was tested using a similar The BSI sensor was tested using the same equipment as the
system to the other test structures. However, it instead FSI equivalent. A comparison of the QE values is shown in
focussed on using the FPGA to produce and read suitable test TABLE 2, which shows that the BSI sensor has an increase in
patterns at the necessary speeds. QE of around a factor of four which is close to expectations.

TABLE 2: THE QE% OF FSI AND BSI PERCIVAL SENSORS

IV. RESULTS
The test structures were characterised using the above Sensor Type QE (480 nm) QE (540 nm) QE (635 nm)
methods at RAL. Shown in TABLE 1 are the results for the FSI 9.48 12,33 8.81
BSI 40,43 45,91 44,25
full well of each diode and capacitor using TS1. The noise is
currently 3 e- higher than required, which is thought to come
Fig. 4 shows an example curve from the Iron-55 results for a
from the ADC. New test structures are currently being
BSI test structure, and gives comparable noise and gain to the
fabricated that have been simulated to provide lower noise.
PTC method. The calculated Gaussians on Fig. 4 combine to
TABLE I: RESULTS FROM PERCIVAL TEST STRUCTURES give the same shape as the pixel response, and are in the
correct ratios for K-alpha and K-beta.
Parameter Units Result
Noise (Diode) e- 18
Full Well (Diode) e- 2.64x104
-
Full Well (C0) e 3.56x105
Full Well (C1) e- 5.27x106
-
Full Well (C2) e 1.42x107
Dark Current (Diode) e-/s 800

Fig. 3 shows a TS1 integration sweep, with all four gains

visible. The first section with a signal level between 0 and
3000 ADU is the diode alone; then between 3000 and 7000
ADU is the diode and C0; then diode, C0 and C1; and finally
diode, C0, C1, and C2. This shows that the in-pixel gain
Fig. 4: Histogram of Iron-55 Results from a BSI test structure. The area
switching is working correctly, and that the range can be
before the peak will be comprised of any split-pixel events and background
dramatically increased using the additional capacitors. noise.

TS3 was also thoroughly tested using the FPGA system.

Shown in Fig. 5 is an eye diagram recorded at 400 MHz. The
system was also operated up to 580 MHz, the limit of the
FPGA, and was still shown to work correctly. The LVDS
output will operate at double data rate

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 Fig. 5: Eye diagram trace of TS3 operating at 400MHz and 800 Mb/s.

V. CONCLUSIONS
FEL and synchrotron facilities are continually increasing in
brilliance, and are in need of next-generation image systems to
be developed to take full advantage. PERCIVAL, a CMOS
imager designed by the CMOS Sensor Design Group at
Rutherford Appleton Laboratory for the consortium which
also includes DESY, Elettra and DLS, is aiming at providing a
high performance solution for low energy X-ray detection.
PERCIVAL is currently in the test structure phase, and
shows encouraging results for the full-scale sensor. The next
phase, the design of the 2 Mpixel sensor is underway, and
fabricated devices are expected to be available in Q2 2015.
The 13 Mpixel “wafer-scale” sensor is expected Q4 2015,
with BSI versions of both to follow.

VI. REFERENCES

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Electron Lasers: Introduction to Physical Principles, Experimental
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[2] G. F. Knoll, in Radiation Detection and Measurement, John Wiley and
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[3] A. Fenigstein, A. Lahav, T. Leitner and R. Reshef, “Enhanced X-RAY
CMOS Sensor Panel for Radio and Fluoro Application Using a Low
Noise Charge Amplifier Pixel with a Partially Pinned PD,” in
INTERNATIONAL IMAGE SENSOR WORKSHOP, Hokkaido, Japan,
2011.
[4] E. Fossum, “High dynamic range cascaded integration pixel cell and
method of operation”. United States of America Patent 7990449, 2 August
2011.
[5] M. Green and M. Keevers, “Optical properties of intrinsic silicon at 300
K,” Progress in Photovoltaics: Research and Applications, vol. 3, no. 3,
pp. 189-192, 1995.
[6] S. Nikzad, “Delta doping Technology for Back illuminated CMOS and
CCD Imagers,” in International Image Sensor Workshop, Bergen,
Norway, 2009.
[7] aSpect Systems GmbH, [Online]. Available: http://www.aspect-sys.com/.
[8] J. Janesick, Photon Transfer, SPIE Press, 2007.
[9] International Atomic Energy Agency, Update of X Ray and Gamma Ray
Decay Data Standards for Detector Calibration and Other Applications
(Volumes 1 and 2), IAEA Publications.

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