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EO102 Tutorial 1 Solution

The document provides solutions to various questions related to diode behavior, including calculations for forward current, reverse saturation current, and voltage drops under different conditions. It also includes circuit analysis using Kirchhoff's voltage law (KVL) for ideal diodes, exploring scenarios of forward and reverse bias. Additionally, it discusses the output of a logic OR gate with ideal diodes based on input signals.

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0% found this document useful (0 votes)
41 views9 pages

EO102 Tutorial 1 Solution

The document provides solutions to various questions related to diode behavior, including calculations for forward current, reverse saturation current, and voltage drops under different conditions. It also includes circuit analysis using Kirchhoff's voltage law (KVL) for ideal diodes, exploring scenarios of forward and reverse bias. Additionally, it discusses the output of a logic OR gate with ideal diodes based on input signals.

Uploaded by

princejha987654
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© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
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Solutions

TUT-01, EO-102
January 25, 2024

Question 1: A Ge diode (Empirical constant η = 1) is operated


at a junction temperature of 27◦ C. For a forward current of 10mA,
the voltage drop across the diode VD is found to be 0.3V. (a) If VD is
0.4V, find the forward current
(b) the reverse saturation current Is
(c) Repeat both the questions for a temperature of 40◦ C.
Solution:

η = 1, If = 10 mA, VD = 0.3V, T= 270 C = 300K

Diode current equation (relating diode current and diode voltage) is :


VD
If = Is (e ηVT − 1)
kT
Here, VT = q where k is the boltzman constant, q is the charge of an electron

and T is the temperature


VT = 25.87 mV @ 300K

(b) To find the reverse saturation current:

If
Is = VD (1)
e ηVT
−1
10
= 0.3 (2)
e 1⋆0.02587 −1
10
= (3)
1.03 ⋆ 105
= 91nA (4)

a) To find If when VD = 0.4V


0.4
If = 91 ⋆ 10−9 (e 0.02587 − 1) (5)
If = 477.3mA (6)

c) at 400 C
η = 1, If = 10 mA, VD = 0.3V, T= 400 C = 313K

1
−23
VT @400 C = KT
q =
1.38⋆10 ⋆313
1.6⋆10−19
VT @400 C = 27mV

If
Is = VD (7)
e ηVT
−1
10
= 0.3 (8)
e 1⋆0.027 −1
10
= (9)
6.6909 ⋆ 104
= 149nA (10)

0.4
If = 149 ⋆ 10−9 (e 0.027 − 1) (11)
= 404mA (12)

Question 2: In the following questions, assume that the diode is


ideal (has zero resistance but has a voltage drop of 0.7V in forward
biased condition. Find the values of the labeled voltages and currents
in Figure. 1.

Figure 1:

Solution:

Under closed circuit test, let diodes D1 and D2 be Forward biased i.e. closed
circuit.

2
Applying KVL across D1 as shown in Figure.1

10 − 10I − 0.7 = 0

I = 0.93mA

Now applying KVL across diode D2 as shown in Figure.1

10 − 10I − 0.7 − 5.I2 = −5

I2 = 1mA

I1 = I − I2 = −0.07mA

Since, current through D1 is negative, the initial assumption is wrong. There-

fore, assume D1 is R.B and D2 is F.B.


Therefore, equivalent circuit is shown in Figure.2 below.

Applying KVL in Figure.2 circuit:

Figure 2:

10 − 10I − 0.7 − 5I = −5

I = 0.95mA

I2 = I = 0.95mA

3
I1 = 0

V2 = 0.7V

V1 = 0

V = 5I − 5 = −0.25V

Question 3: Plot Vo vs Vi for Vi ranging from 5V to 5V in steps of


0.5V in Figure: 3.

Figure 3:

Solution:
Let the diode is OFF, replace diode with open circuit. Let the voltage drop
across diode be Va .
By voltage division rule:

V0 = Vi /2
Va = Vi /2

The cutoff voltage of diode is 0.7V.

Diode will be ON for Va > 0.7V , implies Vi > 1.4V

So,

Case:1 For Vi < 1.4V , diode is OFF. Vo = Vi /2

Case:2 For Vi > 1.4V , diode is ON. Vo = Vi − 0.7

Resultant waveform is shown in Figure.6

4
Figure 4: R.B Diode

Figure 5: F.B Diode

Question 4: Find the currents through the diodes D1 and D2 in


Figure.7? Consider ideal diodes.

Solution:
Let D1 and D2 be FB.
Applying KVL in loop 1

10 − 0.7 − 4i1 − 6(i1 + i2 ) = 0

10i1 + 6i2 = 9.3 −→ equ.1

Applying KVL in loop 2

4 = 0.7 + 6(i1 + i2 )

3.3 = 6i1 + 6i2 −→ equ.2

On Solving,

4i1 = 9.3 − 3.3


3.3−9
i1 = 1.5mA, i2 = / 6 mA

5
Figure 6:

Figure 7:

Since, i2 is negative and i1 is positive

Therefore, the initial assumption that the both the diodes are forward biased

is wrong. Now, assume D2 −→ RB, open circuit.


D1 −→ F B, closed circuit.

Therefore,

i2 = 0
10−0.7
i1 = 10KΩ = 0.93mA

Q5. Find iD1 and iD2 in Figure 8. Repeat the calculation for
V1 = −1V. Consider ideal diodes.

Solution:

Case 1: Closed loop test

6
Figure 8:

Let both the diode D1 and D2 be forward biased.


Applying KVL in loop 1
5 − 500(iD1 + iD2 ) − 5 = 0
iD1 + iD2 = 0

Applying KVL in loop 2


5 − 500(iD1 + iD2 ) − 3 = 0
iD1 + iD2 = 4 mA ————-(1)

Both the conditions cannot be satisfied together. Hence both the diodes cannot
be forward biased.

Figure 9:

Case 2: open loop test:


Let Both the diode D1 and D2 be reverse biased. i.e. open circuited
is = iD1 + iD2 = 0 ————–(2)

7
iD1 = 0 and iD2 = 0
VD1 = 0 and VD2 = 2 V
Case 3: Diode 1 is RB and Diode 2 is FB Though this is valid, to get
current of non-zero magnitude, assume diode D2 is forward bised and Diode D1
in reverse biased condition
i.e. iD1 = 0 and iD2 = 5−3
500 = 4 mA

If v1 = −1 V:
Let both the diode D1 and D2 be forward biased.
Applying KVL in loop 1
−1 − 500(iD1 + iD2 ) − 5 = 0
iD1 + iD2 = 6 mA

Applying KVL in loop 2


5 − 500(iD1 + iD2 ) − 3 = 0
iD1 + iD2 = 4 mA ————-(1)

This is not valid.


Assume Diode D1 is forward biased and Diode D2 is reverse biased
iD2 = 0 and iD2 = 5−(−1)
500 = 12 mA

Q6. The logic OR gate can be utilized to fabricate composite


waveforms. Sketch the output Vo of the gate of Figure 10 (a) if the
three signals of (b) are impressed on the input terminals. Assume
that diodes are ideal.

Solution:
Considering Ideal Diode (OR Gate)

When any diode gives high output, makes the other two diode reverse bias.
Hence diode that gives high, will prevail in the output
D1 −→ ON (Forward Biased) for t= 0 to 0.5 and t=2.5 to 3 (D2 and D3 are
reverse Biased)
D2 −→ ON (Forward Biased) for t= 0.5 to 1 and t=2 to 2.5 (D1 and D3 are
reverse Biased)
D3 −→ ON (Forward Biased) for t= 1 to 2 and t=2 to 2.5 (D1 and D2 are
Reverse Biased)

8
Figure 10:

Figure 11: output graph

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