Chapter 13: Basic Op-Amp

Circuits

 In the last chapter, you learned about the principles, operation, and
characteristics of the operational amplifier.
 Op-amps are used in such a wide variety of circuits and
applications that it is impossible to cover all of them in one chapter,
or even in one book. Therefore, in this chapter, four fundamentally
important circuits are covered to give you a foundation in op-amp
circuits.
 The basic circuits for op-amp’s are
1- Comparators
2- Summing Amplifiers
3- Integrators and Differentiators
 13.1: Comparators
 A comparator is a specialized nonlinear op-amp circuit
that compares between two input voltages and produces an
output state that indicates which one is greater. Comparators
are designed to be fast and frequently have other capabilities
to optimize the comparison function.
 In this application, the op-amp is used in the open-loop
configuration, with the input voltage on one input and a
reference voltage on the other.

13.1: Comparators
 One application of an op-amp used as a comparator is to determine
when an input voltage exceeds a certain level Sin wave
Zero-Level Detection

 The figure shown is the zero-

level detector circuit; the inverting
(-) input is grounded to produce a
zero level (reference to compare
with), and the input signal voltage is applied to the noninverting (+) input
 Since Vin is at noninverting input As shown in figure;
Any Vin above the zero will produce a +ve saturated output (+Vout(max))
 any Vin below the zero will produce a –ve saturated output (-Vout(min))
 Saturation of the output is due to the open-loop op-amp that have a very
high voltage gain  very small difference voltage between the two inputs
drives the amplifier into saturation (non linear operation)
13.1: Comparators
Nonzero-Level Detection
 The reference voltage can be set to non zero voltage (+ve ot -ve) by
adding a dc voltage or voltage divider or zener or ….

VREF = VDC VREF = VZ

 As shown in the output voltage for

given input (sinewave)
Any voltage above VREF  Vout will
be saturated +ve (Vout(max))
 Any voltage Below VREF  Vout
will be saturated -ve (Vout(min))

13.1: Comparators
Nonzero-Level Detection: Example
For the given comparator and input signal, draw the output
showing its proper relationship to the input signal. Assume the
maximum output levels of the comparator are ; ±14 V.
 13.1: Comparators
Effects of Input Noise on Comparator Operation
In many practical situations, noise (unwanted voltage fluctuations)
appears (superimposed) on the input line  we will have an
erratic (‫ )شاذ‬output voltage

 When the sine

wave approaches 0,
the fluctuations due
to noise may cause
the total input to vary
above and below 0
several times, thus
producing an erratic
output voltage as
shown

13.1: Comparators
Reducing Noise Effects with Hysteresis
 Hysteresis is incorporated by adding regenerative (positive) feedback,
which creates two switching points: the upper trigger point (UTP) and the
lower trgger point (LTP). After one trigger point is crossed, it becomes
inactive and the other one becomes active.
When Vout is +Vout(max)  UTP is set by When Vout is -Vout(max)  LTP is set by

 When Vin exceeds UTP, the output  When Vin goes below LTP, the output
switches to the -Vout(max) switches to the + Vout(max)
13.1: Comparators
Reducing Noise Effects with Hysteresis
 Hence, the device triggers only once
when UTP or LTP is reached as shown;
thus, there is immunity to noise that is
riding on the input signal.
 The amount of hysteresis is
defined by the difference of the two
trigger levels.

 A comparator with built-in

hysteresis is sometimes known as a
Schmitt trigger.

13.1: Comparators
Reducing Noise Effects with Hysteresis: Example
Determine the upper and lower trigger points for the comparator
circuit in figure. Assume that +Vout(max) = +5 V and - Vout(max) = -5V.
13.1: Comparators
Output Bounding
 In some applications, it is necessary to limit the output voltage levels of a
comparator to a value less than that provided by the saturated op-amp.
 A process of limiting the output called bounding can be used by adding a
single zener diode to limit the output voltage to the zener voltage in one
direction and to the forward diode voltage drop in the other direction.

 If zener anode is connected to inverting input (virtual ground, V =

0)  when Vout is +ve, zener is reverse  Vout = +VZ
When Vout is –ve, zener is forward Vout = -0.7V
 positive bounded output

13.1: Comparators
Output Bounding
 If zener is reversed, the result will be the inverse  negative
bounded out put

 Positive and negative bounded out put can be obtained by putting

two back to back zeners as shown
 13.1: Comparators
Output Bounding: Example
Determine the output voltage waveform

We have zener diodes between input

and output  Bounded output.
But we have feedback to (+) op-amp input 
we have also hysteresis voltages
Since input voltage is at inverting (-) input  V at (–) = V at (+) =
hysteresis voltage  Hence Vout will be Vzeners + Vhysterisi
At + ve Vout  +Vout = VUPT + Vz2 + 0.7= VUPT + 5.4
R2 47
But VUPT  (Vout )  (Vout )  0.32(Vout )
R2  R1 147
 Vout  0.32(Vout )  5.4
 Vout  7.94 V
Same can be found when Vout is –ve
 -Vout = -7.94 V

13.1: Comparators
Comparator Applications
Over-Temperature Sensing Circuit
For the shown bridge, R3 = R4 and R1
is high (> R2) at normal temperatures
 V at (+) is lower than V at (-).
 As the temperature increases, the
resistance of the thermistor (R1)
decreases  V at (+) input increase.
When the temperature reaches the
critical value, R1 becomes equal to R2,
and the bridge becomes balanced (since
R3 = R4) . At this point the op-amp Vout
switches from low to its high saturated
output level, turning Q1 on. This
energizes the relay, which can be used
to activate an alarm or initiate an
appropriate response to the over-
temperature condition.
 13.1: Comparators
Comparator Applications
Analog-to-Digital (A/D) Conversion
 Simultaneous or flash analog-to-digital
converters (ADC) use 2n-1 comparators to
convert an analog input to a digital value (n-
digit binary number) for processing. Flash
ADCs are a group of comparators connected
in parallel, each with a slightly different
reference voltage. The priority encoder
produces an output equal to the highest value
input.
 The reference voltage for each comparator is
set by the resistive voltage divider circuit and
VREF. The output of each comparator is
connected to an input of the priority encoder.
The priority encoder is a digital device that
produces a binary number on its output The encoder samples its input
when a pulse occurs on the
representing the highest value input
enable line (sampling pulse)

13.1: Comparators
for the input signal in Figure below
Determine the binary number
sequence of the three-digit
simultaneous ADC (Figure shown
before). Draw the resulting digital
output waveforms. VREF = +8V

Digital numbers: 011, 101, 110, 110, 100, 001, 000, 001, 010, 101, 110, 111
 13.2: Summing Amplifiers
 The summing amplifier is an application of the inverting op-amp covered in
Chapter 12. The averaging amplifier and the scaling amplifier are variations of
the basic summing amplifier.
Summing Amplifier with Unity Gain
 A summing amplifier has two or more inputs; normally all inputs have
unity gain. The output is proportional to the negative of the algebraic sum
of the inputs.

For unity gain inverting amplifier

In general, for n inputs 

13.2: Summing Amplifiers

Summing Amplifier with Unity Gain: Example

Determine the output voltage in Figure

 13.2: Summing Amplifiers
Summing Amplifier with Gain Greater Than Unity
 When Rf is larger than the input resistors, the amplifier has a gain
of Rf /R, where R is the value of each equal-value input resistor. The
general expression for the output is

Example: Determine the output voltage for the summing amplifier shown

13.2: Summing Amplifiers

Averaging Amplifier
 An averaging amplifier is basically a summing amplifier with the gain
set to Rf /R = 1/n (n is the number of inputs). The output is the negative
average of the inputs.
Example: Show that the amplifier
in Figure produces an output
whose magnitude is the
mathematical average of the input
voltages.
13.2: Summing Amplifiers
Scaling Adder
 A scaling adder has two or more inputs with each input having a
different gain. The output represents the negative scaled sum of the inputs.
the output voltage
can be expressed as
Example: Determine the weight of each input voltage for the
scaling adder in Figure and find the output voltage.

13.2: Summing Amplifiers

Applications: Digital to analogue convertor (DAC)
 An application of a scaling adder is the D/A converter circuit shown
here. the method shown here is useful only for small DACs.
 The resistors are inversely proportional to the binary column weights
(The lowest-value resistor R corresponds to the highest weighted binary
input (23). All of the other resistors are multiples of R and correspond to
the binary weights 22, 21, and 20.

 The inverting input is at

virtual ground, and so the output
voltage is proportional to the
current through the feedback
resistor Rf (sum of input
currents)  Vout = -IRf
13.2: Summing Amplifiers
Applications: Digital to analogue convertor (DAC): Example
Determine the output voltage of the DAC for the four digit sequence binary
codes shown, that are applied to the inputs. A high level is a binary 1, and a low
level is a binary 0. The least significant binary digit is D0.

For each input digit, we can calculate the current when it is at high (1) level at +5V

For each input digit, we have a corresponding digit output voltage

13.2: Summing Amplifiers

Applications: Digital to analogue convertor (DAC):
Example – continued from previous
 Hence for any given digital value, the output will be the sum of corresponding
digit output voltage:
input Addition of digit Total Output voltage versus input digital binary data
voltages (Vout)
0000 0-0-0-0 0
0001 0-0-0-0.25 -0.25
0010 0-0-0.5-0 -0.5
0011 0-0-0.5-0.25 -0.75
0100 0-1-0-0 -1
0101 0-1-0-0.25 -1.25
0110 0-1-0.5-0 -1.5

1111 2-1-0.5-0.25 -3.75

 13.2: Summing Amplifiers
Applications: Digital to analogue convertor (DAC):
 A more widely used method for D/A conversion is the R/2R ladder. The gain
for D3 is 1. Each successive input has a gain that is half of previous one. The
output represents a weighted sum of all of the inputs (similar to the scaling adder).
 the output voltage
is proportional to the
binary weight of the
input bits

With D3 = 1 (+5V) and D2 = 0, D1 = 0, D0 = 0  For circuit befor

D3 input (befor R7)  the equivalent resistor can be calculated to
be equal to 2R  Current pass through R7 = 2R and
feedback resistor Rf = 2R  unity
gain  Vout = -Vin = -5V

13.2: Summing Amplifiers

Applications: Digital to analogue convertor (DAC):
 With D2 = +V  if we thevinize the circuit before R8  we will have RTH = R
and VTH = +2.5 (= +5/2). Again with unity gain  Vout = -Vin = -VTH = -2.5V  gain
for D2 = ½ gain for D3
 With D2 = 1 (+5V) and D3 = 0, D1 = 0, D0 = 0  Vout = -2.5

This process is repeated for other inputs

 With D1= 1 (+5V) and D3 = 0, D2 = 0, D0 = 0  Vout = -1.25 V
 With D1= 1 (+5V) and D3 = 0, D2 = 0, D0 = 0  Vout = -0.625 V
 Hence, for different digital data input  The output represents a weighted sum
of all of the inputs (similar to the scaling adder).
 13.3: Integrators and differentiators
An op-amp integrator simulates mathematical integration, and
differentiator simulates mathematical differentiation.
The Op-Amp Integrator: Ideal integrator
 The ideal integrator is an inverting amplifier that has a capacitor in the
feedback path. The output voltage is proportional to the negative integral
(running sum) of the input voltage.
For capacitor (current charge relation)
Also charge on capacitor is

Since Vin is constant  Ii = Vin/Ri = IC is constant

Hence IC/C is constant  is an equation of a straight line with a

constant slope IC/C .
Vout = -VC, because (-) input of op-amp is virtual ground
output change or slope of the integrator

13.3: Integrators and differentiators

The Op-Amp Integrator: Ideal integrator
 As you can see the output voltage is the time integral of input voltage as
also shown below

dq  Idt , But also dq  CdV

 CdVC  I C dt , Integrate both sides
  CdVC   I C dt
But I C  I i  Vin / Ri
Vin
 CdV C 
Ri
dt

Vin
 Vout   t ( ve sign is added for inverting output)
Ri C
13.3: Integrators and differentiators
The Op-Amp Integrator: Ideal integrator -Example
(a) Determine the rate of change of the output voltage in response to the input
square wave, as shown for the ideal integrator in Figure The output voltage is
initially zero. The pulse width is 200μs
(b) Describe the output and draw the waveform.
(a) When (a) in is +ve (+2.5 V)

 For 200 μs width, ΔVout = -25 mv/μs (200 μs) = -5V

When (a) in is -ve (-2.5 V) (b)

ΔVout = -25 mv/μs (200 μs) = 5V

13.3: Integrators and differentiators

The Op-Amp Integrator: Practical integrator
 Op-amp integrating circuits must have extremely low dc offset and bias
currents, because small errors are equivalent to a dc input. The ideal
integrator tends t o accumulate these errors, which moves the output
toward saturation (high infinite open loop gain because C is open to dc).
 The practical integrator overcomes these errors– the simplest method
is to add a relatively large feedback resistor Rf Relatively very small
error compared to integrator without Rf.
Also we may add Rc to (+) input to
balance the effect of bias current

 Calculations will be same as

for ideal integrators
 13.3: Integrators and differentiators
The Op-Amp Differentiator
 The ideal differentiator is an inverting amplifier that has a capacitor
in the input path. The output voltage is proportional to the negative rate
of change of the input voltage.
In this case, Vin = VC is
linearly increase with time
From basic capacitor
relation 

The output voltage is Because I through the

op-amp = 0

Which is constant (as shown) because the

slope = dVin/dt = VC/t = Vin/C is constant
Note that RfC is the RC circuit time constant

13.3: Integrators and differentiators

The Op-Amp Differentiator: Ideal differentiator - Example
Determine the output voltage of the ideal op-amp differentiator in Figure for
the triangular-wave input shown.

In 5μs, Vin changes from -5V to +5V

 slope

The time constant is

For the –ve slope input voltage 

13.3: Integrators and differentiators
The Op-Amp Differentiator: Practical differentiator
The very low reactance of C at high frequencies means an ideal
differentiator circuit has very high gain for high-frequency noise. To
compensate for this, a small series resistor is often added to the input.
This practical differentiator has reduced high frequency gain and is less
prone to noise.

Also we may add Rc to (+) input to

balance the effect of bias current

 Calculations will be same as

for ideal differentiator