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Wallace_Tree

The document discusses carry-save addition, which allows the addition of three n-bit numbers in constant time by reducing it to adding two numbers. It explains the operation of a carry-save adder that produces an n-bit number and an (n + 1)-bit number, enabling efficient parallel computation. Additionally, it introduces Wallace-tree multipliers that utilize carry-save adders to reduce the summation of multiple n-bit numbers, allowing for faster multiplication in logarithmic time.

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0% found this document useful (0 votes)
2 views

Wallace_Tree

The document discusses carry-save addition, which allows the addition of three n-bit numbers in constant time by reducing it to adding two numbers. It explains the operation of a carry-save adder that produces an n-bit number and an (n + 1)-bit number, enabling efficient parallel computation. Additionally, it introduces Wallace-tree multipliers that utilize carry-save adders to reduce the summation of multiple n-bit numbers, allowing for faster multiplication in logarithmic time.

Uploaded by

nabirasula2004
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© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
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Download as PDF, TXT or read online on Scribd
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29.2.

3 Carry–save addition:

A carry–lookahead adder can add two n–bit numbers in O(lg n) time. Perhaps
surprisingly, adding three n–bit numbers takes only a constant additional
amount of time. The trick is to reduce the problem of adding three numbers to
the problem of adding just two numbers.

Given three n–bit numbers x = xn-1, xn-2, . . . , x0 , y = yn-1, yn-2, . . . , y0 ,


and z = zn-1,zn-2, . . . , z0 , an n–bit carry–save adder produces an n–bit
number u = un-1, un-2, . . . , u0 and an (n + 1)-bit number v = vn, vn-1, . . . , v0
such that

u + v = x + y + z.

As shown in Figure 29.11 (a), it does this by computing

ui = parity (xi, yi, zi),


vi + 1 = majority (xi, yi, zi),

for i = 0, 1, . . . , n - 1. Bit v0 always equals 0.

The n–bit carry–save adder shown in Figure 29.11(b) consists of n full


adders FA0, FA1, . . . , FAn - 1. For i = 0, 1, . . . , n - 1, full adder FAi takes
inputs xi, yi, and zi. The sum-bit output of FAi is taken as ui, and the carry–out
of FAi is taken as vi+1. Bit v0 is hardwired to 0.

Since the computations of all 2n + 1 output bits are independent, they can be
performed in parallel. Thus, a carry–save adder operates in (1) time and
has (n) size. To sum three n–bit numbers, therefore, we need only perform a
carry–save addition, taking (1) time, and then perform a carry–lookahead
addition, taking O(lg n) time. Although this method is not asymptotically better
than the method of using two carry–lookahead additions, it is much faster in
practice.
Figure 29.11 (a) Carry–save addition. Given three n–bit numbers x, y, and z,
we produce an n–bit number u and an (n + 1) –bit number v such that x + y +
z = u + v. The ith pair of shaded bits are a function of xi, yi, and zi. (b) An 8–bit
carry–save adder. Each full adder FAi takes inputs xi, yi, and zi and produces
sum bit ui and carry–out bit vi + 1. Bit v0 is hardwired to 0.

Exercises

29.2-1

Let a = 01111111 , b = 00000001 , and n = 8. Show the sum and carry bits
output by full adders when ripple-carry addition is performed on these two
sequences. Show the carry statuses x0, x1, . . . , x8 corresponding to a and b,
label each wire of the parallel prefix circuit of Figure 29.9 with the value it has
given these xi inputs, and show the resulting outputs y0, y1, . . . , y8.
29.3.2 Wallace–tree multipliers

A Wallace–tree is a circuit that reduces the problem of summing n n–bit


numbers to the problem of summing two (n)–bit numbers. It does this by
using [n/3] carry–save adders in parallel to convert the sum of n numbers to
the sum of [2n/3] numbers. It then recursively constructs a Wallace–tree on
the [2n/3] resulting numbers. In this way, the set of numbers is progressively
reduced until there are only two numbers left. By performing many carry–save
additions in parallel, Wallace–trees allow two n–bit numbers to be multiplied
in (1g n) time using a circuit with (n2) size.

Figure 29.16 shows a Wallace–tree2 that adds 8 partial products m(0), m(1), . . .
, m(7). Partial product m(1) consists of n + i bits. Each line represents an entire
number, not just a single bit; next to each line is the number of bits the line
represents. The carry–lookahead adder at the bottom adds a (2n – 1)–bit
number to a 2n–bit number to give the 2n–bit product.
2
As you can see from the figure, a Wallace tree is not truly a tree, but rather a
directed acyclic graph. The name is historical.

Figure 29.16 A Wallace–tree that adds n = 8 partial products m(0), m(1), . . . ,


m(7). Each line represents a number with the number of bits indicated. The
left output of each carry–save adder represents the sum bits, and the right
output represents the carry bits.

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