22ES14C

USN

RV COLLEGEOF ENGINEERING"
(An Autonomous Institution affiliated to VTU)
ISemester B. E. Examinations May-2023
Common to A/AS/ BT/W/CSTCY/CDI EE/ IM/IS/ MEI CV
PRINCIPLES OF ELECTRONICS ENGINEERING (ELECTIVE)
Time: 03 Hours Maximum Marks: 100
Instructions to candidates:
1. Answer all qucstions from Part A. Part Aquestions should be answered
in first three pages of the answer book only.
2. Answer FIVE full questions from Part B. Question number 2 is
compulsory. Ch00se any one full question from 3 or 4, 5 or 6, 7 or 8 and
Oor 10

PART-A
1.1 The output voltage of a regulated DC power supply changes from 20V
to 19.7 Vwhen the load is increased from zero to maximum. Then the
load regulation is 02
1.2
Atransistor amplifier connected in CE mode has the value of Bas 100
and IB as 50uA, then the value of l and a are and
respectively. 02
1.3
An amplifier has a voltage gain of 100 at 1KHz. The gain falls by 6dB
at 1MHz. If the input is 3mW at 2MHz, then the output voltage is
02
1.4 In an RC phase shift oscillator using an ideal voltage amplifier, the
frequency of oscillation is 2KHz. If R=6.259, the value of c is
01
1.5 A non-inverting amplifier using an op-amp has Ri= 10K2 and
R= 40KQ. The closed loop gain is 01
1.6 An operational amplifier has a differential gain of 100 arnd a common
mode gain of 0.01.Then its CMRR is dB. 01
1.7 The ones's complement of 01011 is 01
1.8 The decimal equivalent of (321)s is 01
1.9 The minimum number of NOR gates required to realize X0R gates is
01
1.10 For an AM signal, the bandwidth is 10KHz and the highest frequency
component present is 705KHz. The carrier frequency used for this AM
signal is 02
1.11 A carrier of peak voltage 15 V is used to transmit a message signal. If
the modulation index is 70%, then the peak voltage of the modulating
signal is 01
1.12 The carrier amplitude after AM varies between 4V and 1V. The depth
of modulation is
01
1.13 A 400W carrier is modulated to a depth of 75%. Assuming the
modulating signal to be sinusoidal, the total power in the amplitude
modulated wave is 01
1.14 A part of the transducer which responds to a change in the
phenomenon is called
physical
01
 exhibit Piezo-cleetric qualities are called
1.15 The clements which 01
mcasure a magnetic field or
transducer is used to
1.loA Hall effect slab of 2mm thickness with a Hall coefficient of
0.5wb/n2, Bìsmuth current 3A is used. Then the
wb/m ). and
1*10 \m/(A- 01
corresponding outputvoltage is
PART-B

full wave bridge rectifier and describe its

Draw the cireuit of a 06
Waveforms.
working with suitable 2b, design the value of R, sO
regulator circuit shown in Fig
In a Zener satistactorily under all given conditions.
that the circuit performs
Vz= 5.6V.
Im1n = 5mA, Pamay = 2.5 W and
w
,

06
Fig 2b
An amplifier having a power gain of 17dB delivers a power output of
40W to a load of 1KQ. Calculate
i) The input power needed
i) The input voltage needed 04
Assume voltage gain of the amplifier is 38dB.
the
3 a Draw the circuit of an integrator using an op-amp and derive 06
expression for the output voltage.
b Calculate the output voltage of a three-input summing amplifier
shown in Fig 3b

R. 200K
V,=-2V w
V +2V
RS00
V= 1V

Fig 3b 06
Mention any four advantages of negative feedback. 04
C

OR

4 Explain the operation of RC phase shift oscillator with a neat diagram 06

and also mention the gain equation.
b Design a scaling adder circuit using an op-amp to obtain an output
expression. Vo= -(3V1+4V2+SV3) where Vi, V2, V3 are the inputs. 05
Assume the value of feedback resistor as 10KQ.
Draw the circuit of a differentiator using an op-amp. Derive the 05
expression for the output voltage.
 5 a Write the truth table for SUM and
truth table, obtain the logic CARRY0UT of a full adder. From the
exprcssions for the same and then realize
the full adder using 2 half adders.
b Simplify the logic expression and implement the logic 05
NOR Gate. circuit using
Y= (A +B + C)(A + B+ CO(A+ B)
05
Simplify the logic expression using K nap and
circuit using NAND Gate. implement the logic
F(4, B, C,D) = En (0,1,3,5,7,8,9, 11,13,15) 06

OR

Simplify the logic expression and implement the logic circuit using
NAND Gate
Y = (A+ B + C)(A + B + C)(A + B) 06
b Simplify the logic expression using K map and implement the logic
circuit using basic Gates.
F(A,B, C, D) = Em(0,1,2,5,7,8,9,1 0,13,15) 06
Realize the EX- NOR function using a minimum number of NOR gates
only. 04

7 With the help of a neat block diagram explain the working of a

Superheterodyne receiver. 06
b A carrier of 2MHz has 1KW of its power amplitude modulated with a
sinusoidal signal of 2KHz. The depth of modulation is 60%. Calculate
the sideband frequencies, bandwidth, power in sidebands, total
power, and efficiency. 06
C Write any four differences between Harvard and Von-Neumann CPU
architecture. 04
OR

8 a
With the help of a block diagram, explain the working of a digital
communication system. 06
b For an AM signal VAM = 10(1 + 0.5sin6280t)sin(62.8x 106t). Calculate
the sideband frequencies, bandwidth, amplitude of each sideband,
Total power, and efficiency. 06
C
List any four differences between RISC and CISC. 04

a
With the help of a neat diagram, discuss the working principle of
LVDT. 08
b Explain the working principle of ultrasonic sensors and Humidity
sensors mentioning their respective applications. 08

OR

10
Explain the working of a piezo-Electric Transducer with relevant 06
equations.
06
Briefly explain the working of capacitive transducers.
04
C
Mention any four differences between active and passive transducers.