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lecture_slides_01_011-preliminaries

The document outlines a roadmap for understanding memory, data, and machine code, focusing on C and Java programming languages. It covers topics such as memory organization, data manipulation, assembly language, and performance considerations in computer systems. Additionally, it discusses binary representations and the electronic implementation of data storage.

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yihuangece
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4 views8 pages

lecture_slides_01_011-preliminaries

The document outlines a roadmap for understanding memory, data, and machine code, focusing on C and Java programming languages. It covers topics such as memory organization, data manipulation, assembly language, and performance considerations in computer systems. Additionally, it discusses binary representations and the electronic implementation of data storage.

Uploaded by

yihuangece
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PDF, TXT or read online on Scribd
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University

 of  Washington  

Roadmap   Memory  &  data  


Integers  &  floats  
Machine  code  &  C  
C:   Java:  
x86  assembly  
car *c = malloc(sizeof(car)); Car c = new Car(); Procedures  &  stacks  
c->miles = 100; c.setMiles(100); Arrays  &  structs  
c->gals = 17; c.setGals(17);
float mpg = get_mpg(c); float mpg =
Memory  &  caches  
free(c); c.getMPG(); Processes  
Virtual  memory  
Assembly   get_mpg: Memory  allocaIon  
language:   pushq %rbp Java  vs.  C  
movq %rsp, %rbp
...
popq %rbp
ret
OS:  
Machine   0111010000011000
100011010000010000000010
code:   1000100111000010
110000011111101000011111

Computer  
system:  

Preliminaries  
University  of  Washington  

SecIon  1:  Memory,  Data,  and  Addressing  


¢ Preliminaries  
¢ RepresenIng  informaIon  as  bits  and  bytes  
¢ Organizing  and  addressing  data  in  memory  
¢ ManipulaIng  data  in  memory  using  C  
¢ Boolean  algebra  and  bit-­‐level  manipulaIons  

Preliminaries  
University  of  Washington  

Hardware:  Logical  View  

CPU Memory

Bus

Disks Net USB Etc.

Preliminaries  
University  of  Washington  

Hardware:  Semi-­‐Logical  View  

Preliminaries  
University  of  Washington  

Hardware:  Physical  View  

Preliminaries  
University  of  Washington  

CPU  “Memory”:  Registers  and  InstrucIon  Cache  


Transparent
(hardware-controlled)
instruction caching
Registers

Instruction
Cache
Memory
Program-controlled
data movement

CPU

l There  are  a  fixed  number  of  registers  in  the  CPU  


l Registers  hold  data  
l There  is  an  I-­‐cache  in  the  CPU  that  holds  recently  fetched  instrucIons  
l If  you  execute  a  loop  that  fits  in  the  cache,  the  CPU  goes  to  memory  for  
those  instruc<ons  only  once,  then  executes  them  out  of  its  cache  
l This  slide  is  just  an  introduc1on.    
We'll  see  a  fuller  explana1on  later  in  the  course.  
Preliminaries  
University  of  Washington  

Performance:  It's  Not  Just  CPU  Speed  


¢ Data  and  instrucIons  reside  in  memory  
§ To  execute  an  instruc<on,  it  must  be  fetched  into  the  CPU  
§ Next,  the  data  on  the  which  the  instruc<on  operates  must  be  fetched  
from  memory  and  brought  to  the  CPU  
¢ CPU    Memory  bandwidth  can  limit  performance  
§ Improving  performance  1:  hardware  improvements  to  increase  memory  
bandwidth  (e.g.,  DDR  →  DDR2  →  DDR3)  
§ Improving  performance  2:  move  less  data  into/out  of  the  CPU  
§ Put  some  “memory”  in  the  CPU  chip  itself  (this  is  “cache”  memory)  

Preliminaries  
University  of  Washington  

Binary  RepresentaIons  
¢ Base  2  number  representaIon  
§ Represent  35110    as    00000001010111112    or    1010111112  

¢ Electronic  implementaIon  
§ Easy  to  store  with  bi-­‐stable  elements  
§ Reliably  transmiRed  on  noisy  and  inaccurate  wires    

0   1   0
3.3V  
2.8V  

0.5V  
0.0V  
Preliminaries  

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