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Lecture Slides 04 043 x86 Address Comp

The document discusses various memory addressing modes and arithmetic operations in x86 assembly language. It explains how addresses can be computed using different combinations of registers and displacements, alongside examples of address calculations. Additionally, it covers the use of the 'leal' instruction for computing effective addresses and demonstrates arithmetic operations with both binary and unary instructions.

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0% found this document useful (0 votes)
4 views15 pages

Lecture Slides 04 043 x86 Address Comp

The document discusses various memory addressing modes and arithmetic operations in x86 assembly language. It explains how addresses can be computed using different combinations of registers and displacements, alongside examples of address calculations. Additionally, it covers the use of the 'leal' instruction for computing effective addresses and demonstrates arithmetic operations with both binary and unary instructions.

Uploaded by

yihuangece
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PDF, TXT or read online on Scribd
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University

 of  Washington  

Complete  Memory  Addressing  Modes  


¢ Remember,  the  addresses  used  for  accessing  memory  in  mov  (and  
other)  instruc?ons  can  be  computed  in  several  different  ways  
¢ Most  General  Form:  
   D(Rb,Ri,S)  Mem[Reg[Rb]  +  S*Reg[Ri]  +  D]  
§ D:    Constant  “displacement”  1,  2,  or  4  bytes  
§ Rb:    Base  register:  Any  of  the  8/16  integer  registers  
§ Ri:  Index  register:  Any,  except  for  %esp  or  %rsp
§ Unlikely  you’d  use  %ebp,  either  
§ S:    Scale:  1,  2,  4,  or  8  (why  these  numbers?)  
¢ Special  Cases:  can  use  any  combina?on  of  D,  Rb,  Ri  and  S  
   (Rb,Ri)  Mem[Reg[Rb]+Reg[Ri]]  
   D(Rb,Ri)  Mem[Reg[Rb]+Reg[Ri]+D]  
   (Rb,Ri,S)  Mem[Reg[Rb]+S*Reg[Ri]]  
x86  
University  of  Washington  

Address  Computa?on  Examples  


(Rb,Ri)  Mem[Reg[Rb]+Reg[Ri]]  
%edx 0xf000 D(,Ri,S)  Mem[S*Reg[Ri]+D]  
(Rb,Ri,S)  Mem[Reg[Rb]+S*Reg[Ri]]  
%ecx 0x100 D(Rb)  Mem[Reg[Rb]  +D]  

Expression   Address  Computa?on   Address  


0x8(%edx) 0xf000 + 0x8 0xf008
(%edx,%ecx) 0xf000 + 0x100 0xf100
(%edx,%ecx,4) 0xf000 + 4*0x100 0xf400
0x80(,%edx,2) 2*0xf000 + 0x80 0x1e080

x86  
University  of  Washington  

Address  Computa?on  Instruc?on  


¢ leal  Src,Dest  
§ Src  is  address  mode  expression  
§ Set  Dest  to  address  computed  by  expression  
(lea  stands  for  load  effec6ve  address)  
§
§ Example: leal (%edx,%ecx,4), %eax

¢ Uses  
§ CompuMng  addresses  without  a  memory  reference  
§ E.g.,  translaMon  of  p = &x[i];  
§ CompuMng  arithmeMc  expressions  of  the  form  x  +  k*i  
§ k  =  1,  2,  4,  or  8  
 

x86  
University  of  Washington  

Some  Arithme?c  Opera?ons  


¢ Two  Operand  (Binary)  Instruc?ons:  
Format  Computa/on  
addl  Src,Dest  Dest = Dest + Src  
subl  Src,Dest  Dest = Dest - Src  
imull  Src,Dest  Dest  =  Dest  *  Src  
sall  Src,Dest  Dest  =  Dest  <<  Src  Also  called  shll  
sarl  Src,Dest  Dest  =  Dest  >>  Src  Arithme/c  
shrl  Src,Dest  Dest  =  Dest  >>  Src  Logical  
xorl  Src,Dest  Dest  =  Dest  ^  Src  
andl  Src,Dest  Dest  =  Dest  &  Src  
orl  Src,Dest  Dest  =  Dest  |  Src  
¢ Watch  out  for  argument  order!    (especially  subl)  
¢ No  dis?nc?on  between  signed  and  unsigned  int  (why?)  

x86  
University  of  Washington  

Some  Arithme?c  Opera?ons  


¢ One  Operand  (Unary)  Instruc?ons  
incl      Dest  Dest = Dest + 1
decl      Dest  Dest = Dest - 1
negl      Dest  Dest = -Dest
notl      Dest  Dest = ~Dest  
 
See  textbook  sec?on  3.5.5  for  more  instruc?ons:  mull,  cltd,  
¢

idivl,  divl

x86  
University  of  Washington  

Using  leal  for  Arithme?c  Expressions  


arith:
pushl %ebp
Set  
int arith movl %esp,%ebp Up  
(int x, int y, int z)
{ movl 8(%ebp),%eax
int t1 = x+y; movl 12(%ebp),%edx
int t2 = z+t1; leal (%edx,%eax),%ecx
int t3 = x+4; leal (%edx,%edx,2),%edx
int t4 = y * 48; sall $4,%edx Body  
int t5 = t3 + t4; addl 16(%ebp),%ecx
int rval = t2 * t5; leal 4(%edx,%eax),%eax
return rval; imull %ecx,%eax
}
movl %ebp,%esp
popl %ebp Finish  
ret

x86  
University  of  Washington  

Understanding  arith  
int arith
(int x, int y, int z) •  
•   Stack  
{
Offset   •
int t1 = x+y;
int t2 = z+t1; 16 z
int t3 = x+4;
int t4 = y * 48; 12 y
int t5 = t3 + t4; 8 x
int rval = t2 * t5; 4 Rtn  adr  
return rval;
} 0 Old  %ebp   %ebp

movl 8(%ebp),%eax # eax = x


movl 12(%ebp),%edx # edx = y
leal (%edx,%eax),%ecx # ecx = x+y (t1)
leal (%edx,%edx,2),%edx # edx = y + 2*y = 3*y
sall $4,%edx # edx = 48*y (t4)
addl 16(%ebp),%ecx # ecx = z+t1 (t2)
leal 4(%edx,%eax),%eax # eax = 4+t4+x (t5)
imull %ecx,%eax # eax = t5*t2 (rval)
x86  
University  of  Washington  

Understanding  arith  
int arith
(int x, int y, int z) •  
•   Stack  
{
Offset   •
int t1 = x+y;
int t2 = z+t1; 16 z
int t3 = x+4;
int t4 = y * 48; 12 y
int t5 = t3 + t4; 8 x
int rval = t2 * t5; 4 Rtn  adr  
return rval;
} 0 Old  %ebp   %ebp

movl 8(%ebp),%eax # eax = x


movl 12(%ebp),%edx # edx = y
leal (%edx,%eax),%ecx # ecx = x+y (t1)
leal (%edx,%edx,2),%edx # edx = y + 2*y = 3*y
sall $4,%edx # edx = 48*y (t4)
addl 16(%ebp),%ecx # ecx = z+t1 (t2)
leal 4(%edx,%eax),%eax # eax = 4+t4+x (t5)
imull %ecx,%eax # eax = t5*t2 (rval)
x86  
University  of  Washington  

Understanding  arith  
int arith
(int x, int y, int z) •  
•   Stack  
{
Offset   •
int t1 = x+y;
int t2 = z+t1; 16 z
int t3 = x+4;
int t4 = y * 48; 12 y
int t5 = t3 + t4; 8 x
int rval = t2 * t5; 4 Rtn  adr  
return rval;
} 0 Old  %ebp   %ebp

movl 8(%ebp),%eax # eax = x


movl 12(%ebp),%edx # edx = y
leal (%edx,%eax),%ecx # ecx = x+y (t1)
leal (%edx,%edx,2),%edx # edx = y + 2*y = 3*y
sall $4,%edx # edx = 48*y (t4)
addl 16(%ebp),%ecx # ecx = z+t1 (t2)
leal 4(%edx,%eax),%eax # eax = 4+t4+x (t5)
imull %ecx,%eax # eax = t5*t2 (rval)
x86  
University  of  Washington  

Understanding  arith  
int arith
(int x, int y, int z) •  
•   Stack  
{
Offset   •
int t1 = x+y;
int t2 = z+t1; 16 z
int t3 = x+4;
int t4 = y * 48; 12 y
int t5 = t3 + t4; 8 x
int rval = t2 * t5; 4 Rtn  adr  
return rval;
} 0 Old  %ebp   %ebp

movl 8(%ebp),%eax # eax = x


movl 12(%ebp),%edx # edx = y
leal (%edx,%eax),%ecx # ecx = x+y (t1)
leal (%edx,%edx,2),%edx # edx = y + 2*y = 3*y
sall $4,%edx # edx = 48*y (t4)
addl 16(%ebp),%ecx # ecx = z+t1 (t2)
leal 4(%edx,%eax),%eax # eax = 4+t4+x (t5)
imull %ecx,%eax # eax = t5*t2 (rval)
x86  
University  of  Washington  

Observa?ons  about  arith  


int arith § InstrucMons  in  different  
(int x, int y, int z) order  from  C  code  
{
int t1 = x+y;
§ Some  expressions  require  
int t2 = z+t1; mulMple  instrucMons  
int t3 = x+4; § Some  instrucMons  cover  
int t4 = y * 48; mulMple  expressions  
int t5 = t3 + t4; § Get  exact  same  code  when  
int rval = t2 * t5;
compile:  
return rval;
} § (x+y+z)*(x+4+48*y)

movl 8(%ebp),%eax # eax = x


movl 12(%ebp),%edx # edx = y
leal (%edx,%eax),%ecx # ecx = x+y (t1)
leal (%edx,%edx,2),%edx # edx = y + 2*y = 3*y
sall $4,%edx # edx = 48*y (t4)
addl 16(%ebp),%ecx # ecx = z+t1 (t2)
leal 4(%edx,%eax),%eax # eax = 4+t4+x (t5)
imull %ecx,%eax # eax = t5*t2 (rval)
x86  
University  of  Washington  

Another  Example  
logical:
int logical(int x, int y) pushl %ebp Set  
{ movl %esp,%ebp Up  
int t1 = x^y;
int t2 = t1 >> 17; movl 8(%ebp),%eax
int mask = (1<<13) - 7; xorl 12(%ebp),%eax
int rval = t2 & mask; sarl $17,%eax
return rval; andl $8185,%eax
} Body  
movl %ebp,%esp
popl %ebp Finish  
ret

Stack  
movl 8(%ebp),%eax # eax = x •  
Offset  
•  
xorl 12(%ebp),%eax # eax = x^y •
sarl $17,%eax # eax = t1>>17
12 y
andl $8185,%eax # eax = t2 & 8185
8 x
4 Rtn  adr  
0 Old  %ebp   %ebp
x86  
University  of  Washington  

Another  Example  
logical:
int logical(int x, int y) pushl %ebp Set  
{ movl %esp,%ebp Up  
int t1 = x^y;
int t2 = t1 >> 17; movl 8(%ebp),%eax
int mask = (1<<13) - 7; xorl 12(%ebp),%eax
int rval = t2 & mask; sarl $17,%eax
return rval; andl $8185,%eax
} Body  
movl %ebp,%esp
popl %ebp Finish  
ret

movl 8(%ebp),%eax eax = x


xorl 12(%ebp),%eax eax = x^y (t1)
sarl $17,%eax eax = t1>>17 (t2)
andl $8185,%eax eax = t2 & 8185

x86  
University  of  Washington  

Another  Example  
logical:
int logical(int x, int y) pushl %ebp Set  
{ movl %esp,%ebp Up  
int t1 = x^y;
int t2 = t1 >> 17; movl 8(%ebp),%eax
int mask = (1<<13) - 7; xorl 12(%ebp),%eax
int rval = t2 & mask; sarl $17,%eax
return rval; andl $8185,%eax
} Body  
movl %ebp,%esp
popl %ebp Finish  
ret

movl 8(%ebp),%eax eax = x


xorl 12(%ebp),%eax eax = x^y (t1)
sarl $17,%eax eax = t1>>17 (t2)
andl $8185,%eax eax = t2 & 8185

x86  
University  of  Washington  

Another  Example  
logical:
int logical(int x, int y) pushl %ebp Set  
{ movl %esp,%ebp Up  
int t1 = x^y;
int t2 = t1 >> 17; movl 8(%ebp),%eax
int mask = (1<<13) - 7; xorl 12(%ebp),%eax
int rval = t2 & mask; sarl $17,%eax
return rval; andl $8185,%eax
} Body  
movl %ebp,%esp
213  =  8192,                                            213  –  7  =  8185   popl %ebp Finish  
…0010000000000000,  …0001111111111001   ret

movl 8(%ebp),%eax eax = x


xorl 12(%ebp),%eax eax = x^y (t1)
sarl $17,%eax eax = t1>>17 (t2)
andl $8185,%eax eax = t2 & 8185

x86  

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