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COA Syllabus

The document outlines the course structure and syllabus for the II Year I Semester of the B.Tech CSE program at University College of Engineering Kakinada, focusing on Computer Organization and Architecture. It details course objectives, outcomes, and the curriculum divided into five units covering topics such as computer types, logic gates, microprocessors, memory organization, and input-output systems. Textbooks and reference materials are also listed to support the course content.

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6 views

COA Syllabus

The document outlines the course structure and syllabus for the II Year I Semester of the B.Tech CSE program at University College of Engineering Kakinada, focusing on Computer Organization and Architecture. It details course objectives, outcomes, and the curriculum divided into five units covering topics such as computer types, logic gates, microprocessors, memory organization, and input-output systems. Textbooks and reference materials are also listed to support the course content.

Uploaded by

rvkaushal.jntuk
Copyright
© © All Rights Reserved
Available Formats
Download as PDF, TXT or read online on Scribd
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University College of Engineering Kakinada (A)

Jawaharlal Nehru Technological University Kakinada


B.Tech CSE (R23- II Year COURSE STRUCTURE & SYLLABUS)

II Year I Semester L T P C
3 0 0 3
Computer Organization & Architecture

Course Objectives:
The purpose of the course is to introduce principles of computer organization and the basic
architectural concepts. It provides an in depth understanding of basic organization, design,
programming of a simple digital computer, computer arithmetic, instruction set design, micro
programmed control unit, pipelining and vector processing, memory organization and I/O systems

Course Outcomes:
Knowledge
CO Course Outcomes
Level
Demonstrate an understanding of the basic operational concepts of
CO1 K1
computer and logic gates.
Evaluate and learn different combinational circuits, sequential
circuits and able to design them and learns basic structure of components
CO2 K1, K2
register through language, micro operations and able to write micro
programs
Determine and able to write data transfer and manipulators program and
CO3 students able to learn microprogramme control and central processing K3
unit
Understand the functionalities of microprocessors and its operations and
CO4 K1
memory organization.
Able to learns the internal organization of computers and able to evaluate
CO5 K2
performance of them.
#based on suggested Revised BTL
Mapping of course outcomes with program outcomes

CO/PO PO1 PO2 PO3 PO4 PO5 PO6 PO7 PO8 PO9 PO10
CO1
CO2
CO3
CO4
CO5
(Levels of Correlation, viz., 1-Low, 2-Moderate, 3-High)

UNIT I:
Basic Structure Of Computers: Computer Types, Functional unit, Basic Operational concepts, Bus
structures, Software, Performance, multiprocessors and multi computers.
Logic gates: Digital Logic gates,Two-level realizations using gates -- AND-OR, OR-AND, NAND-
NAND and NOR-NOR

UNIT II:
Sequential circuits I: Classification of sequential circuits (synchronous and asynchronous): basic
flip-flops, truth tables and excitation tables (NAND RS latch, NOR RS latch, RS flip-flop. JK flip-
flop, T flip-flop, D flip-flop with reset and clear terminals).Conversion of flip-flop to flip-flop, Race
around condition, Master J-K flipflop
Register Transfer Language And Micro-operations: Register Transfer language. Register Transfer
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University College of Engineering Kakinada (A)
Jawaharlal Nehru Technological University Kakinada
B.Tech CSE (R23- II Year COURSE STRUCTURE & SYLLABUS)

Bus and memory transfers, Arithmetic Micro-operations, Logic micro operations, shift micro
operations, Arithmetic logic shift unit. Instruction codes. Computer Registers, Computer instructions,
Instruction cycle.

UNIT III:
Micro Programmed Control: Control memory, Address sequencing, micro program example,
design of control unit.
Central Processing Unit: General Register Organization, Instruction Formats, Addressing modes,
Data Transfer and Manipulation, Program Control.

UNIT IV:
Microprocessors:Evaluation of Microprocessors, CISC and RISC, Characteristics of
Microprocessors
Memory Organization: Memory Hierarchy, Main Memory, Auxiliary memory, Associate Memory,
Cache Memory, Cache memories performance considerations, Virtual memories Introduction to Shift
registers and RAID

UNIT V:
Input – Output Organization: Peripheral Devices, Input-Output Interface, Asynchronous data
transfer, Modes of Transfer, Priority Interrupts, DMA, Input Output Processor, Serial
Communication.

Text Books:
1. Digital Logic and Computer Design, Moriss Mano, 11th Edition, PearsonEducation.
2. Computer Organization, 5thed.,Hamacher, Vranesicand Zaky,TMH,2002
3. Computer System Architecture, 3/e, MorisMano,Pearson/PHI.
Reference Books:
1. Computer System Organization &Architecture, John D.Carpinelli, Pearson,2008
2. Computer System Organization, NareshJotwani, TMH, 2009
3. Computer Organization &Architecture: Designing for Performance, 7thed.,William Stallings,
PHI, 2006
4. Structured Computer Organization – Andrew S. Tanenbaum, 4th Edition,PHI/Pearson.

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