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[5] Single-Stage Amplifiers 2

The lecture discusses various single-stage amplifier configurations, including common-source, common-drain, common-gate, and cascode stages, highlighting their biasing, gain characteristics, and applications. It emphasizes the advantages and disadvantages of each stage, particularly focusing on their input and output resistances. The lecture concludes with a method for analyzing circuits by inspection, which simplifies the design process.

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0% found this document useful (0 votes)
5 views16 pages

[5] Single-Stage Amplifiers 2

The lecture discusses various single-stage amplifier configurations, including common-source, common-drain, common-gate, and cascode stages, highlighting their biasing, gain characteristics, and applications. It emphasizes the advantages and disadvantages of each stage, particularly focusing on their input and output resistances. The lecture concludes with a method for analyzing circuits by inspection, which simplifies the design process.

Uploaded by

yuoufs459
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PDF, TXT or read online on Scribd
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10/29/22

Analog Circuits (1)


ECE 312s

Lecture 5
Single-Stage Amplifiers – 2

Mohamed Dessouky
Integrated Circuits Laboratory
Ain Shams University
Cairo, Egypt
[email protected]

M. Dessouky – ECE312s – Fall 22 Analog Circuits (1)

Outline

• Introduction

• Common-Source Stage

• Common-Drain Stage

• Common-Gate Stage
This Lecture
• Cascode Stage

• Conclusions

• Analysis by Inspection

M. Dessouky – ECE312s – Fall 22 Analog Circuits (1)

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10/29/22

Outline

• Introduction

• Common-Source Stage

• Common-Drain (Source-Follower) Stage

• Common-Gate Stage

• Cascode Stage

• Conclusions

• Analysis by Inspection

M. Dessouky – ECE312s – Fall 22 Analog Circuits (1)

Common Drain (CD) Stage – Biasing


• The drain is connected to VDD
• The gate can also be connected to
VDD so that VGS =VDS.
• Guarantees that the transistor
remain in saturation.
CD stage
• We have

• Bias current is a function of Supply


voltage.

M. Dessouky – ECE312s – Fall 22 Analog Circuits (1)

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Common Drain (CD) Stage – Biasing

CD stage bias with current source

• In IC design a current source is used for biasing the main transistor.


• The current sets the bias point and hence VGS

M. Dessouky – ECE312s – Fall 22 Analog Circuits (1)

CD as a dc Level-Shifter

VGS
ID
CD stage

• From a dc point of view: Transfer Characteristics

𝑉𝑜𝑢𝑡 = 𝑉𝑖𝑛 − 𝑉𝐺𝑆


• If VGS is constant, then used as a shift-down voltage level shifter.

• We can set the amount of shifting by

M. Dessouky – ECE312s – Fall 22 Analog Circuits (1)

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CD as a Shift-up Level-Shifter

VGS

• Using a PMOS CD stage in the saturation region.

𝑉𝑜𝑢𝑡 = 𝑉𝑖𝑛 + 𝑉𝐺𝑆

M. Dessouky – ECE312s – Fall 22 Analog Circuits (1)

CD Stage – Gain

𝑉𝑖𝑛 − 𝑉𝐺𝑆

CD stage

• Gain is lower than unity!!


• Approaches unity as
is increased.

Small-signal
model

M. Dessouky – ECE312s – Fall 22 Analog Circuits (1)

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CD Stage – Gain as a Voltage Divider


• Move rO in parallel with RL
• Calculate Thevenin equivalent at
transistor source.
Thevenin equivalent

𝑣 𝑇ℎ𝑒𝑣 = 𝑣𝑖𝑛
Small-signal
• For RThev model

RThev
RThev Calculation

• Same as diode-connected …

M. Dessouky – ECE312s – Fall 22 Analog Circuits (1)

CD Stage – Gain as a Voltage Divider


• Hence, the output voltage is the
voltage divider between (rO//RL)
and 1/gm

Thevenin equivalent

• The output follows the input, hence


the name Source Follower.
• Any CD stage can be replaced by
this Thevenin equivalent
• Valid as long as either
– RD = 0
– or rO → 

M. Dessouky – ECE312s – Fall 22 Analog Circuits (1)

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CD – Input and Output Resistances


• Infinite input resistance
• Output resistance

Output resistance

which is usually a low value

M. Dessouky – ECE312s – Fall 22 Analog Circuits (1)

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Source-Follower Stage as a Buffer

CS stage

• The source-follower stage has a


– unity gain, Source Follower
stage
– infinite input impedance and
– low output impedance.
• Used as a voltage buffer. For example, the CS stage has a high output
impedance that is not desirable in voltage amplifiers.
• If the CS stage is followed by a source-follower stage, an overall low
output impedance is achieved, while the overall gain is not affected.

M. Dessouky – ECE312s – Fall 22 Analog Circuits (1)

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Outline

• Introduction

• Common-Source Stage

• Common-Drain (Source-Follower) Stage

• Common-Gate Stage

• Cascode Stage

• Conclusions

• Analysis by Inspection

M. Dessouky – ECE312s – Fall 22 Analog Circuits (1)

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Common Gate (CG) Stage – Biasing


• Same as CS with input branch
placed at the source instead of the
gate.

CG stage bias

M. Dessouky – ECE312s – Fall 22 Analog Circuits (1)

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10/29/22

CG Stage – Gain
• Same voltage gain as CS stage,
but positive.

VD
𝑉𝐷𝐷 − 𝑅𝐷 𝐼𝐷

• Same CS design trade-offs. VS


CG stage
• For high gain, a high RD is
necessary,
• M1 to remain in saturation:
VDD − IDRD > Vb − VTH

Small-signal
model

M. Dessouky – ECE312s – Fall 22 Analog Circuits (1)

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CG – Input and Output Resistance


• The common gate input impedance
(neglecting channel length
modulation, i.e. rO)

which is usually a low value!! Input resistance

• Output Impedance

Output resistance

M. Dessouky – ECE312s – Fall 22 Analog Circuits (1)

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Outline

• Introduction

• Common-Source Stage

• Common-Drain (Source-Follower) Stage

• Common-Gate Stage

• Cascode Stage

• Conclusions

• Analysis by Inspection

M. Dessouky – ECE312s – Fall 22 Analog Circuits (1)

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Cascode Stage
• A common-source (M1) vout
followed by a common-gate
(M2).
VDS1+VDS2
vin
VGS
Cascode stage

Small-signal
model

M. Dessouky – ECE312s – Fall 22 Analog Circuits (1)

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Cascode Stage – Norton Equivalent

Amplifier Norton Equivalent


• To simplify the small-signal model, will use
Norton equivalent.
• Calculate output resistance and short-
circuit current.

Short-circuit current

M. Dessouky – ECE312s – Fall 22 Analog Circuits (1)

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Cascode Stage – Short-circuit Current

iout
R2=1/gm2
irO1

Small-signal
model

M. Dessouky – ECE312s – Fall 22 Analog Circuits (1)

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Cascode Stage – Output Resistance


• Similar to CS stage with source degeneration

Rout

• The output resistance of M1 is amplified by the


maximum available gain of M2.
Cascode stage

M. Dessouky – ECE312s – Fall 22 Analog Circuits (1)

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Cascode Stage – Equivalent Model


• So, the cascode stage can be
regarded as a CS stage with

Cascode stage small-signal model

• Hence, the gain is

Advantages:
• The highest gain.
• A high input resistance.
Disadvantages:
• The highest output resistance.
Cascode stage
• Reduced output swing.

M. Dessouky – ECE312s – Fall 22 Analog Circuits (1)

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Single Stage Amplifiers – Comparison


• With a single transistor, three amplifier topologies are possible:
common-source and common-gate stages and source followers.

• The CS stage provides


– a moderate voltage gain,
– a high input impedance, and
– a moderate output impedance.
– Used mainly as a voltage amplifier.

• In CS, source degeneration improves the


linearity but lowers the voltage gain. CS stage

M. Dessouky – ECE312s – Fall 22 Analog Circuits (1)

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Single Stage Amplifiers – Comparison


• The source follower provides
– a voltage gain less than unity,
– a high input impedance, and
– a low output impedance,
– serving as a good voltage buffer.
– it is also used as a level shifter, especially in ICs.
Source-follower
• The CG stage provides stage
– a moderate voltage gain,
– low input impedance, and
– a moderate output impedance.
– Used as a voltage amplifier, especially,
when it is required to match the amplifier
to a low impedance source (e.g. antennas)
CG stage

M. Dessouky – ECE312s – Fall 22 Analog Circuits (1)

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Single Stage Amplifiers – Comparison


• The voltage gain expressions for CS and CG stages are similar but for a
sign.

• The Cascode stage has


– The highest gain.
– A high input resistance.
Disadvantages:
– The highest output resistance.
– Reduced output swing

Cascode stage

M. Dessouky – ECE312s – Fall 22 Analog Circuits (1)

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Analysis by Inspection
• The procedure of progressively simplifying a circuit until it resembles a
known topology.
• This method avoids complex small-signal models and lengthy
calculations.

• The equations in this lecture are the basis of analog design. All
designers should know them by heart

M. Dessouky – ECE312s – Fall 22 Analog Circuits (1)

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10/29/22

Example 1
Transistors
• M1: Amplifier
• M2: Diode-connected
• M3: Diode-connected
• M4: Current Source

Source CS w. degeneration
Follower

Valid since
rO1 =  𝑔𝑚1 1Τ𝑔𝑚3
≈ ≈−
𝑔𝑚1 + 𝑔𝑚2 1Τ𝑔𝑚1 + 1Τ𝑔𝑚2
M. Dessouky – ECE312s – Fall 22 Analog Circuits (1)

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Example 2

CG with input source resistance

M. Dessouky – ECE312s – Fall 22 Analog Circuits (1)

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Example 3
Transistors
• M1 - M2: Cascode
• M3 - M4: Cascode
current source used to
increase the output
resistance.

Cascode with Cascode current source

M. Dessouky – ECE312s – Fall 22 Analog Circuits (1)

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Example 4

CD
Thevenin
equivalent

CD CG

M. Dessouky – ECE312s – Fall 22 Analog Circuits (1)

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10/29/22

Example 5

≈ 𝑔𝑚1 𝑟𝑂1 𝑅𝑆

CS

𝐴𝑣 = −𝑔𝑚2 𝑔𝑚1 𝑟𝑂1 𝑅𝑆 ∥ 𝑟𝑂2

M. Dessouky – ECE312s – Fall 22 Analog Circuits (1)

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16

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