HV7321

Ultrasound TX Pulser
Evaluation Board
User’s Guide

 2016 Microchip Technology Inc. DS20005656B

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DS20005656B-page 2  2016 Microchip Technology Inc.

 Object of Declaration: HV7321 Ultrasound TX Pulser Evaluation Board

 2016 Microchip Technology Inc. DS20005656B-page 3

NOTES:

DS20005656B-page 4  2016 Microchip Technology Inc.

 HV7321
ULTRASOUND TX PULSER
EVALUATION BOARD
USER’S GUIDE

Table of Contents
Preface ........................................................................................................................... 7
Chapter 1. Product Overview
1.1 Introduction ................................................................................................... 11
1.2 HV7321 IC – Description .............................................................................. 11
1.3 MD1730 IC – Description ............................................................................. 11
1.4 HV7321 Ultrasound TX Pulser Evaluation Board
– Features .............................................................................................. 12
1.5 HV7321 Ultrasound TX Pulser Evaluation Board and MUPB001
– Functional Description ......................................................................... 12
1.6 HV7321 Ultrasound TX Pulser Evaluation Board
– Technical Specifications ...................................................................... 14
1.7 Device Summary .......................................................................................... 14
1.8 What the HV7321 Ultrasound TX Pulser Evaluation Board Kit Includes ...... 14
Chapter 2. Installation and Operation
2.1 Getting Started ............................................................................................. 15
2.2 Setup Procedure .......................................................................................... 15
2.3 Interface Connections .................................................................................. 17
2.4 Operating the HV7321 Ultrasound TX Pulser Evaluation Board .................. 19
2.5 Microchip Ultrasound Platform Board (MUPB001) ....................................... 20
Chapter 3. Software Description
3.1 FPGA code Configuration ............................................................................ 23
3.2 Getting Started ............................................................................................. 23
3.3 MUPB001 – HV7321_MD1730 GUI Installation ........................................... 23
3.4 MUPB – HV7321_MD1730 GUI Description ................................................ 27
3.5 GUI Elements Specific to CW Mode-0 ......................................................... 32
3.6 GUI Elements Specific to CW Mode-1 ......................................................... 34
3.7 Configuring the Transmission of Signals Using the GUI .............................. 35
Chapter 4. PCB Design and Layout Notes
4.1 PCB Layout Techniques for HV7321 & MD1730 Ultrasound Pulser ............ 41
Appendix A. Schematic & Layouts
A.1 Introduction .................................................................................................. 45
A.2 ADM00659 – Schematic .............................................................................. 46
A.3 ADM00659 – Top Copper and Silk .............................................................. 47
A.4 ADM00659 – Top Copper ............................................................................ 47
A.5 ADM00659 – Inner 1 – GND ........................................................................ 48
A.6 ADM00659 – Inner 2 – PWR ....................................................................... 48
A.7 ADM00659 – Bottom Copper ....................................................................... 49

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HV7321 Ultrasound TX Pulser Evaluation Board User’s Guide

A.8 ADM00659 – Bottom Copper and Silk ......................................................... 49

A.9 ADM00679 – Schematic (Connection) ......................................................... 50
A.10 ADM00679 – Schematic (Power Supply) ................................................... 51
A.11 ADM00679 – Schematic (USB to SPI) ....................................................... 52
A.12 ADM00679 – Schematic (Programmable Clock) ....................................... 53
A.13 ADM00679 – Schematic (FPGA) ............................................................... 54
A.14 ADM00679 – Schematic (FPGA Decoupling Capacitors) .......................... 55
A.15 ADM00679 – Schematic (Connectors) ...................................................... 56
A.16 ADM00679 – Top Silk ................................................................................ 57
A.17 ADM00679 – Top Copper and Silk ............................................................ 57
A.18 ADM00679 – Top Copper .......................................................................... 58
A.19 ADM00679 – Inner 1 .................................................................................. 58
A.20 ADM00679 – Inner 2 .................................................................................. 59
A.21 ADM00679 – Inner 3 .................................................................................. 59
A.22 ADM00679 – Inner 4 .................................................................................. 60
A.23 ADM00679 – Bottom Copper ..................................................................... 60
A.24 ADM00679 – Bottom Copper and Silk ....................................................... 61
A.25 ADM00679 – Bottom Silk ........................................................................... 61
Appendix B. Bill of Materials (BOM)
Appendix C. HV7321 Ultrasound TX Pulser Evaluation Board Typical Waveforms
C.1 Board Typical Waveforms ............................................................................ 69
Worldwide Sales and Service .....................................................................................73

DS20005656B-page 6  2016 Microchip Technology Inc.

 HV7321
ULTRASOUND TX PULSER
EVALUATION BOARD
USER’S GUIDE

Preface

NOTICE TO CUSTOMERS
All documentation becomes dated, and this manual is no exception. Microchip tools and
documentation are constantly evolving to meet customer needs, so some actual dialogs
and/or tool descriptions may differ from those in this document. Please refer to our website
(www.microchip.com) to obtain the latest documentation available.
Documents are identified with a “DS” number. This number is located on the bottom of each
page, in front of the page number. The numbering convention for the DS number is
“DSXXXXXXXXA”, where “XXXXXXXX” is the document number and “A” is the revision level
of the document.
For the most up-to-date information on development tools, see the MPLAB® IDE online help.
Select the Help menu, and then Topics to open a list of available online help files.

INTRODUCTION
This chapter contains general information that will be useful to know before using the
HV7321 Ultrasound TX Pulser Evaluation Board. Items discussed in this chapter
include:
• Document Layout
• Conventions Used in this Guide
• Recommended Reading
• The Microchip Web Site
• Customer Support
• Document Revision History

DOCUMENT LAYOUT
This document describes how to use the HV7321 Ultrasound TX Pulser Evaluation
Board as a development tool to evaluate the HV7321 4-Channel 5-Level ±80V 2.5A
Ultrasound Transmit Pulser and the MD1730 8-Channel ±6V Low-Noise CW
Beamformer ICs. The manual layout is as follows:
• Chapter 1. “Product Overview” – Important information about the HV7321
Ultrasound TX Pulser Evaluation Board.
• Chapter 2. “Installation and Operation” – This chapter includes a detailed
description of each function of the evaluation board and instructions on how to
begin using the HV7321 Ultrasound TX Pulser Evaluation Board.
• Chapter 3. “Software Description” – This chapter explains the installation steps
for installing the MUPB001 (Microchip Ultrasound Platform Board) GUI, provides
an in-depth description of the elements of the MUPB001 GUI, and includes a
step-by-step guide for generating signals at the HV7321 output.
• Chapter 4. “PCB Design and Layout Notes” – This chapter explains important
points of PCB design and layout of high voltage ultrasound systems.

 2016 Microchip Technology Inc. DS20005656B-page 7

HV7321 Ultrasound TX Pulser Evaluation Board User’s Guide

• Appendix A. “Schematic & Layouts” – Shows the schematic and PCB layout
diagrams for the HV7321 Ultrasound TX Pulser Evaluation Board and for the
MUPB001.
• Appendix B. “Bill of Materials (BOM)” – Lists the parts used to build the
HV7321 Ultrasound TX Pulser Evaluation Board and the MUPB001.
• Appendix C. “HV7321 Ultrasound TX Pulser Evaluation Board Typical
Waveforms” – Describes the various demonstration waveforms for the HV7321
Ultrasound TX Pulser Evaluation Board.

CONVENTIONS USED IN THIS GUIDE

This manual uses the following documentation conventions:

DOCUMENTATION CONVENTIONS
Description Represents Examples
Arial font:
Italic characters Referenced books MPLAB® IDE User’s Guide
Emphasized text ...is the only compiler...
Initial caps A window the Output window
A dialog the Settings dialog
A menu selection select Enable Programmer
Quotes A field name in a window or “Save project before build”
dialog
Underlined, italic text with A menu path File>Save
right angle bracket
Bold characters A dialog button Click OK
A tab Click the Power tab
N‘Rnnnn A number in verilog format, 4‘b0010, 2‘hF1
where N is the total number of
digits, R is the radix and n is a
digit.
Text in angle brackets < > A key on the keyboard Press <Enter>, <F1>
Courier New font:
Plain Courier New Sample source code #define START
Filenames autoexec.bat
File paths c:\mcc18\h
Keywords _asm, _endasm, static
Command-line options -Opa+, -Opa-
Bit values 0, 1
Constants 0xFF, ‘A’
Italic Courier New A variable argument file.o, where file can be
any valid filename
Square brackets [ ] Optional arguments mcc18 [options] file
[options]
Curly brackets and pipe Choice of mutually exclusive errorlevel {0|1}
character: { | } arguments; an OR selection
Ellipses... Replaces repeated text var_name [,
var_name...]
Represents code supplied by void main (void)
user { ...
}

DS20005656B-page 8  2016 Microchip Technology Inc.

 Preface

RECOMMENDED READING
This user's guide describes how to use HV7321 Ultrasound TX Pulser Evaluation
Board. Other useful documents are listed below. The following Microchip documents
are available and recommended as supplemental reference resources:
• HV7321 Data Sheet - “HV7321 - 4-Ch. 5-Level ±80V High-Voltage Ultrasound
Pulser with T/R Switches” (DS20005639)
• MD1730 Data Sheet - “High Speed 8-Channel Ultra-Low Phase Noise
Continuous Waveform Transmitter with Beamformer” (DS200005586)

THE MICROCHIP WEB SITE

Microchip provides online support via our website at www.microchip.com. This website
is used as a means to make files and information easily available to customers. The
web site contains the following information:
• Product Support – Data sheets and errata, application notes and sample
programs, design resources, user’s guides and hardware support documents,
latest software releases and archived software
• General Technical Support – Frequently Asked Questions (FAQs), technical
support requests, online discussion groups, Microchip consultant program
member listing
• Business of Microchip – Product selector and ordering guides, latest Microchip
press releases, listing of seminars and events, listings of Microchip sales offices,
distributors and factory representatives

CUSTOMER SUPPORT
Users of Microchip products can receive assistance through several channels:
• Distributor or Representative
• Local Sales Office
• Field Application Engineer (FAE)
• Technical Support
Customers should contact their distributor, representative or field application engineer
(FAE) for support. Local sales offices are also available to help customers. A listing of
sales offices and locations is included in the back of this document.
Technical support is available through the web site at:
http://www.microchip.com/support.

DOCUMENT REVISION HISTORY

Revision A (October 2016)
• Initial release of this document.

Revision B (November 2016)

The following is the list of modifications:
• Updated Appendix B. “Bill of Materials (BOM)”.
• Minor typographical corrections.

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HV7321 Ultrasound TX Pulser Evaluation Board User’s Guide

NOTES:

DS20005656B-page 10  2016 Microchip Technology Inc.

 HV7321
ULTRASOUND TX PULSER
EVALUATION BOARD
USER’S GUIDE

Chapter 1. Product Overview

1.1 INTRODUCTION
The HV7321 Ultrasound TX Pulser Evaluation Board (ADM00659) works with Micro-
chip Technology Inc.’s Ultrasound Platform Board (ADM00679) to provide a 4-Channel,
5-Level, ±80V, 2.5A ultrasound transmit pulser demonstration platform including a very
low phase noise, 8-Channel ±6V CW beamforming waveform generator. The HV7321
Ultrasound TX Pulser Evaluation Board features one HV7321 IC and one MD1730 IC
used as a 4-channel CW waveform generator.

1.2 HV7321 IC – DESCRIPTION

The HV7321 is a 4-Channel, 5-Level, ±80V, 2.5A ultrasound transmit pulser with inte-
grated transmit/receive switches. It is designed for medical ultrasound imaging,
non-destructive testing (NDT) and other transducer drive applications.
The output transistors can provide up to ±2.5A of current at ±80V in Brightness mode
(B-mode) and ±300 mA current in Continuous Wave Doppler mode (CW mode). In
CW mode-0 (MODE = PWS = 0), VPP1/VNN1 voltage rails are used and the output cur-
rent is ±300 mA. This reduces the power dissipation on the chip in CW Mode-0.
The HV7321 also integrates 20 T/R and RX damp switches in each channel. 500
auto bleeding switches are used for true-zero voltage and minimizing the received
noise.
The 220 MHz clock re-timing capability provides low jitter in CWD, PW or B-mode. The
clock synchronization realigns the logic input signals to a master clock that reduces
various propagation delays caused by FPGA inaccuracies and/or by long PCB traces.
The built-in gate driver floating voltage regulators of the IC provide VPP and VNN
high-voltage rails changing interdependently or freely from 0 to ±80V. Output voltage
overshoot clamping diodes clamp to the highest level of the supply pin of VPP0 or VNN0
respectively. The control inputs (+2.5/+3.3V voltages) are designed to work with FPGA
or LVCMOS logic families directly.
The built-in high-voltage CW pulser switches enable the use of external low-voltage
CW generators with much better phase CW waveform source.

1.3 MD1730 IC – DESCRIPTION

The MD1730 is an 8-channel low-phase noise CW transmitter with programmable
phase delay used for CW beamforming.
The MD1730 is designed for high-end ultrasound imaging systems. In CW Mode-1, the
MD1730’s 8-channel CW output signals can directly drive two HV7321 external CW
inputs (CWIN) through the built-in high-voltage analog switches to drive the probe
transducer elements.
The frequency and phase delay of MD1730 outputs can be programmed via a SPI inter-
face. High-speed SPI read/write enables the CW focusing feature.

 2016 Microchip Technology Inc. DS20005656B-page 11

HV7321 Ultrasound TX Pulser Evaluation Board User’s Guide
In CW mode, dedicated CW signal paths are designed to minimize jitter and phase
noise. The CW outputs can have up to ±6V voltage swing. Each CW output has a sep-
arate programmed phase delay time value. If the CW frequency is set at 5 MHz, the
phase delay step size is 6.25 ns, an angular resolution of 11.25° increments when CLK
frequency is 160 MHz.
The MD1730 also features two clock output buffers that can drive two HV7321 ICs with
single-ended synchronization clock inputs up to 220 MHz.

1.4 HV7321 ULTRASOUND TX PULSER EVALUATION BOARD – FEATURES

• Four channels of HV7321 ultrasound transmitters
• Designed to work with Microchip Ultrasound Platform Board (MUPB001)
• 5-level voltage pulse waveforms outputs
• Dual rails pair of VPP0/VNN0 and VPP1/VNN1 up to ±80V high voltages
• On-board 220 pF//1K dummy load per channel
• ±2.5A source and sink current capability
• Built-in active return-to zero (RTZ) MOSFETs
• Built-in high-voltage analog damp switches for “true-zero” RTZ.
• On-board wide band op amp LNA emulation circuits for T/R switch outputs
• Re-timing clock on-board option sources up to 200 MHz frequency
• Fully programmable waveform generation from PC GUI via the MUPB001 board
• Connection-ready for external sync/trigger/clock signals
• On-board 5V-to-2.5V conversion LDO for VLL supply

1.5 HV7321 ULTRASOUND TX PULSER EVALUATION BOARD AND MUPB001 –

FUNCTIONAL DESCRIPTION
The HV7321 Ultrasound TX Pulser Evaluation Board can drive transducers as a 5-level
and 4-channel transmitter for ultrasound imaging applications and NDT systems. The
evaluation board features one HV7321-G 9 x 9 mm 64-lead VQFN packaged inte-
grated circuit and one MD1730 6 x 6 mm 36-lead VQFN packaged integrated circuit.
The board uses two high-speed 20 signal pair carrying capable right-angle backplane
connector, which is designed to work with Microchip Ultrasound Platform Board
(MUPB001) (ADM00679) as the control signal source.
The MUPB001 has a FPGA, used for demo waveform generation, and a USB-bridge
IC that connects the MUPB001 to a PC. By means of a Microsoft® Windows® driver
and GUI, the user can generate many optional waveforms and choose several modes
to evaluate the ultrasound-imaging transmit-pulser, including the FPGA re-programma-
ble features.
The on-board timing clock management IC allows flexible clock frequency selection.
The user can select different clock frequencies using the MUPB001 built-in clock
source via GUI, or activate the LVDS output clock oscillator on the HV7321 Ultrasound
TX Pulser Evaluation Board by installing 0 resistors at the output of the IC oscillator.
The LVDS signal is used solely by the MD1730.
These clock frequencies can be further utilized via the on-board clock buffer to drive
the single-ended re-timing clock input CLK on the HV7321 if FPGA timing logic inputs
are not desired.
The additional buffer on MD1730 can also be used to let the FPGA clock system syn-
chronized with the target evaluation board.
On connectors J5 and J23 there are additional uncommitted pins available to further
customize the synchronization or the use of triggers signals. If the HV7321 Ultrasound
TX Pulser Evaluation Board is connected to the MUPB001, these signals are all

DS20005656B-page 12  2016 Microchip Technology Inc.

 connected to the FPGA I/O/clock pins. The users can connect the board to their own
control signal source or system via the high-speed backplane connectors J5 and J23
(see Figure 1-1).
The HV7321 has built-in T/R switches per channel. Received signals at the output of
the T/R switches can be evaluated by using the output (LNAOUT test point on board)
of the wide-band transimpedance op-amp. The desired T/R switch output is connected
to the op-amp input via jumper. The op-amp has active termination load that emulates
the LNA (Low Noise Amplifier) input impedance similar to the one in receiver AFE
(Active Front End) Circuit.
There are seven color LEDs on the HV7321 Ultrasound TX Pulser Evaluation Board to
indicate the input control signal states.
Jumpers close to SMA connectors are for connecting the on-board dummy R-C load
(220 pF//1K) optionally to the transmit (TX) output.
The 220 MHz clock re-timing capability provides low jitter in CWD (Continuous Wave
Doppler), PW or B-mode. The clock synchronization realigns the logic input signals to
a master clock that reduces various propagation delays caused by FPGA inaccuracies
and/or by long PCB traces.

U3
+2.5V MCP1727
PWR
+2.5V +5V +10V
SEL0 VIN VOUT
TP66 TP67 +5V GND
MODE 0 to +80V
VLL VDD VGP J1
PWS TX0 TP1
J10-1 OEN
CBE0 VPP0
TXTRIG RXTRIG VCC 50
MDEN (Option) REN J19
XDCR0
PWR OEN MODE
+5V 220 pF
VPF0
OTP PWS VNF0 1K
J5 0 to -80V J2
TE6469169-1 TP9
CTRN[3:0] TX1
Connector to OTP OTP VNN0
50
Clock & I/Os on DT[63:0] J20
MUPB Board
1 of 4 Channels XDCR1
CKB1
SEL0 220 pF
VPP1
NC
TP27-28 0 to +80V 1K
NEG0
VPF1 J3
+2.5V +10V +2to+V
Decode VNF1
TX2 TP17
POS0 & 0 to -80V 50
Level J21
Shift VNN1 XDCR2
VLL VDD VCW+
CBE0,1 220 pF
VLL
CLK CBE1 SEL3 1K
CLK
CKB1
CLK LVDS CLK TP30 J4
TX0-3
CLK
50 NEG3 TX3
SCK
50
SDI VLL
J22
CBE0 POS3 RTZSW XDCR3
SDO SPI CLK
CKB0 TRSW
220 pF
CS CLK
RX0-3
HIZ[7:0]
TRSW 1K
SPIB VCW+
CLK
MDEN EN 249
CW RXDMP J6-J9
Fre.Dvdr VSF 1 of 8 Ch. CWIN0
TXRW CW0
& Phase
- TP45
Delay VDF CW1 CWIN1
CWSW MCP661

+2.5V Other CW
CW2 CWIN2
U1 RGND VDD /2 +
TP50
LNAOUT

X1 U2 Channels CW3 CWIN3

HV7321
MD1730
R35
(inf) CW4-7
LVDS TP52... SUB VDD VGP VCW+ VPP0 VPP1
OSC. SUB VCC VGN VCW- VNN0 VNN1
R36
(inf) EN GND DAP VSS VCW- GND VSUB VGN

OSCEN
+5V,±10V,0to±V,0to±80V,0to±80V
-10V -2to-V -10V PowerSupplyConnectors J10-13

FIGURE 1-1: HV7321 Ultrasound TX Pulser Evaluation Board - Simplified Block Diagram.

 2016 Microchip Technology Inc. DS20005656B-page 13

HV7321 Ultrasound TX Pulser Evaluation Board User’s Guide

1.6 HV7321 ULTRASOUND TX PULSER EVALUATION BOARD – TECHNICAL

SPECIFICATIONS
Parameter Value
Modes of Operation B, PW, CW
B-Mode Output Pulses Peak Voltage and Current (SEL = 0) up to ±80V and ± 2.5A typical
B-Mode Output Pulses Peak Voltage and Current (SEL = 1) up to ±80V and ± 2.0A typical
CW Output Peak Voltage and Current (MODE = 1) 0 to ±6V and ±800 mA typical. Use CWIN0–3 and
MD1730
CW Output Peak Voltage and Current (MODE = 0, PWS = 0) 0 to ±6V and ±700 mA typical. Use VPP1/VNN1 CW
HV7321 Re-timing Clock Input Frequency 200 MHz max. LVCMOS 2.5V
MD1730 CW Clock Input Frequency 250 MHz max. LVDS/SSTL 2.5/LVCMOS 2.5V
Low-Phase Noise CW Test LVDS Clock Oscillator Options included
Interface of FPGA Control Signals and USB PC-GUI Software J5 and J23 Connects to MUPB001 (ADM00679)
Interface Board
Logic circuitry 2.5V VLL Voltage Supply LDO Regulator Built-in, with optional voltage source from
MUPB001/J10
TX R-C Test-Load and User Transducer Interface Built-in, 220 pF//1K per channel with jumper and 50
SMA
On-Board LED Indicator of Signals SEL0, MODE, PWS, CBE0, MDEN, OEN and OTP
Overtemperature Protection Overtemperature Protection open-drain output to J5
to MUPB001 included
Floating Gave Driver Voltage Regulators and UVLO Built-in regulators in HV7321 and MD1730 w/ UVLO
PCB Board Dimensions 127 x 102 mm (5.0 x 4.0 inch)

1.7 DEVICE SUMMARY

The HV7321 Ultrasound TX Pulser Evaluation Board demonstrates the following
Microchip products on board:
• HV7321, 4-Channel 5-Level ±80V 2.5A Ultrasound Transmit Pulser
• MD1730, 8-Channel, ±6V Low-Noise CW Beamformer
The evaluation board also uses the additional IC:
• MCP1727, 1.5A Low-Voltage, Low-Quiescent Current LDO Regulator

1.8 WHAT THE HV7321 ULTRASOUND TX PULSER EVALUATION BOARD KIT

INCLUDES
The HV7321 Ultrasound TX Pulser Evaluation Board kit includes:
• HV7321 Ultrasound TX Pulser Evaluation Board (ADM00659)
• Important Information Sheet

DS20005656B-page 14  2016 Microchip Technology Inc.

 HV7321
ULTRASOUND TX PULSER
EVALUATION BOARD
USER’S GUIDE

Chapter 2. Installation and Operation

2.1 GETTING STARTED
The HV7321 Ultrasound TX Pulser Evaluation Board is fully assembled and tested. For
basic waveforms generation the board requires five power supply voltage rails of +5V,
±10V and ±80V. Nine power supply voltage rails are necessary for the full functional
demonstration: +5V, ±10V, 0 to ±6V, 0 to ±50V, and 0 to ±80. It is strongly recom-
mended that these power supply sources feature adjustable current-limit functions.

2.1.1 Additional Tools Required for Operation

The HV7321 Ultrasound TX Pulser Evaluation Board also requires:
1. an oscilloscope with minimum 500 MHz BW and two high-impedance probes
- make sure the grounds of the power supply sources are correctly connected
to the same ground as the testing oscilloscope ground
In order to demonstrate the HV7321 Ultrasound TX Pulser Evaluation Board wave-
forms and features, the following additional tools are required:
2. a Microchip Ultrasound Platform Board (MUPB001) (ADM00679)
3. a Microsoft Windows® 7 PC that has the Microchip Ultrasound Platform Board
evaluation driver and running the HV7321 Ultrasound TX Pulser Evaluation
Board GUI software
- connect J5 and J23 on the HV7321 Ultrasound TX Pulser Evaluation Board
(see Figure 2-1) to the MUPB001 FPGA control-board
- connect the MUPB001 FPGA control-board via USB to the Windows-7 PC
(see Figure 2-2)
Download the latest ultrasound platform evaluation driver and GUI software from the
Microchip website at www.microchip.com.

2.2 SETUP PROCEDURE

To operate the HV7321 Ultrasound TX Pulser Evaluation Board, the following steps
must be followed:
1. connect J5 and J23 (Figure 2-1) to a Microchip Ultrasound Platform Board
(MUPB001) (ADM00679) (Figure 2-2).
2. connect all HV7321 Ultrasound TX Pulser Evaluation Board jumpers on J6, J15,
J19, J20, J21 and J22 for the R-C load. See Figure 2-1.
3. connect all power supplies to the voltage supply input connectors J10, J11, J12
and J13 as indicated in Table 2-1 by observing the polarity. See Figure 2-1.
TABLE 2-1: POWER SUPPLY VOLTAGES AND CURRENT-LIMIT SETTINGS

Terminal Rail Name Voltage Average-Current Limit

J10-1 VCC/PWR +5V +50 mA
J10-2 VDD +5V +20 mA
J10-3 VGN -10V -30 mA
J10-4 GND 0V —

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HV7321 Ultrasound TX Pulser Evaluation Board User’s Guide
TABLE 2-1: POWER SUPPLY VOLTAGES AND CURRENT-LIMIT SETTINGS
(CONTINUED)
Terminal Rail Name Voltage Average-Current Limit
J10-5 GND 0V —
J10-6 VGP +10V +30 mA
J11-1 VCW+ 0 to +6V +200 mA
J11-2 GND 0V —
J11-3 VCW- 0 to -6V -200 mA
J12-1 VPP0 0 to +80V +5 mA
J12-2 GND 0V —
J12-3 VNN0 0 to -80V -5 mA
J13-1 VPP1 0 to VPP0 +5 mA

WARNING
Observe the polarity of each power supply rail and set the voltage and current
limit carefully. Note that ±80V is the maximum limit for VPP0/VNN0. VPP1/VNN1
voltages have to be equal or within VPP0/VNN0 voltage range.

J10 J11 J12 J13

J19
TP1

J20

J6

J5
J21

J22
TP30

J23

J15 TP50

FIGURE 2-1: HV7321 Ultrasound TX Pulser Evaluation Board – Front View.

DS20005656B-page 16  2016 Microchip Technology Inc.

 4. turn on the HV7321 Ultrasound TX Pulser Evaluation Board VDD +5V and the
MUPB001 VDD +5V
5. connect the MUPB001 USB cable to the PC (see Section 2.5). Make sure the
MUPB001 software driver is installed correctly and the MUPB001 USB connec-
tion to the PC is established.
6. run the MUPB001 GUI software. Check that the LEDs on the HV7321 Ultrasound
TX Pulser Evaluation Board are under PC user interface control. Set OEN LED
off.
7. turn on VGP/VGN ±10V, VPP0/VNN0 ±25V and VPP1/VNN1 ±15V
8. connect the oscilloscope probe ground lead to TP50, apply the probe tip to TP1
or TP30 with the scope trigger source set to the probe and the trigger-level to
DC +5V; set the scanning time base to 200 ns per division.
9. enable the TX Pulsed-Echo mode in the GUI to evaluate the waveforms (see
Section 3.4.11)
10. if it is necessary to increase the VPP/VNN voltage, adjust the VPP0/VNN0 in small
increments up to ±80V maximum, with the current limiting on

2.2.1 Recommended power-up and power-down sequences

Table 2-2 shows the recommended power-up sequence of the HV7321 Ultrasound TX
Pulser Evaluation Board.
Note: Powering the HV7321 Ultrasound TX Pulser Evaluation Board up/down in
any arbitrary sequence will not cause any damage to the device. The power
up/down sequences in table below are only recommended in order to mini-
mize possible inrush current.

TABLE 2-2: BOARD POWER-UP AND POWER-DOWN SEQUENCES

Step Power-Up Sequence Step Power-Down Sequence
1 VLL on with logic signal low 1 OEN and logic control signal go low
2 VDD, VGP and VGN ON 2 VPP0,1 and VNN0,1 OFF
3 REN = 1 3 REN = 0
4 VPP0,1 and VNN0,1 ON 4 VDD, VGP and VGN OFF
5 OEN = 1 and logic control signal active 5 VLL OFF

2.3 INTERFACE CONNECTIONS

Table 2-3 shows the board J5 control interface signals.

TABLE 2-3: J5 CONTROL INTERFACE SIGNALS

Pin # Name Test Point I/O Type Signal Discretion
J5-A1 PWR TP68 (1) +5V Power Input External +5V power supply via diode D8B to LDO U3
J5-B1 PWR TP68 (1)
+5V Power Input for VLL only
J5-C1 VLL(1) TP5 2.5V Pull Up Connected to R39 1K resistor pull-up to +2.5V VLL
J5-D1 OTP TP10 Open Drain Output OTP U1-20 HV7321 w/ 200 & LED to +2.5V VLL
J5-A2 NEG0 TP16 LVCMOS-2.5V Input NEG0 control input pin for U1 HV7321 Channel-0
J5-B2 POS0 TP14 LVCMOS-2.5V Input POS0 control input pin for U1 HV7321 Channel-0
J5-C2 OEN TP11 LVCMOS-2.5V Input Output enable input pin for U1 HV7321
J5-D2 REN TP12 LVCMOS-2.5V Input Gate-Regulator enable input pin for HV7321
J5-A3 NEG1 TP19 LVCMOS-2.5V Input NEG1 control input pin for U1 HV7321 Channel-1
Note 1: Connected indirectly with in-serial resistor or capacitor. For more details, refer to Appendix
A. “Schematic & Layouts”.

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HV7321 Ultrasound TX Pulser Evaluation Board User’s Guide

TABLE 2-3: J5 CONTROL INTERFACE SIGNALS (CONTINUED)

Pin # Name Test Point I/O Type Signal Discretion
J5-B3 POS1 TP20 LVCMOS-2.5V Input POS1 control input pin for U1 HV7321 Channel-1
J5-C3 NEG2 TP22 LVCMOS-2.5V Input NEG2 control input pin for U1 HV7321 Channel-2
J5-D3 POS2 TP23 LVCMOS-2.5V Input POS2 control input pin for U1 HV7321 Channel-2
J5-A4 SEL0 TP13 LVCMOS-2.5V Input SEL0 control input pin for U1 HV7321 Channel-0
J5-B4 SEL1 TP18 LVCMOS-2.5V Input SEL1 control input pin for U1 HV7321 Channel-1
J5-C4 NEG3 TP25 LVCMOS-2.5V Input NEG3 control input pin for U1 HV7321 Channel-3
J5-D4 POS3 TP26 LVCMOS-2.5V Input POS3 control input pin for U1 HV7321 Channel-3
J5-A5 SEL2 TP21 LVCMOS-2.5V Input SEL2 control input pin for U1 HV7321 Channel-2
J5-B5 SEL3 TP24 LVCMOS-2.5V Input SEL3 control input pin for U1 HV7321 Channel-3
J5-C5 MODE TP29 LVCMOS-2.5V Input MODE pin of HV7321, if Hi, CWIN[3:0] & MD1730 used
J5-D5 PWS TP31 LVCMOS-2.5V Input PWS pin of HV7321, if Lo, use VPP1/VNN1 for CW
J5-A6 SCK TP48 LVCMOS-2.5V Input SCK pin, SPI interface clock of U2 MD1730
J5-B6 CS TP49 LVCMOS-2.5V Input SCK pin, SPI interface chip-select of U2 MD1730
J5-C6 MDEN TP44 LVCMOS-2.5V Input EN pin, chip-enable of U2 MD1730, if Lo, CW[7:0] Hi-Z
J5-D6 SPIB TP46 LVCMOS-2.5V Input SPIB SPI broadcasting-mode enable of U2 MD1730
J5-A7 SDI TP51 LVCMOS-2.5V Input SDI pin, SPI interface clock of U2 MD1730
J5-B7 SDO TP53 LVCMOS-2.5V Output SDO pin, SPI data output from U2 MD1730
J5-C7 CBE0 TP37 LVCMOS-2.5V Input Clock Buffer-0 enable input pin on U2 MD1730
J5-D7 CBE1 TP40 LVCMOS-2.5V Input Clock Buffer-1 enable input pin on U2 MD1730
J5-A8 TXTRIG TP66 LVCMOS-2.5V I/O FPGA TX launch trigger signal input or output of MUPB
J5-B8 RXTRIG TP67 LVCMOS-2.5V I/O FPGA RX mode trigger signal input or output of MUPB
J5-C8 TXRW TP47 LVCMOS-2.5V Input CW transmit or SPI read/write control of U2 MD1730
J5-D8 CKB1 TP59 (1) LVCMOS-2.5V Output Clock Buffer-1 output from U2 MD1730
J5-A9 NC NA LVCMOS-2.5V Input Not used by the PCB
J5-B9 NC NA LVCMOS-2.5V Input Not used by the PCB
J5-C9 TP27 TP27 LVCMOS-2.5V Input Connected to TP27 on the PCB
J5-D9 TP28 TP28 LVCMOS-2.5V Input Connected to TP28 on the PCB
J5-A10 OSCEN TP32 LVCMOS-2.5V Input On-board crystal oscillator X1 enable signal
J5-B10 SYNC TP33 LVCMOS-2.5V Input Via R31 (INF) to CLK pin of HV7321 as a clock option
J5-C10 CLK_N (1) TP58 (1) LVDS / SSTL2.5 Input LVDS clock input from MUPB001 to U2 MD1730 CLK
(1)
J5-D10 CLK_P TP56 (1) LVDS / SSTL2.5 Input LVDS clock input from MUPB001 to U2 MD1730 CLK
J5-xGx GND TP50,61,65 Ground / 0V / Return Ground, 0V reference, shielding or PWR supply return
Note 1: Connected indirectly with in-serial resistor or capacitor. For more details, refer to Appendix
A. “Schematic & Layouts”.

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2.4 OPERATING THE HV7321 ULTRASOUND TX PULSER EVALUATION BOARD
Refer to Appendix C. “HV7321 Ultrasound TX Pulser Evaluation Board Typical
Waveforms” for HV7321 Ultrasound TX Pulser Evaluation Board typical waveforms
and voltages.

2.4.1 B-Mode Multi-Level TX Pulser Operation (PWS = 1, MODE = 0)

In B-Mode multi-level ultrasound transmit pulse generation, the user can select the fol-
lowing options or combinations of options, using a MUPB001 connected to a PC via
USB and running the dedicated GUI. These are the options available:
1. ultrasound waveform frequency, fixed frequency 1 to 20 MHz with step of
100 kHz
2. number of half cycles in TX launch burst, from 2 to 16
3. change launch burst Pulse Repetition Frequency (Line Duration) from 5 kHz to
20 kHz, or an interval of 50 to 200 µs
4. change the half-cycle polarity: positive first only, negative first only, or alternating
between positive first and negative first
5. change the VPP0/VNN0 and VPP1/VNN1 pluses pair order in the launch burst
6. change the pulse(s) damping condition: pulse(s) followed by return-to-zero
(RTZ) or not
7. change the receive time (RX-time) T/R switch(es) condition: RTZ, RTZ+, or
high Z
8. change the number of levels: 2-level, 3-level or 5-level operation
9. change the duty cycle of pulses: PWM% or Pulse Width with a range of 2 ns to
500 ns according to the frequency of the pulse(s)
10. change the peak voltages of the pulse(s) by changing the VPP and VNN rail sup-
ply voltages.

2.4.2 CW Mode-0 Using Voltage of VPP1/VNN1 Rails Operation

(PWS = 0, MODE = 0, SEL = 1)
Connecting the HV7321 Ultrasound TX Pulser Evaluation Board to a MUPB001 linked
to a PC via USB, and running the dedicated MUPB001 GUI allows the user to use the
VPP1/VNN1 voltage rail with reduced voltages and currents in CW Mode-0. The condi-
tions for this mode of operation are: VPP1/VNN1 must be between 0 to ±6V, PWS = 0,
and MODE = 0. The following options become available:
1. CW Doppler mode waveform frequency, fixed frequency 1 to 7 MHz with step of
100 kHz
2. selection of the CW frequency source: the MUPB001 built-in clock-generator or
the low-phase noise crystal-oscillator X1 on the HV7321 Ultrasound TX Pulser
Evaluation Board via the MD1730 clock-buffer to re-time synchronize with the
FPGA CW waveforms from POS/NEG with SEL = 1
3. changing the CW Doppler mode waveform peak-to-peak voltages by adjusting
VPP1/VNN1 supply rail voltages.
Note: Normal ranges are within 2 to 6V peak-to-peak at TX3:0 outputs. Higher volt-
ages may overheat the IC(s) and/or components on the PCB, and may even
damage them permanently.

 2016 Microchip Technology Inc. DS20005656B-page 19

HV7321 Ultrasound TX Pulser Evaluation Board User’s Guide

2.4.3 Low Phase-Noise CW Beamforming Operation via CWSW and

MD1730, Supplied by VCW+/VCW- Rails (PWS = 1, MODE = 1)
In CW Mode-1, the CW Beamforming mode features lower phase-noise by using the
built-in high-voltage analog switch in the HV7321. In this mode, the low-voltage CW
waveform generator sends the lower phase-noise CW waveforms with a predefined
beamforming phase delay.
The CW waveform peak-to-peak voltage swing is defined by the voltage supply rail of
VCW+/VCW- on the MD1730. The voltage range of the VCW+ /VCW- is 0 to ±6V, with
PWS = 1 and MODE = 1 control conditions. By using a MUPB001 connected to a PC
via USB and by running the dedicated GUI, the user has access to these options:
1. CW beamforming (CW Mode-1) waveform frequency, frequency 1 to 8 MHz with
step of 100 kHz, generated by programming the CW frequency divider number
CWFD[7:0] in the MD1730 SPI register via the MUPB001 PC GUI
2. programming the beamforming phase delay PHDCH[7:0] to define the relative
phase delay between channels of the CW waveforms
3. selecting the channel (or channels) set in Doppler receiving mode, by program-
ming the bits of HIZCH in the MD1730 SPI register
4. selection of the CW frequency source: the MUPB001 built-in clock-generator or
the low-phase noise crystal-oscillator X1 on the HV7321 Ultrasound TX Pulser
Evaluation Board via the MD1730 built-in CW frequency divider
5. changing the CW Doppler mode waveform peak-to-peak voltages by adjusting
the VCW+/VCW- supply rail voltages.
Note: Normal ranges are within 2 to 6V peak-to-peak at TX3:0 outputs. Higher volt-
ages may overheat the IC(s) and/or components on the PCB, and may even
damage them permanently.

Note: Typical voltages and waveforms are provided in Appendix C. “HV7321

Ultrasound TX Pulser Evaluation Board Typical Waveforms”.

2.5 MICROCHIP ULTRASOUND PLATFORM BOARD (MUPB001)

The MUPB001 is used to generate the control signals for the HV7321 Ultrasound TX
Pulser Evaluation Board. It features a flexible ultra-low jitter clock synthesizer and a
Spartan-6 XC6SLX9 FPGA.

2.5.1 Connecting the MUPB001 to the PC – Setup Procedure

1. Before connecting the MUPB001 to the PC, make sure that:
- the latest FPGA code on the platform flash of the MUPB001 FPGA is config-
ured (Section 3.1)
- the latest GUI is installed and running on the PC (see Section 3.3).
2. With FPGA code configured and the GUI installed, connect the USB cable
between the MUPB001 and the PC. Connect J5 and J23 of the HV7321 Ultra-
sound TX Pulser Evaluation Board (see Figure 2-1) to J1 and J2 of the MUPB001
(see Figure 2-2).
3. Start the GUI. On the bottom left of the status bar a “Not Connected” message is
displayed in red (see Section 3.4.16).
4. Connect the appropriate power supply and turn on the power switch to power up
the MUPB. LD1 and DC_IN (LD2) on the MUPB001 should light up green. A
“Connected” message should be displayed in green on the bottom left of the sta-
tus bar GUI (see Section 3.4.16).
The MUPB001 is now configured and ready to control the HV7321.

DS20005656B-page 20  2016 Microchip Technology Inc.

 OFF/ON
Switch

12V/1A
Power
Connector
DC_IN (LD2)

J1

PWR_OK (LD4)

USB_Fault (LD5)
Mini-USB J2
Connector

FPGA_OK (LD1) PROM JTAG

FIGURE 2-2: Microchip Ultrasound Platform Board (MUPB001).

 2016 Microchip Technology Inc. DS20005656B-page 21

HV7321 Ultrasound TX Pulser Evaluation Board User’s Guide

NOTES:

DS20005656B-page 22  2016 Microchip Technology Inc.

 HV7321
ULTRASOUND TX PULSER
EVALUATION BOARD
USER’S GUIDE

Chapter 3. Software Description

3.1 FPGA CODE CONFIGURATION
Connect the +12V power connector to the Microchip Platform Ultrasound Board
(MUPB001) and make sure that the green DC_IN LED is ON, indicating that the power
connection is successful.
Turn on the power switch of the MUPB001 and make sure that PWR_OK LED is ON,
and that the USB_Fault LED (red) flashes one time. If the USB_Fault LED remains lit,
that is an indication that the USB cable is not connected and/or the Windows® operat-
ing system did not recognize the USB bridge.
Make sure that the FPGA_OK LED of the MUPB001 is ON. This is an indication that
the FPGA code is configured (see Figure 2-2).
If the FPGA is not configured, or the user wants to modify the FPGA code, it is neces-
sary to configure the FPGA platform flash PROM. The tools needed for FPGA platform
flash PROM flash configuration are:
• Xilinx Platform cable USB II: This is a piece of hardware that is sold separately
from this evaluation kit. It connects to a PC via USB cable and to the MUPB001 J5
connector via JTAG cables.
• iMPACT tool embedded in Xilinx ISE Project Navigator: Xilinx ISE Project Naviga-
tor is the development environment for Xilinx products. It can be downloaded free
of charge from the Xilinx web site. iMPACT is the name of the module in Xilinx ISE
Project Navigator that provides the configuration of .mcs file to platform flash
PROM.
• the .mcs file is the extension of FPGA code files that are synthesized and specifi-
cally formatted for Xilinx platform flash PROM configuration.
The code resides in Xilinx platform flash PROM. The platform flash PROM loads the
code to FPGA when the system is powered up.

3.2 GETTING STARTED

Download the latest ultrasound platform evaluation driver and GUI software from the
Microchip website at http://www.microchip.com and install the MUPB001 –
HV7321_MD1730 GUI by following the instructions in Section 3.3.

3.3 MUPB001 – HV7321_MD1730 GUI INSTALLATION

The MUPB001 – HV7321_MD1730 GUI software installer can be downloaded from the
Microchip web site at http://www.microchip.com. Search for the evaluation board on the
web site by part number ADM00679. The GUI can be downloaded from the board web
page.
1. Open the MUPB001GUI-v.1.0.0-windows-installer.exe. The MUPB001 –
HV7321_MD1730 GUI software installer will initiate by launching the Applica-
tion Install dialog box. Click Next to start the installation.

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HV7321 Ultrasound TX Pulser Evaluation Board User’s Guide

FIGURE 3-1: MUPB001 GUI – Application Install Dialog Box.

2. To proceed with the installation, read the License Agreement and accept by click-
ing the radio button corresponding to “I accept the agreement”, then click Next.

FIGURE 3-2: MUPB001 GUI – License Agreement Dialog Box.

3. On the Installation Directory dialog box, browse for the desired location, or click
Next to install in the default location.

DS20005656B-page 24  2016 Microchip Technology Inc.

 Software Description

FIGURE 3-3: MUPB001 GUI – Installation Directory Dialog Box.

4. Once the installation path is chosen, the software is ready to install. Click Next
to proceed.

FIGURE 3-4: MUPB001 GUI – Ready-to-Install Dialog Box.

5. The installation status window appears, showing the installation progress. After
the installation has completed, click Next to continue.

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HV7321 Ultrasound TX Pulser Evaluation Board User’s Guide

FIGURE 3-5: MUPB001 GUI – Installation Status Window.

6. Once the Install Complete dialog box appears, click Finish to exit the Installer.

FIGURE 3-6: MUPB001 GUI – Install Complete Dialog Box.

7. Start the software by either going to Windows Start button > All Programs >
Microchip > MUPB001 GUI or by clicking the newly-created software icon on the

desktop ( ).

DS20005656B-page 26  2016 Microchip Technology Inc.

 3.4 MUPB – HV7321_MD1730 GUI DESCRIPTION
 2016 Microchip Technology Inc.

The elements of the MUPB - HV7321_MD1730 Graphical User Interface are dependent on the selection being made in the Transmission Mode list box
(3.4.11), labeled with 11 on Figure 3-7.
Transmission Mode “Pulsed-Echo” is selected by default. This section provides a comprehensive overview of the main GUI elements. Some elements are
specific to Pulsed-Echo only, while others are shared across transmission modes, i.e., common to the GUI as a whole. The numbered entries in Figure 3-7
(1 through 16) are described in subsections 3.4.1 through 3.4.16.

1
2
3 4 5 6
8
7

10

12
11

13 14

Software Description
DS20005656B-page 27

15
16
FIGURE 3-7: MUPB001 – HV7321_MD1730 GUI Pulsed-Echo View.
HV7321 Ultrasound TX Pulser Evaluation Board User’s Guide

3.4.1 Title Bar

On the MUPB001 – HV7321_MD1730 GUI Ribbon, the Microchip Technology Inc. logo
is displayed together with the name of the GUI.

3.4.2 Menu Bar

There are two menus on the Menu bar: File and Help. Click the File menu to open
these submenus: Save Waveform, Load Waveform, Save Log, Refresh, and Exit.
Clicking the Help menu gives users access to Show Help, and About submenus.

3.4.3 Line Duration Text Box

The user can set the line duration by entering the required value into the Line Dura-
tion(ns) text box. The default value is 200000 ns.

3.4.4 Entries to Transmit Drop-Down List Box

One transmission loop makes up one line duration. During one line duration each chan-
nel can be set to transmit up to 4 different group of pulses. The options available to the
user are 1, 1 - 2, 1 - 2 - 3, and 1 - 2 - 3 - 4.

3.4.5 Log Status Group Box

The Log Status group box is made up of the screen area and the button area.
The Log Status screen area shows messages on the status of the initialization of the
MUPB001 board transmit frequency and Pulsed-Echo Mode settings. “Initialization
Started”, “Initialization Completed”, “Transmission is started”, “Transmission is
stopped” are commonly displayed status messages. Figure 3-8 provides an example.

FIGURE 3-8: Log Status Screen Area.

There are two buttons in the Log Status button area: Save Log to File, and Clear.
These buttons allow the user to either save the log in a text file or clear the log screen,
respectively.
Clicking the Save Log to File button brings up the Save As dialog box, which allows
the user to navigate to the desired location for the log to be saved, and assign the log
a file name.

3.4.6 Start/ Stop Button

The Start/Stop button starts and stops the transmission. It becomes available to use
once the MUPB001 is connected to the PC via USB, and the connection is recognized
by the PC.

3.4.7 Pin State Group Box

The Pin State group box is made up of Pin State check box and the Send button.
The Pin State check box includes the control signals of PWS, MODE, OEN, and REN.

DS20005656B-page 28  2016 Microchip Technology Inc.

 Software Description
PWS must be checked (ON) for Pulsed-Echo mode and unchecked (OFF) for
CW Modes. MODE has to be selected (ON) for CW Mode-1 and unselected (OFF) for
CW Mode-0 and Pulsed-Echo mode.
REN is an abbreviation for “Regulator Enable” and it has to be checked (ON) for turning
the internal regulators on. OEN refers to “Output Enable” and it has to be selected (ON)
for getting the outputs out of High Impedance (high Z) mode.
After checking the desired options, the Send button becomes available for sending the
settings to the MUPB001.

3.4.8 Transmit Entry Group Box

This group box allows the users to set the parameters for the pulses that are necessary
to be transmitted. The Transmit Entry group box includes:
• the Entry Index drop-down list box:
- the users can set between 1 and 4 group of pulses for each channel. The
default value is 4.
• the TX Output Freq Divisor (1-255) text box:
- the users can adjust the pulse width by entering a value between 1 and 255 in
this text box. If Transmit Clock Config (MHz) (see Figure 3-7) is 200 MHz
then the clock period is 5 ns. The pulse width is adjusted by dividing the TX
Output Freq Divisor to the Transmit Clock Frequency. The default value is 16.
• 4 Channels (0-3) Delay (ns) text boxes:
- the relative delay between channels can be defined in these text boxes. The
value is expressed in nanoseconds. The default value is 16000 ns.
• 4 Channels (0-3) Waveform (Length Up to 32 Characters) text boxes:
- each group of pulses can be made up of up to 32 characters. The building
blocks that make up the waveform syntax are presented in Table 3-1.
TABLE 3-1: CHANNEL WAVEFORM SYNTAX
Building
Definition
Blocks
0 = VNN0
1 = VPP0
2 = VNN1
3 = VPP1
R = Return-to-Zero (RTZ)
P = Receive Mode (RTZ+)
H = High-Impedance (high Z)

• the Set Default Values button:

- the users can set the entered input values into the Channels (0-3) Delay (ns)
and Channels (0-3) Waveform (Length Up to 32 Characters) text boxes as
default values.
• the Clear Entry button:
- this button clears the values entered into the Channels (0-3) Delay (ns) and
Channels (0-3) Waveform (Length Up to 32 Characters) text boxes.
• the Help ( )button:
- clicking the Help button opens the Information pop-up window. See
Figure 3-9.

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HV7321 Ultrasound TX Pulser Evaluation Board User’s Guide

FIGURE 3-9: Information Pop-Up Window.

3.4.9 Transmit Clock Configuration (MHz) Group Box

The Transmit Clock Configuration (MHz) group box allows users to sets the clock fre-
quency. The Transmit Clock Configuration (MHz) group box includes the Transmit
Clock Configuration (MHz) drop-down list box and the Initialize MUPB button. Users
can select between 80, 120, 160 and 200 MHz clock frequency. The Initialize MUPB
button is activated once the USB connection between the PC and the MUPB001 is
established.

3.4.10 Pulsed-Echo Voltages Group Box

The Pulsed-Echo Voltages group box enables users to add numeric values to the volt-
age values shown on the GUI plot, for labeling purposes.
The Pulsed-Echo Voltages group box includes:
• 4 voltage text boxes each corresponding to VNN0 (V), VPP0 (V), VNN1 (V), and
VPP1 (V).
• the Default State drop-down list box which allows users to select in initial state of
the transmission channels. The options available are: RTZ, RTZ+ and Hi-Z.

3.4.11 Transmission Mode List Box

The user can select one of the 3 available modes of transmission by checking one
option in the Transmission Mode list box. The options available are:
• Plused_Echo: There are 5 voltage levels [VPP0,VPP1, Ground (Return-To-Zero,
RTZ), VNN1, VNN0] in addition to High Impedance (Hi-Z) and Receive mode
(RTZ+).
• CW Mode-0 (Internally by HV7321): There are 3 voltage levels [VPP1, Ground
(Return-To-Zero, RTZ), VNN1] in addition to High Impedance (Hi-Z) and Receive
mode (RTZ+).
• CW Mode-1 (Externally by MD1730): There are 3 voltage levels [CW+, Ground
(Return-To-Zero, RTZ), CW-) in addition to High Impedance (Hi-Z) and Receive
mode (RTZ+).

3.4.12 Waveform Screen Area

The Waveform screen area displays the transmitted waveforms. The signals displayed
are not the actual measurements at the HV7321 output but visual representations of
what is expected at the output.
The parameters shown in the Waveform screen area are dependent on the mode of
transmission selected in the Transmission Mode list box (see Section 3.4.11).

DS20005656B-page 30  2016 Microchip Technology Inc.

 Software Description

3.4.13 The Save to File button

By clicking the Save to File button, users can save the currently loaded waveforms and
the delay values input in CH0-3 Delay (ns) text boxes to a text file.
Clicking this button brings up the Save As dialog box that allows the user to navigate
to the desired location for the file to be saved, and assign the file a file name.

3.4.14 The Load Button

The Load button is used in conjunction with the Save button to load the previously
saved waveforms and delay values.
Clicking this button activates the Open dialog box which allows the user to navigate to
the location of the file to be loaded.

3.4.15 The Load Common Waveform Button

The Load Common Waveform button allows the user to access a set of 10 predefined
waveform profiles (Common Waveform 1 through 10) and load them into the GUI. Only
one selection can be active at a time. Depending on the selection being made, the
Channels (0-3) Waveform (Length Up to 32 Characters) text boxes (Section 3.4.8)
will be updated with a different waveform syntax.
Clicking the Load Common Waveform button activates the Common Waveforms
dialog window. The Common Waveforms dialog window is made up of a list box
including 10 items, which the users can choose from sequentially.

FIGURE 3-10: Common Waveforms Dialog Box.

3.4.16 Connection Status Indicator

The Connection Status indicator updates accordingly depending on whether there is
a working connection between the PC and the MUBPB001. There are two connection
status messages:

 2016 Microchip Technology Inc. DS20005656B-page 31

 - Not Connected (in red): the MUPB001 is not yet powered on or the USB connection is not established.
DS20005656B-page 32

HV7321 Ultrasound TX Pulser Evaluation Board User’s Guide

- Connected (in green): the MUPB001 is powered on and the USB connection is established.

3.5 GUI ELEMENTS SPECIFIC TO CW MODE-0

Selecting CW Mode-0 (Internally by HV7321) in the Transmission Mode list box (3.4.11) GUI determines a change of the
GUI elements displayed, as shown in Figure 3-11. This section provides a short overview of the GUI elements specific to
CW Mode-0. The numbered entries in Figure 3-11 (1 through 3) are described in subsections 3.5.1 through 3.5.3.

2
 2016 Microchip Technology Inc.

FIGURE 3-11: MUPB001 – HV7321_MD1730 GUI CW Mode-0 View.

 Software Description

3.5.1 CW Channels Group Box

The CW Channels group box enables users to set the frequency of the outputs and
the relative delays.
The CW Channels group box includes the CW0 Freq Divisor text box and 4 channel
check boxes each corresponding to CH0, CH1, CH2, and CH3.
Users can make from 1 to 4 selections at a time. Each channel text box has a
Delay (ns) text box associated thatusers can use to set the channel delay value. The
Delay (ns) text boxes become available once the channel text box is selected.
In CW0 Freq Divisor text box users can set the frequency of the CW signal. The CW
Frequency is calculated by dividing the to twice the CW0 Freq Divisor:
CW Frequency= (Transmit Clock Config)/(2 X CW0 Freq divisor)
Selecting the CH0, CH1, CH2, CH3 check boxes causes the Waveform screen area
(3.5.2) to be updated with a continuous signal waveform pattern. The waveform pat-
terns are color coded: green for CH0, dark red for CH1, orange for CH2 and purple for
CH3.

3.5.2 Waveform Screen Area

The Waveform Screen Area shows the active channels as continuous signals. The
signals displayed are not the actual measurements at the HV7321 output but visual
representations of what is expected at the output.

3.5.3 CW Voltages group box

The CW Voltages group box includes:
• 2 voltage text boxes corresponding to VCW- and VCW+: the values entered in
these text boxes will cause the representations of the signals displayed in the
Waveform Screen Area to change.
• the Default State drop-down list box where users can select between RTZ, RTZ+,
and HI-Z.

 2016 Microchip Technology Inc. DS20005656B-page 33

 3.6 GUI ELEMENTS SPECIFIC TO CW MODE-1
DS20005656B-page 34

HV7321 Ultrasound TX Pulser Evaluation Board User’s Guide

Selecting CW Mode-1 (Externally by MD1730) in the Transmission Mode list box (3.4.11) GUI determines a change of
the GUI elements displayed, as shown in Figure 3-12. This section provides a short overview of the GUI elements specific to
CW Mode-1. The numbered entries in Figure 3-12 (1 through 4) are described in subsections 3.6.1 through 3.6.3.

3
2
 2016 Microchip Technology Inc.

FIGURE 3-12: MUPB001 – HV7321_MD1730 GUI CW Mode-1 View.

 Software Description

3.6.1 CW Channels Group Box

In CW Mode-1, there are 8 transmission channels. The channels are selected and con-
figured in the CW Channels group box. The CW Channels group box includes:
• the Channel drop-down list box in which users can select from 1 to 7 channels
sequentially (CW0, CW1, CW2, CW3, CW4, CW5, CW6, CW7). Unlike other
cases, the simple selection of the channel does not enable the channel.
• the Enable check box: the channels selected in the Channel drop-down list box
are enabled/disabled by checking/unchecking the Enable check box. Enabled
channels are marked with a green indicator in the channel enable status screen
area.
• the channel enable status screen area is made up of 8 status indicators (gray =
disabled, green = enabled), 8 channel labels (CH0, CH1, CH2, CH3, CH4, CH5,
CH6, CH7), and 8 corresponding Delay (ns) text boxes.
• the CH PHD (0-255) (Channel Phase Delay Digital Value) text box: users can set
the channel phase delay digital value of the CW signal by choosing a value
between 0 and 255. The value entered in this text box is used to generate the CH
phase delay in nanoseconds. The equivalent delay in nanoseconds will be calcu-
lated and displayed in the Delay (ns) text boxes corresponding to the channels
selected. For the Delay (ns) text boxes to be automatically updated with the
equivalent channel phase delay digital value, it is necessary to first input a value
in the CH PHD (0-255) text box and then click outside the text box.

3.6.2 Waveform Screen Area

The Waveform Screen Area shows the active channels as continuous signals. The
signals displayed are not the actual measurements at the HV7321 output but visual
representations of what is expected at the output.

3.6.3 Frequency Group Box

The Frequency group box is used to modulate the frequency of the CW.
The Frequency group box includes two text boxes:
• the CWFD (0-255) (Continuous Wave Frequency Digital Value) text box: the value
entered in this text box is used to generate the CW frequency in kHz.
• the CW Frequency (kHz) text box: this text box shows the equivalent value in kHz
of the value entered in the CWFD (0-255) text box. For the CW Frequency (kHz)
text box to be automatically updated with the equivalent CWFD value, it is neces-
sary to first define the CWFD value and then click outside the text box.
Note: For frequency and delay calculation details, refer to the MD1730 Data Sheet.

3.7 CONFIGURING THE TRANSMISSION OF SIGNALS USING THE GUI

Following is a step-by-step guide for generating Pulsed-Echo signals, CW Mode-0 sig-
nals and CW Mode-1 signals at the HV7321 output. After each set of instructions, an
oscilloscope screen shot taken at the HV7321 output is presented.

3.7.1 Generating Pulsed-Echo Signals

1. Start the MUPB001 - HV7321_MD1730 GUI.
- make sure DC-IN LED is ON when the power input is connected to the
MUPB001
2. Switch on the MUPB001 to power the board.
- check that PWR_OK, FPGA_OK LEDs are ON, and the USB_Fault LED is
OFF.

 2016 Microchip Technology Inc. DS20005656B-page 35

HV7321 Ultrasound TX Pulser Evaluation Board User’s Guide

- the Connection Status indicator (3.4.16) must show “Connected” (in green).
3. Set the default state in Pulsed-Echo Voltages group box (3.4.10) to RTZ
(Ground) by making sure RTZ is selected in the Default State drop-down list box.
4. Set the transmit clock configuration to 200 MHz by making sure 200 MHz is
selected in the Transmit Clock Config (MHz) group box. Click the Initialize
MUPB button to activate the MUPB clock (3.4.9).
5. Make sure the default value of 200000 ns is input into the Line Duration (ns) text
box (3.4.3).
6. Check the Log Status screen area (3.4.5) and look for the confirmation message
that the initialization started and completed with no errors.
7. Check that the default transmission mode, Pulsed_Echo, is selected in the
Transmission Mode list box (3.4.11).
8. In the Pin State group box, select PWS, OEN and REN by selecting the corre-
sponding check boxes. Leave MODE unselected. Click the Send button (3.4.7).
9. In the Transmit Entry group box set the Entry Index (entries to transmit) to 1
and the TX Output Freq Divisor to 20 (3.4.8). This sets one group of pulses
during the line duration, and a pulse of 100 ns.
10. Set the relative delay between channels by entering the following values into the
Channels (0-3) Delay (ns) text boxes: 30, 60, 90, 120. Set the waveform length
by inputting these values into the Channels (0-3) Waveform (Length Up to 32
Characters) text boxes: 1032R, 1010R, 3232R, 0123R. See Figure 3-13.

FIGURE 3-13: Transmit Entry Group Box Configured for Pulsed-Echo.

11. Click the Start/Stop button (3.4.6).
12. An oscilloscope screenshot of the waveform generated is shown in Figure 3-14.

DS20005656B-page 36  2016 Microchip Technology Inc.

 Software Description

CH0 CH3

FIGURE 3-14: Pulsed-Echo Output.

3.7.2 Generating CW Mode-0 Signals

1. Start the MUPB001 - HV7321_MD1730 GUI.
- connect the +12V power connector to MUPB001 board and make sure that
the green DC_IN LED is ON indicating that the power connection is
successful.
2. Switch on the MUPB001 to power the board.
- check that PWR_OK, FPGA_OK LEDs are ON, and the USB_Fault LED is
OFF.
- the Connection Status indicator (3.4.16) must show “Connected” (in green).
3. Set the default state in Pulsed-Echo Voltages group box (3.4.10) to RTZ
(Ground) by making sure RTZ is selected in the Default State drop-down list box.
4. Set the transmit clock configuration to 200 MHz by making sure 200 MHz is
selected in the Transmit Clock Config (MHz) group box. Click the Initialize
MUPB button to activate the MUPB clock (3.4.9).
5. Check the Log Status screen area (3.4.5) and look for the confirmation message
that the initialization started and completed with no errors.
6. Check that the CW Mode-0 (Internally by HV7321) transmission mode is
selected in the Transmission Mode list box (3.4.11).
7. In the Pin State group box, select OEN and REN by selecting the corresponding
check boxes. Leave PWS and MODE unselected. Click the Send button (3.4.7).
- make sure MDEN and OEN LEDs on HV7321 Ultrasound TX Pulser Evalua-
tion Board are ON.
8. In the CW Channels group box (3.5.1), enter 20 in the CW0 Output Freq Divi-
sor. This sets a CW frequency of 5 MHz. Activate CH0, CH2 and CH3 by clicking
the corresponding check boxes. Set the delay between channels as
CH0 Delay(ns):10, CH2 Delay(ns):20, CH3 Delay(ns):40.
9. Click the Start/Stop button (3.4.6).
10. An oscilloscope screenshot of the waveform generated is shown in Figure 3-15.

 2016 Microchip Technology Inc. DS20005656B-page 37

HV7321 Ultrasound TX Pulser Evaluation Board User’s Guide

CH2 CH3

FIGURE 3-15: CW Mode-0 Output.

3.7.3 Generating CW Mode-1 Signals

1. Start the MUPB001 - HV7321_MD1730 GUI.
- connect the +12V power connector to MUPB001 board and make sure that
the green DC_IN LED is ON indicating that the power connection is
successful.
2. Switch on the MUPB001 power switch to power the board.
- check that PWR_OK, FPGA_OK LEDs are ON, and the USB_Fault LED is
OFF.
- the Connection Status indicator (3.4.16) must show “Connected” (in green).
3. Set the transmit clock configuration to 200 MHz by making sure 200 MHz is
selected in the Transmit Clock Config (MHz) group box. Click the Initialize
MUPB button to activate the MUPB clock (3.4.9).
4. Check the Log Status screen area (3.4.5) and look for the confirmation message
that the initialization started and completed with no errors.
5. Check that the CW Mode-1(Externally by MD1730) transmission mode is
selected in the Transmission Mode list box (3.4.11).
6. In the Pin State group box, select EN and SPIB by selecting the corresponding
check boxes. Leave CBE0 and CBE1 unselected (3.4.7).
- make sure MODE, MDEN and OEN LEDs on HV7321 Ultrasound TX Pulser
Evaluation Board are ON.
7. In the Frequency, CWFD (0 – 255) text box (3.6.3) enter 20. This provides a CW
frequency of 5 MHz. Click outside the text box to update the value shown in the
CW Frequency (kHz) text box to 5000 kHz.
8. Enable CH0, CH2, and CH3 in the CW Channels group box (3.6.1). Make sure
these channel status indicators are green. Set the channel delay as follows:
- CH0 Delay(ns):10 by entering 2 in the CH PHD (0-255) text box correspond-
ing to CW0
- CH2 Delay(ns):20 by entering 4 in the CH PHD (0-255) text box correspond-
ing to CW2
- CH3 Delay(ns):40 by entering 8 in the CH PHD (0-255) text box

DS20005656B-page 38  2016 Microchip Technology Inc.

 Software Description
corresponding to CW3.
9. Click the Start/Stop button (3.4.6).
10. An oscilloscope screenshot of the waveform generated is shown in Figure 3-16.

CH0

FIGURE 3-16: CW Mode-1 Output (VCW+ = +5V, VCW- = -5V).

 2016 Microchip Technology Inc. DS20005656B-page 39

HV7321 Ultrasound TX Pulser Evaluation Board User’s Guide

NOTES:

DS20005656B-page 40  2016 Microchip Technology Inc.

 HV7321
ULTRASOUND TX PULSER
EVALUATION BOARD
USER’S GUIDE
Chapter 4. PCB Design and Layout Notes
4.1 PCB LAYOUT TECHNIQUES FOR HV7321 & MD1730 ULTRASOUND PULSER
The HV7321 is a high-voltage, high-current and high-frequency nanosecond pulse
generator integrated circuit. The PCB design and layout are important key develop-
ment steps to guarantee the success of the design implementation.

4.1.1 High-Voltage, High-Speed Grounding, and Layout Techniques

for the HV7321
The large thermal pad at the bottom of the HV7321 device is internally connected to
the IC substrate (VSUB). This thermal pad should be connected to 0V or GND externally
on the PCB.
The designer needs to pay attention to the connecting traces on the output TX0-3, as
these are the high-voltage and high-speed traces. In particular, controlled impedance
of 50to the ground plane and more trace spacing needs to be applied in this situation.
High-speed PCB trace design practices that are compatible with about 200 MHz oper-
ating speeds are used for the HV7321 Ultrasound TX Pulser Evaluation Board PCB
layout. The internal circuitry of the HV7321 can operate at rather high frequencies, with
the primary speed limitation being the load capacitance.
Because of the high-speed and high-transient currents that result when driving
capacitive loads, the supply-voltage bypass capacitors, and the driver to the FET
gate-coupling capacitors should be as close to the pins as possible. The GND pin
should have low inductance feed-through via connections that are connected directly
to a solid ground plane. Ground plane has to be the second layer of the PCB.
It is advisable to minimize the trace length to the ground plane, and insert a ferrite bead
in the power supply lead to the capacitor to prevent resonance in the power supply
lines. For applications that are sensitive to jitter and noise, and when using multiple
HV7321 ICs, insert an additional ferrite bead between the supply lines of each chip.
To reduce inductance particular attention should be paid to minimizing trace lengths
and using sufficient trace width. Surface-mount components are highly recommended.
Since the output impedance of the HV7321 high-voltage power stages is very low, in
some cases, it is desirable to add a small value resistor in series with the TX3-0 outputs
to obtain better waveform integrity at the load terminals after ultrasound probe long
cables.
The impedance of the output resistors added to that of the HV7321 power stage output
should match the probe cable impedance since at the other end of the transmission line
there are normally piezoelectric elements with large parasitic capacitance to ground.
However, this reduces the output voltage slew rate at the terminals of a capacitive load.
Attention should be paid to the parasitic coupling from the outputs to the input signal
terminals of the HV7321. This feedback may cause oscillations or spurious waveform
shapes on the edges of signal transitions. Since the input operates with signals down
to 2.5V, even small coupling voltages may cause problems. The use of a solid ground
plane and good power and signal layout practices can prevent this problem.

 2016 Microchip Technology Inc. DS20005656B-page 41

HV7321 Ultrasound TX Pulser Evaluation Board User’s Guide

The user should also ensure that the circulating ground return current from a capacitive
load cannot react with common inductance to create noise voltages in the input logic
circuitry.

4.1.2 High-Frequency Differential Clock, and Low Phase Noise PCB

Layout Techniques for the MD1730
The low phase noise feature has to be implemented on three aspects of the design: on
the IC, on the signal clock source and on the PCB layout.
Choosing low-ESR and low-ESL decoupling capacitors, and implementing a
low-EMI/RFI PCB layout, helps get the best phase noise performance on the MD1730.
The clock input of the MD1730 is designed to take LVDS, LVCMOS 2.5V or SSTL 2.5V
differential signals. The suggested clock line traces impedance reference to GND plane
is 50, or 100differentially.
In case multiple MD1730s need be used on the same PCB, it is highly recommended
to use a differential clock buffer to drive the clock bus. The clock bus should consist of
a 50/50coupled differential clock line pair. The 50termination resistor on both
lines to GND should be placed next to the last device clock input pin. If the clock source
or buffer is powered by a higher than 2.5V VCC, then AC coupling should be used.
Refer to Figure 4-1 for details.

VLL VDD VGP VCW+

CBE1 11
CBE0 35

CPF 17
CPF 29
VCW+ 18
VCW+ 28
VGP 32
VDD 6
VLL 4
EN 1
VLL
CKB0 34

C55
36 SPIB CW0 27
R42 13 TXRW CW1 26
0Ÿ 1 μF
CW2 25
7 CW3 24
SCK
+3.3V 8 CS
R40 R40 9 U2
SDI MD1730
C54 100Ÿ 100Ÿ 10 SDO
0.1 μF CW4 22
CLK_P TP56 2 CW5 21
CLK
CW6 20
Differential Clock
CW7 19
Source
TP58 3
GND
33 GND
5 GND

31 CNF
CNF
VCW-
CLK CW- CKB1 12
GN
VGN

CLK_N
14 V

30 V
C53
16

15
23
37

0.1 μF R34 R30

100Ÿ 100Ÿ

FIGURE 4-1: AC Coupling for MD1730 Differential Clock Inputs.

4.1.3 Selecting the Decoupling Capacitors

The voltage-supply pins (VLL, VDD, VGP, VGN, VPP0/1 and VNN0/1) can provide fast tran-
sient currents of up to 2.0 to 2.8A each. Each supply pin should be connected to a
low-impedance bypass capacitor. A surface-mounted ceramic capacitor of
1.0-to-2.2 μF capacitance should be used.
When it comes to capacitor voltage rating, only the capacitors from VPP0/1 and VNN0/1
pins to GND must be 100V high-voltage type. Low-voltage rating capacitors of 10 to
16V can be used for VLL, VDD, VGP, VGN, CPOS, CNEG to GND, CPF0/1 to VPP0/1, and
CNF0/1 to VNN0/1 respectively.
Additional attention should be paid to what type of ceramic capacitor is selected for
these bypass capacitors with regard to the low-impedance, low-voltage and
low-temperature coefficient, including the very fast dV/dt of the pulse rising and falling
edges. For these purposes it is recommended to use X7R, and X5R capacitors or other
more advanced multilayer-ceramic types.

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 HV7321 Ultrasound TX Pulser Evaluation Board User’s Guide

4.1.4 Return-Current Design on PCB Layout

Many EMI problems associated with high-speed circuits occur due to improper design
of the return-current path. PCB designers often put a lot of effort into carefully designing
traces with the proper length or proper transmission line impedance but neglect the
return-current path that completes the current loop. Such EMI problems can usually be
avoided if sufficient attention is paid to the return-current path.
The decoupling capacitor should be placed on the PCB as closely as possible to the
pin being decoupled. However, the location on the PCB to install the decoupling capac-
itor is of equal importance. Usually a decoupling capacitor is placed where the
high-voltage, high-speed return current ends. In that sense, the placement of the
decoupling capacitor will also affect the EMI/RFI performance. The high-peak return
current will travel, on the ground plane, from the load back to the decoupling capacitor
where the ground via or vias are. The HV7321 pulser output traces on top layer or bot-
tom layer carry high-peak currents, directing the return current to the ground plane, by
means of the electromagnetic coupling effect. Therefore, these output traces together
with the ground plane form the transmission line that supports a transverse electromag-
netic (TEM) wave. In the region where the TEM pulse exists there is a time-varying
electric field between the trace and the ground reference plane, the same as in simple
micro-strip and strip-line cases. The electric field requires current to be in the two con-
ductors. This current will be in opposite directions in the conductors, and must exist
simultaneously with the pulse. The current must flow in both conductors as the pulse
moves down the trace. Any discontinuity or break in these current paths, in either the
trace or the ground plane, will affect the current, and compromise the signal-integrity or
the EMI/RFI performance.
It is very important to keep the low-voltage logic signal traces, the middle-voltage gate
driver (such as VDD, VGP, VGN, CPF, CNF), and the high-voltage output stage traces
between their decoupling capacitors to the HV7321 respective pin and ground
return-current paths all electromagnetically independent of each other and not too
close together. These are the challenges of a good PCB layout design while
maintaining ground-integrity and keeping the solid ground plane.

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HV7321 Ultrasound TX Pulser Evaluation Board User’s Guide

NOTES:

DS20005656B-page 44  2016 Microchip Technology Inc.

 HV7321
ULTRASOUND TX PULSER
EVALUATION BOARD
USER’S GUIDE
Appendix A. Schematic & Layouts
A.1 INTRODUCTION
This appendix contains the following schematics and layouts for the HV7321 Ultra-
sound TX Pulser Evaluation Board (ADM00659) and for the MUPB001 Microchip Ultra-
sound Platform Board (ADM00679):
• HV7321 Ultrasound TX Pulser Evaluation Board:
- ADM00659 – Schematic
- ADM00659 – Top Copper and Silk
- ADM00659 – Top Copper
- ADM00659 – Inner 1 – GND
- ADM00659 – Inner 2 – PWR
- ADM00659 – Bottom Copper
- ADM00659 – Bottom Copper and Silk
• MUPB001 Microchip Ultrasound Platform Board:
- ADM00679 – Schematic (Connection)
- ADM00679 – Schematic (Power Supply)
- ADM00679 – Schematic (USB to SPI)
- ADM00679 – Schematic (Programmable Clock)
- ADM00679 – Schematic (FPGA)
- ADM00679 – Schematic (FPGA Decoupling Capacitors)
- ADM00679 – Schematic (Connectors)
- ADM00679 – Top Silk
- ADM00679 – Top Copper and Silk
- ADM00679 – Top Copper
- ADM00679 – Inner 1
- ADM00679 – Inner 2
- ADM00679 – Inner 3
- ADM00679 – Inner 4
- ADM00679 – Bottom Copper
- ADM00679 – Bottom Copper and Silk
- ADM00679 – Bottom Silk

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 A.2 ADM00659 – SCHEMATIC
DS20005656B-page 46

HV7321 Ultrasound TX Pulser Evaluation Board User’s Guide

SEL0 MODE PWS CBE0 MDEN OEN OTP VPP0 VPP1
TP1
OTP
1

3
VLL TP2 R1 TP3 TP4 R2
D1 D2 D3 D4 D5 D6 D7 VDD 0.1 0.1 TX0 R3 1 J1
RED GRN Y LW Y LW RED RED Y LW U6 C112 50
25AA010A (+5V) C1 C2 1

2
VLL CSB 1 8 0.1 VCC D17B J19 2
2 CS VCC 7 3 4 (+2.5V) 1u 10V 1u 10V C3 C4 C5 C6
MISO
2

2
R5 R6 R7 R8 R9 R10 R11 C7 3 SO HOLD 6 U3 VLL TP5 1u 100V
WP SCK SCLK
4 5 MOSI MCP1727-2502E/SN R12 VGP 1u 100V 1u 100V 1u 100V
200 200 200 200 200 200 200 0.22 R44 VSS SI 1 8 TP6
0 2 VIN VOUT 7 0 1u 10V C11 R13
C8 VIN SENSE OUT1 C10 C13 220p 250V 1K 1W

CDELAY

6
PWRGD
1u 10V C9 2u 16V C17
3 1u 10V D17A C12 TP7 C16 1u 10V

GND
SHDN C14 C15 1u 10V 1u 10V TP8 TP9

1
SEL0 MODE PWS CBE0 MDEN OEN 1u 10V 1u 10V

3
4

6
R39 TX1
PWR VLL C51 50 1 J2
A1 C1 1K 1nF R14

10

21
60

23

56
57
24
25

55
26

47
34

48
33
B1 A1 C1 D1 TP15 1

2
B1 D1 OTP
BG1 DG1 TP10 J20 2

VGP
VLL

VPP0
VPP0
VPP0
VPP0

CPF0
CPF0

VPP1
VPP1

CPF1
CPF1
VDD
VDD
A2 BG1 DG1 C2 20 (+5V)
NEG0 A2 C2 OEN OTP OTP
B2 D2 TP11
POS0 B2 D2 REN
BG2 DG2 OEN TP12 6 41 C18
A3 BG2 DG2 C3 11 OEN CPOS 1u 10V
NEG1 A3 C3 NEG2 REN REN
B3 D3 C19 R16
POS1 B3 D3 POS2
BG3 DG3 220p 250V 1K 1W
A4 BG3 DG3 C4 46
SEL0 A4 C4 NEG3 TX0
B4 D4 TP17
SEL1 B4 D4 POS3
BG4 DG4 SEL0 TP13 62
BG4 DG4 SEL0

3
A5 C5 TP16 63 45 RX0
SEL2 A5 C5 MODE NEG0 NEG0 RX0 RX0 R17
B5 D5 TP14 64 TX2 1 J3
SEL3 B5 D5 PWS POS0 POS0 50
BG5 DG5
A6 BG5 DG5 C6 TP18 2 42 1
SCK MDEN SEL1

2
B6 A6 C6 D6 TP19 3 SEL1 TX1 J21 2
CS B6 D6 SPIB NEG1 NEG1
BG6 DG6 POS1 TP20 4
A7 BG6 DG6 C7 POS1 43 RX1
SDI A7 C7 CBE0 RX1 RX1
SDO B7 D7 SEL2 TP21 12 U1
B7 D7 CBE1 SEL2
TP66 BG7 DG7 NEG2 TP22 13
TP67 A8 BG7 DG7 C8 TP23 14 NEG2 HV7321K6 39 C20 R19
TXTRIG A8 C8 TXRW POS2 POS2 TX2
B8 D8 CKB1 220p 250V 1K 1W
RXTRIG B8 D8
BG8 DG8 TP27 SEL3 TP24 16 TP30
A9 BG8 DG8 C9 TP28 TP25 17 SEL3 38 RX2
A9 C9 NEG3 NEG3 RX2 RX2
B9 D9 POS3 TP26 18
B9 D9 POS3

3
TP32 BG9 DG9
TP33 A10 BG9 DG9 C10 TP29 61 35 TX3 50 1 J4
OSCEN A10 C10 CLK_N MODE MODE TX3
B10 D10 PWS TP31 7 R20
SY NC B10 D10 CLK_P PWS
BG10 DG10 C53 8 1

2
BG10 DG10 0.1 C54 CLK 36 RX3 J22 2
R31 CKB0 RX3 RX3
PWR J5 TE6469169-1 +3V3 0.1 SY NC TP34 9
C57 C56 INF 59 GND
1u 10V J23 TE6469169-1 1u 10V R40 R41 R32 22 GND
A1 C1 100 100 VLL GND 44
A1 C1 D1 1K RGND
B1 R42 R43 1 37 C21 R22
BG1 B1 D1 DG1 TP69 C55 0 VLL VDD VGP 0 5 CWIN0 RGND 220p 250V 1K 1W

CNEG
BG1 DG1 C2 CWIN1

VNN0
VNN0
VNN0
VNN0
VNN2
VNN2

CNF0
CNF0

VNN1
VNN1

CNF1
CNF1
A2 TP70 1u 10V 15

VGN
SCLK A2 C2 D2 CWIN2
CSB B2 C22 C23 C24 19 VDD
BG2 B2 D2 DG2 1u 10V 1u 10V 2u 16V VCW+ CWIN3
A3 BG2 DG2 C3 TP36
TP38

58

40

52
53
28
29
30
51

27
54

31
50

32
49
MISO A3 C3 D3
B3 C25 C26 C28 R23
MOSI B3 D3 DG3
BG3 1u 10V 1u 10V 2u 16V TP35 TP39 TP43 50
A4 BG3 DG3 C4 TP37 C27 C32 C33 C34 C35 R24
A4 C4 D4 CBE0 TP42
B4 2u 16V C30(-5V) C31 1u 10V 1u 10V 1u 10V 1u 10V 499 C36 C29
BG4 B4 D4 DG4 TP40 1u 10V 1u 10V 1u 10V 0.22
BG4 DG4 C5 CBE1 RX0 RX1 RX2 RX3
A5
B5 A5 C5 D5 TP44 C37 C38 C39 C40
B5 D5 DG5 MDEN VGN
BG5 TP41
11
35

32

28
18

29
17
1

A6 BG5 DG5 C6 1u 100V 1u 100V 1u 100V 1u 100V J6 J7 J8 J9 R27 TP45

B6 A6 C6 D6 34 R25 R26 2 2 2 2 249
VCW+
VCW+
VGP
CBE1
CBE0

VLL
EN

VDD

CPF
CPF

B6 D6 DG6 CKB0

1
BG6 0.1 0.1 1 1 1 1
A7 BG6 DG6 C7 TP46 36 27 CW0 2 -
A7 C7 D7 SPIB SPIB CW0 VNN0 VNN1
B7 TP47 13 26 CW1 C41 6 LNAOUT
B7 D7 DG7 TXRW TXRW CW1

3
BG7 25 CW2 VCW- VCW+ 0.01 COM 3
BG7 DG7 C8 CW2 CW3 + TP50
A8 U2 24 U4
A8 C8 D8 CW3

2
B8 SCK TP48 7 BAV99/SOT_1 AD8099

4
8
5
BG8 B8 D8 DG8 TP49 8 SCK MD1730 TP52 D9 R28 R29 C43
CS
 2016 Microchip Technology Inc.

A9 BG8 DG8 C9 TP51 9 CS 22 CW4 TP54 J15 J16 J17 J18 TP62 D18 1K 499 C42 2pF
A9 C9 D9 SDI SDI CW4
B9 TP53 10 21 CW5 TP55 2 2 2 2 0.01
SDO

2
B9 D9 DG9 SDO CW5

3
BG9 20 CW6 TP57 1 1 1 1
BG9 DG9 C10 CW6
VCW-
VCW-

A10 TP56 2 19 CW7 TP59 1 J14 BAV99/SOT_1

GND
GND
GND

VGN
VGN

CNF
CNF

CLK_P

3
B10 A10 C10 D10 TP58 3 CLK CW7 12
B10 D10 DG10 CLK_N CLK CKB1 R18
BG10 R33
CKB1

2
BG10 DG10 (Up to 200MHz) 50 VPP0 VNN0
50
37
33
5

23
14

16
30

15
31

R34 R30 TP60

2
100 100 (DAP=0) VDF TP63 TP64 D19 D20
(+4.7V) (+5V) (+5V) (-10V) (+10V) (+2.5V) 1u 10V 1u 10V B1100-13 B1100-13
VCC PWR VDD VGN VGP VLL TP61 TP65
C44 C45 VCW+ VCW- VPP0 VNN0 VPP1 VNN1
4

INF INF

1
D8B D10A D11B R37 C52 R35 R36 2u 16V 2u 16V 2u 16V 2u 16V
X1
6

2
INF 0.01 D13 D14 D15 D16
3

1
C47 C48 C49 C50 B1100-13 B1100-13 B1100-13 B1100-13
VDD

1
2
3

1
2
3

1
2
3
1 4 VGN VCW- D12B D12A
EN OUT1
D10B
4

TP68 R38 2 5 MH1 MH2 MH3 MH4 J11 2 J12 J13

1
3 4 200 NC OUT2
GND
6

1u 10V
6

D8A 0 to +/-100 VPP0&VNN0 0 to +/-100V VPP1/VNN1

1
2
3
4
5
6

C46 D11A
1

OSCEN FXO-LC720R-240 (Note: Must VPP0>=VPP1 & VNN0<=VNN1)

1

J10
 HV7321 Ultrasound TX Pulser Evaluation Board User’s Guide

A.3 ADM00659 – TOP COPPER AND SILK

A.4 ADM00659 – TOP COPPER

 2016 Microchip Technology Inc. DS20005656B-page 47

HV7321 Ultrasound TX Pulser Evaluation Board User’s Guide

A.5 ADM00659 – INNER 1 – GND

A.6 ADM00659 – INNER 2 – PWR

DS20005656B-page 48  2016 Microchip Technology Inc.

 HV7321 Ultrasound TX Pulser Evaluation Board User’s Guide

A.7 ADM00659 – BOTTOM COPPER

A.8 ADM00659 – BOTTOM COPPER AND SILK

 2016 Microchip Technology Inc. DS20005656B-page 49

 A.9 ADM00679 – SCHEMATIC (CONNECTION)
DS20005656B-page 50

HV7321 Ultrasound TX Pulser Evaluation Board User’s Guide

FPGA01.SchDoc Connector.SchDoc
MUPB001_PWR.SchDoc
USB_TO_SPI.SchDoc IO_2V5_0_P
IO_2V5_0_P IO_2V5_0_P
IO_2V5_0_N
SPI_CSBAR IO_2V5_0_N IO_2V5_0_N
CSBAR CSBAR IO_2V5_1_P
SPI_SCK IO_2V5_1_P IO_2V5_1_P
SCK SCK IO_2V5_1_N
SPI_MOSI IO_2V5_1_N IO_2V5_1_N
MOSI MOSI
SPI_MISO
MISO MISO IO_2V5_2_P
IO_2V5_2_P IO_2V5_2_P
IO_2V5_2_N
FPGA_RST IO_2V5_2_N IO_2V5_2_N
FPGA_RST FPGA_RST IO_2V5_3_P
SPI_RST IO_2V5_3_P IO_2V5_3_P
SPI_RST SPI_RST IO_2V5_3_N
USB_CONFIG IO_2V5_3_N IO_2V5_3_N
USB_CONFIG USB_CONFIG IO_2V5_4_P
IO_2V5_4_P IO_2V5_4_P
IO_2V5_4_N
EXT_INT IO_2V5_4_N IO_2V5_4_N
EXT_INT EXT_INT IO_2V5_5_P
FPGA_DONE IO_2V5_5_P IO_2V5_5_P
FPGA_DONE FPGA_DONE IO_2V5_5_N
IO_2V5_5_N IO_2V5_5_N
PROGB_IN
GP8 PROGB_IN IO_2V5_6_P
IO_2V5_6_P IO_2V5_6_P
IO_2V5_6_N
GP4 IO_2V5_6_N IO_2V5_6_N
GP4 GP4 IO_2V5_7_P
GP7 IO_2V5_7_P IO_2V5_7_P
GP7 GP7 IO_2V5_7_N
IO_2V5_7_N IO_2V5_7_N
IO_2V5_8_P
IO_2V5_8_P IO_2V5_8_P
IO_2V5_8_N
IO_2V5_8_N IO_2V5_8_N
IO_2V5_9_P
IO_2V5_9_P IO_2V5_9_P
IO_2V5_9_N
IO_2V5_9_N IO_2V5_9_N
PROG_CLK.SchDoc
IO_2V5_10_P
CTRL_OEC IO_2V5_10_P IO_2V5_10_P
CTRL_OEC CTRL_OEC IO_2V5_10_N
CTRL_OED IO_2V5_10_N IO_2V5_10_N
CTRL_OED CTRL_OED IO_2V5_11_P
CTRL_OEB IO_2V5_11_P IO_2V5_11_P
CTRL_OEB CTRL_OEB IO_2V5_11_N
IO_2V5_11_N IO_2V5_11_N
IO_2V5_12_P
CTRL_SCK IO_2V5_12_P IO_2V5_12_P
CTRL_SCK CTRL_SCK IO_2V5_12_N
CTRL_CSB IO_2V5_12_N IO_2V5_12_N
CTRL_CSB CTRL_CSB IO_2V5_13_P
SDO IO_2V5_13_P IO_2V5_13_P
SDO SDO IO_2V5_13_N
CTRL_SDI IO_2V5_13_N IO_2V5_13_N
CTRL_SDI CTRL_SDI IO_2V5_14_P
IO_2V5_14_P IO_2V5_14_P
40MHz_QA1_N IO_2V5_14_N
40MHz_N 40MHz_N IO_2V5_14_N IO_2V5_14_N
40MHz_QA1_P
40MHz_P 40MHz_P
IO_3V3_1
IO_3V3_1 IO_3V3_1
CLK0_P IO_3V3_2
CLK0_P CLK0_P IO_3V3_2 IO_3V3_2
CLK0_N IO_3V3_3
CLK0_N CLK0_N IO_3V3_3 IO_3V3_3
IO_3V3_4
IO_3V3_4 IO_3V3_4
CLK1_P IO_3V3_5
CLK1_P CLK1_P IO_3V3_5 IO_3V3_5
CLK1_N
CLK1_N CLK1_N
CLK2_P
CLK2_P
CLK2_P CLK2_N
CLK2_P CLK2_N
CLK2_N
CLK2_N
CLK4
CLK4
CLK4
CLK4
IO_2V5_15_P
IO_2V5_15_P IO_2V5_15_P
IO_2V5_15_N
IO_2V5_15_N IO_2V5_15_N
IO_2V5_16_P
CLK3_P IO_2V5_16_P IO_2V5_16_P
CLK3_P IO_2V5_16_N
CLK3_N IO_2V5_16_N IO_2V5_16_N
CLK3_N IO_2V5_17_P
IO_2V5_17_P IO_2V5_17_P
IO_2V5_17_N
CLK5 IO_2V5_17_N IO_2V5_17_N
CLK5 IO_2V5_18_P
IO_2V5_18_P IO_2V5_18_P
IO_2V5_18_N
IO_2V5_18_N IO_2V5_18_N
IO_2V5_19_P
IO_2V5_19_P IO_2V5_19_P
IO_2V5_19_N
IO_2V5_19_N IO_2V5_19_N
IO_2V5_20_P
IO_2V5_20_P IO_2V5_20_P
IO_2V5_20_N
IO_2V5_20_N IO_2V5_20_N
IO_2V5_21_P
IO_2V5_21_P IO_2V5_21_P
IO_2V5_21_N
IO_2V5_21_N IO_2V5_21_N
IO_3V3_6_P
IO_3V3_6_P IO_3V3_6_P
IO_3V3_6_N
IO_3V3_6_N IO_3V3_6_N
IO_3V3_7_P
IO_3V3_7_P IO_3V3_7_P
IO_3V3_7_N
IO_3V3_7_N IO_3V3_7_N
 2016 Microchip Technology Inc.

IO_3V3_8_P
IO_3V3_8_P IO_3V3_8_P
IO_3V3_8_N
IO_3V3_8_N IO_3V3_8_N
IO_3V3_9_P
IO_3V3_9_P IO_3V3_9_P
IO_3V3_9_N
IO_3V3_9_N IO_3V3_9_N
IO_3V3_10_P
IO_3V3_10_P IO_3V3_10_P
IO_3V3_10_N
IO_3V3_10_N IO_3V3_10_N
IO_3V3_11_P
IO_3V3_11_P IO_3V3_11_P
IO_3V3_11_N
IO_3V3_11_N IO_3V3_11_N
IO_3V3_12_P
IO_3V3_12_P IO_3V3_12_P
IO_3V3_12_N
IO_3V3_12_N IO_3V3_12_N
IO_3V3_13_P
IO_3V3_13_P IO_3V3_13_P
IO_3V3_13_N
IO_3V3_13_N IO_3V3_13_N
IO_3V3_14_P
IO_3V3_14_P IO_3V3_14_P
IO_3V3_14_N
IO_3V3_14_N IO_3V3_14_N
IO_3V3_15 IO_3V3_15
IO_3V3_16 IO_3V3_16
IO_3V3_17 IO_3V3_17
CLK3_P
CLK3_N

CLK5
 A.10 ADM00679 – SCHEMATIC (POWER SUPPLY)
 2016 Microchip Technology Inc.

C41

22000pF
50V
0603

10
U3 ON-POWER ON D5V
L1 TP1
VIN 1 1 2

BOOST
J6
D1 SW
1 2 12 XAL6060
VIN SW
3 3 13 Via_2.5x1.5
VIN SW C42 C43 C44 C45 C46 D2
2 20BQ030P R18 16 R16
C47 C48 C49 SW 0.1uF 10uF 10uF 10uF 10uF 30V
1k C50 39k
POWER 2.5mm 10uF 10uF 10uF 50V 10V 10V 10V 10V
0603 0.1uF 0603
35V 35V 35V 0603 0805 0805 0805 0805
5% 50V 9 5 1%
1206 1206 1206 EN VFB
0603
LD2
8

SGND

PGND
PGND
GREEN PG
GND_D R21

EP
8.66k
GND_D
R19 GND_D
0603

4
17
14
15
GND_D 390R
1%
0603
5%
GND_D
SW1
1
GND_D
2
3

SLIDE SPDT
GND_D

D5V MCP172X ADJ DFN-8 1V2_VCCINT D5V MCP172X ADJ DFN-8 3V3_VDD
TP2 TP4
1 8 1 8
VIN VOUT VIN VOUT
2 2 Via_2.5x1.5
VIN VIN R26
R23 7 R17 Via_2.5x1.5 7
C51 C52 ADJ C53 C54 D3 C59 C60 ADJ 69.8k C61 C62 D4
10k 3 6 19.1k 3 6
10uF 0.1uF SHDN CDELAY 10uF 0.1uF 30V 10uF 0.1uF SHDN CDELAY 0603 10uF 0.1uF 30V
0603 9 0603 9
10V 50V EP 10V 50V 10V 50V EP 1% 10V 50V
5% 5 4 1% 5 4
0805 0603 PWRGD GND 0805 0603 0805 0603 PWRGD GND 0805 0603
R29
R22
PG_3V3_CLK U4 U6 10k
10k
0603
0603
GND_D GND_D 1%
1%
PG_1V2_VCCINT

D5V D5V GND_D

GND_D
R24 R30

10k 10k

PG_3V3_VDD
0603 0603
5% 5%

3.6V (Supply to Ripple Blocker)

D5V MCP172X ADJ DFN-8 2V5_VDD D5V MCP172X ADJ DFN-8 3V3_CLK
TP3 TP5
1 8 1 8
VIN VOUT VIN VOUT
2 Via_2.5x1.5 2 Via_2.5x1.5
VIN R25 VIN R31
7 7
C55 C56 ADJ 51k C57 C58 D5 ADJ 82k C66 D6
D5V 3 6 C64 3 6 C65
10uF 0.1uF SHDN CDELAY 0603 10uF 0.1uF 30V C63 SHDN CDELAY 0603 0.1uF 30V
9 9 10uF
10V 50V R27 EP 1% 10V 50V 10uF 0.1uF EP 1% 50V
DS20005656B page-51

5 4 PG_3V3_CLK 5 4 10V
0805 0603 PWRGD GND 0805 0603 10V 50V PWRGD GND 0603
R28 R32 0805
390R 0805 0603
0603 U5 10k U7 10.7k
0603 0603
5%
GND_D 1% 1%
GND_D
LD4
GREEN
GND_D GND_D

GND_D
 A.11 ADM00679 – SCHEMATIC (USB TO SPI)
DS20005656B-page 52

HV7321 Ultrasound TX Pulser Evaluation Board User’s Guide

3V3_VDD

C103 C106
4.7uF 0.1uF
USB_CONFIG LED, ON- SUSPEND, OFF - ACTIVE 16V 25V
1206 0603
GND_D
R50
10k
0603
5% GND_D
MCP2210 SSOP-20 X1
20 1
VSS VDD 12MHz J10 J11
J7 USB_D+ 19 2 OSC1

1
D+ OSC1
USB MINI-B Female 3V3_VDD USB_D- 18 3 OSC2 2
D- OSC2
1 17 4
VBUS VUSB RST
2 USB_D- 16 5

3
D- GP8 GP8 GP0 CSBAR
3 USB_D+ 15 6
D+ C105 C104 GP7 GP7 GP1 FPGA_DONE
4 14 7
ID 4.7uF 0.1uF EXT_INT GP6 GP2 FPGA_RST
5 13 8 GND_D GND_D
GND 16V 25V MISO MISO GP3 SPI_RST
12 9 GND_D
1206 0603 USB_CONFIG GP5 MOSI MOSI
11 10
0

SCK SCK GP4 GP4

GND_D
U9
J12 J13
R51
GND_D 150R
0603
5%

LD5
RED GND_D GND_D

GND_D
Ground Posts for Scope Probe ground
 2016 Microchip Technology Inc.
 A.12 ADM00679 – SCHEMATIC (PROGRAMMABLE CLOCK)
 2016 Microchip Technology Inc.

GND_D

0603
X2 16V
3 1 XTAL-40MHz 0.1uF
C67
40MHz_N
R20
GND_D 100R
0603
40MHz_P
C68 1%
0.1uF
16V
0603
CLK5

VDD

VDD
3V3_CLK U8
6
VIN VOUT
1 VDD
5 2 R43
VIN ADJ
R33 4 3 100k GND_D GND_D
C69 EN GND C107 C70 C71 C72 C73 C74 C75 C76 C77 C78 D7
10k 0603
4.7uF 10000pF 4.7uF 0.010uF 4700pF 10000pF 10000pF 10000pF 10000pF 10000pF 10000pF 30V
0603 MIC94325YMT-TR 1% GND_D
16V 50V 16V 25V 50V 50V 50V 50V 50V 50V 50V
0603 1% 0603 0603 0603 0603 0603 0603 0603 0603 0603 0603

49
48
47
46
45
44
43
42
41
40
39
38
37
U10
R44 CLK4

EPAD
VSS
VSS
/REFIN2
REFIN2
XTAL_OUT
XTAL_XIN
VDDI2
VDDI1
/REFIN1
REFIN1
VSS
VDDAP1
1/10 W
R34 0603
78.7k DNI 0R
INF
1% R49
VDD 1
VDDAP2 VDD
36 VDD CLK2_N
GND_D 2 35
VDD /QA1
GND_D
3
QC1 QA1
34 VDDOAB CLK2_P
VDDOCD 4
VDDOC VDDOA
33 VDDOAB R52
5 32 R35
/QC1 /QA2 DNI 0R
6 31 INF
0603 16V 7
QC2
/QC2
SM803004 QA2
VDDOA
30 VDDOAB
R36
75k
0603
0.1uF 8 29 0603
CTRL_OEC OEC1/2/3 OEA1/2/3
C81 9 28 1%
CLK1_P QD1 /QB1
VDDOCD 10
VDDOD QB1
27 GND_D
3V3_CLK U11 R37 11 26
/QD1 VSS GND_D
6
VIN VOUT
1 VDDOAB 100R
GND_D
12
VSS OEB1/2/3
25
CTRL_OEB
5 2 R45 0603 C82

OED1/2/3
VIN ADJ CLK1_N

VDDOD

VDDOB
R38 4 3 100k C83 1% 0.1uF
C84 EN GND C108 C85 C86 C87 C88 C91

/QD3
GND

/QB2
10k 0603 16V

SDO
QD3

SCK
CSB

QB2
SDI
4.7uF 10000pF 4.7uF 0.010uF 4700pF 10000pF 10000pF 10000pF D8
0603 MIC94325YMT-TR 1% 0603
16V 50V 16V 25V 50V 50V 50V 50V 30V
1% C92

13
14
15
16
17
18
19
20
21
22
23
24
0603 R46 0603 0603 0603 0603 0603 0603 0603
0.1uF
1/10 W CTRL_OED
16V

VDDOAB
VDDOCD
78.7k GND_D 0603
1% CLK0_N
GND_D
R40
GND_D C93 100R
GND_D R39 DNI
0.1uF 0603
INF CLK0_P
16V 1%
0603 C94
CLK3_P
0.1uF
16V
CLK3_N
0603
C95 R41 DNI
0.1uF INF
3V3_CLK U12 16V
6
VIN VOUT
1 VDDOCD 0603
5 2 R47
VIN ADJ
R42 4 3 100k GND_D
C96 EN GND C109 C97 C98 C99 C100 C101 C102 D9
10k 0603
4.7uF 10000pF 4.7uF 0.010uF 4700pF 10000pF 10000pF 10000pF 30V CTRL_SCK
0603 MIC94325YMT-TR 1%
16V 50V 16V 25V 50V 50V 50V 50V CTRL_CSB
0603 1% 0603 0603 0603 0603 0603 0603 0603 SDO
CTRL_SDI
R48
1/10 W
78.7k
1%
DS20005656B page-53

GND_D
GND_D
 A.13 ADM00679 – SCHEMATIC (FPGA)
DS20005656B-page 54

HV7321 Ultrasound TX Pulser Evaluation Board User’s Guide

3V3_VDD

R1
4.7k
38 0603 111 1 74 OUT1
BANK 2

BANK 3

BANK 1
IO_L65N_CSO_B_2 EXT_INT IO_L66N_SCP0_0 CTRL_OEB IO_L83N_VREF_3 IO_2V5_0_N IO_L74N_DOUT_BUSY_1

BANK 0
39 INIT_B 5% 112 2 75 OUT2
IO_L65P_INIT_B_2 IO_L66P_SCP1_0 CTRL_OED IO_L83P_3 IO_2V5_0_P IO_L74P_AWAKE_1
40 114 5 78
IO_L64N_D9_2 SCK IO_L65N_SCP2_0 CTRL_OEC IO_L52N_3 IO_2V5_1_N IO_L47N_1 IO_2V5_13_N
41 115 6 79
IO_L64P_D8_2 MOSI IO_L65P_SCP3_0 CTRL_SDI IO_L52P_3 IO_2V5_1_P IO_L47P_1 IO_2V5_13_P
43 116 7 80
IO_L62N_D6_2 MISO IO_L64N_SCP4_0 CTRL_CSB IO_L51N_3 IO_2V5_2_N IO_L46N_1 IO_2V5_9_N
44 117 8 81
IO_L62P_D5_2 CSBAR IO_L64P_SCP5_0 CTRL_SCK IO_L51P_3 IO_2V5_2_P IO_L46P_1 IO_2V5_9_P
45 118 9 82
IO_L49N_D4_2 FPGA_RST IO_L63N_SCP6_0 IO_3V3_7_N IO_L50N_3 IO_2V5_4_N IO_L45N_1 IO_2V5_10_N
46 119 10 83
IO_L49P_D3_2 SPI_RST IO_L63P_SCP7_0 IO_3V3_7_P IO_L50P_3 IO_2V5_4_P IO_L45P_1 IO_2V5_10_P
47 120 11 84
IO_L48N_RDWR_B_VREF_2 USB_CONFIG IO_L62N_VREF_0 IO_3V3_9_N IO_L49N_3 IO_2V5_3_N IO_L43N_GCLK4_1 CLK1_N
48 121 12 85
IO_L48P_D7_2 IO_3V3_17 IO_L62P_0 IO_3V3_9_P IO_L49P_3 IO_2V5_3_P IO_L43P_GCLK5_1 CLK1_P
50 123 14 87
IO_L31N_GCLK30_D15_2 GP4 IO_L37N_GCLK12_0 40MHz_N IO_L44N_GCLK20_3 CLK0_N IO_L42N_GCLK6_TRDY1_1 IO_2V5_15_N
51 124 15 88
IO_L31P_GCLK31_D14_2 GP7 IO_L37P_GCLK13_0 40MHz_P IO_L44P_GCLK21_3 CLK0_P IO_L42P_GCLK7_1 IO_2V5_15_P
55 126 16 92
IO_L30N_GCLK0_USERCCLK_2 IO_3V3_12_N IO_L36N_GCLK14_0 IO_3V3_11_N IO_L43N_GCLK22_IRDY2_3 IO_2V5_16_N IO_L41N_GCLK8_1 IO_2V5_17_N
56 127 17 93
IO_L30P_GCLK1_D13_2 IO_3V3_12_P IO_L36P_GCLK15_0 IO_3V3_11_P IO_L43P_GCLK23_3 IO_2V5_16_P IO_L41P_GCLK9_IRDY1_1 IO_2V5_17_P
57 131 21 94
IO_L14N_D12_2 IO_3V3_10_N IO_L35N_GCLK16_0 IO_3V3_13_N IO_L42N_GCLK24_3 IO_2V5_18_N IO_L40N_GCLK10_1 IO_2V5_14_N
58 132 22 95
IO_L14P_D11_2 IO_3V3_10_P IO_L35P_GCLK17_0 IO_3V3_13_P IO_L42P_GCLK25_TRDY2_3 IO_2V5_18_P IO_L40P_GCLK11_1 IO_2V5_14_P
59 133 23 97
IO_L13N_D10_2 IO_L34N_GCLK18_0 IO_3V3_14_N IO_L41N_GCLK26_3 IO_2V5_20_N IO_L34N_1 IO_2V5_12_N
60 M1 134 24 98
IO_L13P_M1_2 IO_L34P_GCLK19_0 IO_3V3_14_P IO_L41P_GCLK27_3 IO_2V5_20_P IO_L34P_1 IO_2V5_12_P
61 137 26 99
IO_L12N_D2_MISO3_2 IO_3V3_8_N IO_L4N_0 IO_3V3_1 IO_L37N_3 IO_2V5_6_N IO_L33N_1 IO_2V5_11_N
62 138 27 100
IO_L12P_D1_MISO2_2 IO_3V3_8_P IO_L4P_0 IO_3V3_2 IO_L37P_3 IO_2V5_6_P IO_L33P_1 IO_2V5_11_P
64 3V3_VDD 139 29 101
IO_L3N_MOSI_CSI_B_MISO0_2 IO_3V3_16 IO_L3N_0 IO_3V3_3 IO_L36N_3 IO_2V5_5_N IO_L32N_1 IO_2V5_8_N
65 DIN 140 30 102
IO_L3P_DO_DIN_MISO_MISO1_2 IO_L3P_0 IO_3V3_4 IO_L36P_3 IO_2V5_5_P IO_L32P_1 IO_2V5_8_P
66 141 32 104
IO_L2N_CMPMOSI_2 IO_3V3_6_N IO_L2N_0 IO_3V3_5 IO_L2N_3 IO_2V5_7_N IO_L1N_VREF_1 IO_2V5_19_N
67 R2 142 33 105
IO_L2P_CMPCLK_2 IO_3V3_6_P IO_L2P_0 IO_3V3_15 IO_L2P_3 IO_2V5_7_P IO_L1P_1 IO_2V5_19_P
69 M0 4.7k 143 34
IO_L1N_M0_CMPMISO_2 IO_L1N_VREF_0 SDO IO_L1N_VREF_3 IO_2V5_21_N
70 R3 51R CCLKR 0603 144 35 U1E
IO_L1P_CCLK_2 IO_L1P_HSWAPEN_0 IO_L1P_3 IO_2V5_21_P
71 FPGA_DONE 5%
DONE_2
72 U1F U1C
CMPCS_B_2
37 PROG_B
PROGRAM_B_2
U1D
FPGA_DONE
GND_D
PUSHBUTTON TO FORCE THE RECONFIGURATION 3V3_VDD
122
VCCO_0
3V3_VDD 125
VCCO_0
135
VCCO_0
2V5_VDD
R4 FPGA JTAG 76
VCCO_1
4.7k J8 J9 86
**DNI (Do Not Install) VCCO_1
0603 J4 3V3_VDD 103
VCCO_1
5% 1 FPGA_TDO 106 OUT1 1 OUT2 1
R5 TDO
PROG_B 2 FPGA_TMS FPGA_TMS 107 3 3V3_VDD
PROGB_IN TMS GND

2
3 FPGA_TCK FPGA_TCK 109 13 42
4

0R TCK GND VCCO_2

SW2 4 FPGA_TDO FPGA_TDI 110 25 63
TACT SPST0603 5 FPGA_TDI
TDI
GND_D GND_D 49
GND VCCO_2
GND
6 73 RF Coaxial SMA Female RF Coaxial SMA Female 54 2V5_VDD
SUSPEND GND
68 4
GND VCCO_3
HDR-2.54 Male 1x6 U1B 77 18
GND_D OUT1 OUT2 91
GND VCCO_3
31
1

GND VCCO_3
GND_D 96
GND
108 1V2_VCCINT
GND
113 19
GND VCCINT
GND_D 130 28
GND VCCINT
136 52
GND VCCINT
89
VCCINT
Default config set to Master Serial M(1:0) = 01 128
VCCINT
R6 R7
3V3_VDD 3V3_VDD
3V3_VDD GND_D
D5V 20
100R 100R VCCAUX
U_FPGA_DECOUPLE 36
VCCAUX
 2016 Microchip Technology Inc.

R8 FPGA_DECOUPLE.SchDoc GND_D 53
VCCAUX
51R R9 U2 3V3_VDD 90
VCCAUX
R10 R11 DIN 22R 1 20 PROM JTAG 129
**DNI 0R LD1 D0 VCCJ VCCAUX
4.7k 2 19
GREEN (DNC) VCCO
0603 0603 CCLKR 3 18 J5 3V3_VDD
CLK VCCINT
5% PROM_TDI 4 17 PROM_TDO 1 U1A
TDI TDO
M1 R12 PROM_TMS 5 16 2 PROM_TMS
TMS (DNC)
M0 330R PROM_TCK 6 15 3 PROM_TCK
TCK (DNC)
0603 R13 4.7k 7 14 4 PROM_TDO
3V3_VDD CF (DNC)
5% INIT_B 8 13 5 PROM_TDI
3 OE/RESET CEO
R14 R15 9 12 6
(DNC) (DNC)
4.7k 0R **DNI FPGA_DONE 1 Q1 FPGA_DONE 10 11
CE GND
0603 0603 BSS123 HDR-2.54 Male 1x6
5% 2 XCF04S-VOG20C GND_D
GND_D

GND_D
GND_D
"DONE" LED
 A.14 ADM00679 – SCHEMATIC (FPGA DECOUPLING CAPACITORS)
 2016 Microchip Technology Inc.

For 1V2_VCCINT
1V2_VCCINT

C3 C4 C5 C6 C7 C8 C9
100uF 47nF 1000pF 1000pF 1000pF 1000pF 1000pF
6.3V 16V 50V 50V 50V 50V 50V
TANT-B 0603 0603 0603 0603 0603 0603

GND_D

For VCCO_1 For VCCAUX

For VCCO_0 2V5_VDD 3V3_VDD
3V3_VDD

C10 C13 C14 C15 C16 C11 C17 C18 C19 C20 C12 C21 C22 C23 C24 C25 C26
33uF 47nF 1000pF 1000pF 1000pF 33uF 47nF 1000pF 1000pF 1000pF 33uF 47nF 1000pF 1000pF 1000pF 1000pF 1000pF
10V 16V 50V 50V 50V 10V 16V 50V 50V 50V 10V 16V 50V 50V 50V 50V 50V
TANT-B 0603 0603 0603 0603 TANT-B 0603 0603 0603 0603 TANT-B 0603 0603 0603 0603 0603 0603

GND_D
GND_D GND_D

For VCCO_2
3V3_VDD

C27
For VCCO_3 For XCF04S
C30 C31 C32
33uF 47nF 1000pF 1000pF 2V5_VDD 3V3_VDD
10V 16V 50V 50V
TANT-B 0603 0603 0603

C28 C33 C34 C35 C36 C29 C37 C38 C39 C40
GND_D 33uF 47nF 1000pF 1000pF 1000pF 33uF 47nF 1000pF 1000pF 1000pF
10V 16V 50V 50V 50V 10V 16V 50V 50V 50V
TANT-B 0603 0603 0603 0603 TANT-B 0603 0603 0603 0603
DS20005656B page-55

GND_D GND_D
 A.15 ADM00679 – SCHEMATIC (CONNECTORS)
DS20005656B-page 56

HV7321 Ultrasound TX Pulser Evaluation Board User’s Guide

D5V D5V
PWR5V0 PWR5V0
C1 C2 C90 C89
33uF 0.1uF 33uF 0.1uF
10V 25V 10V 25V
TANT-B 0603 TANT-B 0603

GND_D J1 J2
GND_D

A1 C1 IO_2V5_0_P A1 C1 IO_2V5_15_P
B1 D1 IO_2V5_0_N B1 D1 IO_2V5_15_N
BG1 DG1 BG1 DG1
IO_2V5_1_P A2 C2 IO_2V5_2_P IO_2V5_16_P A2 C2 IO_2V5_17_P
IO_2V5_1_N B2 D2 IO_2V5_2_N IO_2V5_16_N B2 D2 IO_2V5_17_N
BG2 DG2 BG2 DG2
IO_2V5_3_P A3 C3 IO_2V5_4_P IO_2V5_18_P A3 C3 IO_2V5_19_P
IO_2V5_3_N B3 D3 IO_2V5_4_N IO_2V5_18_N B3 D3 IO_2V5_19_N
BG3 DG3 BG3 DG3
IO_2V5_5_P A4 C4 IO_2V5_6_P IO_2V5_20_P A4 C4 IO_2V5_21_P
IO_2V5_5_N B4 D4 IO_2V5_6_N IO_2V5_20_N B4 D4 IO_2V5_21_N
BG5 DG4 BG5 DG4
IO_2V5_7_P A5 C5 IO_2V5_8_N IO_3V3_6_P A5 C5 IO_3V3_7_P
IO_2V5_7_N B5 D5 IO_2V5_8_P IO_3V3_6_N B5 D5 IO_3V3_7_N
BG4 DG5 BG4 DG5
IO_2V5_9_P A6 C6 IO_2V5_10_P IO_3V3_8_P A6 C6 IO_3V3_9_P
IO_2V5_9_N B6 D6 IO_2V5_10_N IO_3V3_8_N B6 D6 IO_3V3_9_N
BG6 DG6 BG6 DG6
IO_2V5_11_P A7 C7 IO_2V5_12_P IO_3V3_10_P A7 C7 IO_3V3_11_P
IO_2V5_11_N B7 D7 IO_2V5_12_N IO_3V3_10_N B7 D7 IO_3V3_11_N
BG7 DG7 BG7 DG7
IO_2V5_13_P A8 C8 IO_2V5_14_N IO_3V3_12_P A8 C8 IO_3V3_13_P
IO_2V5_13_N B8 D8 IO_2V5_14_P IO_3V3_12_N B8 D8 IO_3V3_13_N
BG8 DG8 BG8 DG8
IO_3V3_1 A9 C9 IO_3V3_3 IO_3V3_14_P A9 C9 IO_3V3_15
IO_3V3_2 B9 D9 IO_3V3_4 IO_3V3_14_N B9 D9 IO_3V3_16
BG9 DG9 BG9 DG9
IO_3V3_5 A10 C10 CLK2_P IO_3V3_17 A10 C10 CLK3_P
 2016 Microchip Technology Inc.

CLK4 B10 D10 CLK2_N CLK5 B10 D10 CLK3_N

BG10 DG10 BG10 DG10

CONN-1469028 CONN-1469028

GND_D GND_D GND_D GND_D

 HV7321 Ultrasound TX Pulser Evaluation Board User’s Guide

A.16 ADM00679 – TOP SILK

A.17 ADM00679 – TOP COPPER AND SILK

 2016 Microchip Technology Inc. DS20005656B-page 57

HV7321 Ultrasound TX Pulser Evaluation Board User’s Guide

A.18 ADM00679 – TOP COPPER

A.19 ADM00679 – INNER 1

DS20005656B-page 58  2016 Microchip Technology Inc.

 HV7321 Ultrasound TX Pulser Evaluation Board User’s Guide

A.20 ADM00679 – INNER 2

A.21 ADM00679 – INNER 3

 2016 Microchip Technology Inc. DS20005656B-page 59

HV7321 Ultrasound TX Pulser Evaluation Board User’s Guide

A.22 ADM00679 – INNER 4

A.23 ADM00679 – BOTTOM COPPER

DS20005656B-page 60  2016 Microchip Technology Inc.

 HV7321 Ultrasound TX Pulser Evaluation Board User’s Guide

A.24 ADM00679 – BOTTOM COPPER AND SILK

A.25 ADM00679 – BOTTOM SILK

 2016 Microchip Technology Inc. DS20005656B-page 61

HV7321 Ultrasound TX Pulser Evaluation Board User’s Guide

NOTES:

DS20005656B-page 62  2016 Microchip Technology Inc.

 HV7321
ULTRASOUND TX PULSER
EVALUATION BOARD
USER’S GUIDE

Appendix B. Bill of Materials (BOM)

TABLE B-1: HV7321 ULTRASOUND TX PULSER EVALUATION BOARD (ADM00659)

BILL OF MATERIALS (BOM) (Note 1)
Qty. Reference Description Manufacturer Part Number
C1, C2, C8, 1 µF 16V Ceramic Capacitor X7R TDK Corporation C1608X7R1C105M
C9, C12-18, 0603 (1608 Metric) 0.063" L x 0.031"
C22, C23, W (1.60 mm x 0.80 mm)
28 C25, C26,
C30-36,
C44-46,
C55-57
1 µF 100V Ceramic Capacitor X7S TDK Corporation CGA4J3X7S2A105K125AB
C3-6,
8 0805 (2012 Metric) 0.079" L x 0.049"
C37-40
W (2.00 mm x 1.25 mm)
0.22 µF 16V Ceramic Capacitor X7R TDK Corporation C1608X7R1C224K
2 C7, C29 0603 (1608 Metric) 0.063" L x 0.031"
W (1.60 mm x 0.80 mm)
C10, C24, 2.2 µF 16V Ceramic Capacitor X5R TDK Corporation C1608X5R1C225K080AB
8 C27, C28, 0603 (1608 Metric) 0.063" L x 0.031"
C47-50 W (1.60 mm x 0.80 mm)
220 pF 200V Ceramic Capacitor Panasonic® - ECG ECJ-2YC2D221J
C11, C19,
4 C0G, NP0 0805 (2012 Metric) 0.079"
C20, C21
L x 0.049" W (2.00 mm x 1.25 mm)
10000 pF 16V Ceramic Capacitor TDK Corporation C1608X7R1C103K
C41, C42,
3 X7R 0603 (1608 Metric) 0.063" L x
C52
0.031" W (1.60 mm x 0.80 mm)
2 pF 50V Ceramic Capacitor C0G, TDK Corporation CGJ3E2C0G1H020C080AA
1 C43 NP0 0603 (1608 Metric) 0.063" L x
0.031" W (1.60 mm x 0.80 mm)
1000 pF 16V Ceramic Capacitor AVX Corporation 0603YC102KAT2A
1 C51 X7R 0603 (1608 Metric) 0.063" L x
0.032" W (1.60 mm x 0.81 mm)
0.10 µF 10V Ceramic Capacitor X7R TDK Corporation C1005X7R1A104K050BB
C53, C54,
3 0402 (1005 Metric) 0.039" L x 0.020"
C112
W (1.00 mm x 0.50 mm)
Red LED Indication - Discrete 2V Lumex® Inc. SML-LXT0805IW-TR
3 D1, D5, D6
0805 (2012 Metric)
Green LED Indication - Discrete 2V Lumex Inc. SML-LXT0805GW-TR
1 D2
0805 (2012 Metric)
Yellow LED Indication - Discrete Lumex Inc. SML-LXT0805YW-TR
3 D3, D4, D7
2.1V 0805 (2012 Metric)
D8, D10, Diode Array 2 Independent Schottky Diodes Incorporated® BAT54DW-7
5 D11, D12, 30V 100 mA Surface Mount
D17 6-TSSOP, SC-88, SOT-363
Note 1: The components listed in this Bill of Materials are representative of the PCB assembly. The released BOM
used in manufacturing uses all RoHS-compliant components.

 2016 Microchip Technology Inc. DS20005656B-page 63

HV7321 Ultrasound TX Pulser Evaluation Board User’s Guide

TABLE B-1: HV7321 ULTRASOUND TX PULSER EVALUATION BOARD (ADM00659)

BILL OF MATERIALS (BOM) (CONTINUED)(Note 1)
Qty. Reference Description Manufacturer Part Number
®
Diode Array 1 Pair Series Connec- ON Semiconductor BAV99WT1G
2 D9, D18 tion Standard 70V 215 mA (DC) Sur-
face Mount SC-70, SOT-323
D13-16, Diode Schottky 100V 1A Surface Diodes Incorporated B1100-13F
6
D19, D20 Mount SMA
SMA Connector Jack, Female Cinch Connectivity 142-0711-821
J1, J2, J3
5 Socket 50 Board Edge, End Solutions
J4, J14
Launch Solder
CONN HEADER 40POS R/A TE Connectivity, Ltd. 6469169-1
2 J5, J23
HM-ZD TIN
2 Positions Header, Unshrouded, Molex® 22-28-4023
J6-9
12 Breakaway Connector 0.100" (2.54
J15-22
mm) Through Hole Gold
2 (1 x 2) Position Shunt Connector TE Connectivity, Ltd. 382811-8
J6
5 Black Open Top 0.100" (2.54 mm)
J19-22
Gold
6 Positions Header, Unshrouded TE Connectivity, Ltd. 3-641213-6
1 J10 Connector 0.100" (2.54mm)
Through Hole Gold
3 Positions Header, Unshrouded TE Connectivity, Ltd. 641213-3
3 J11-J13 Connector 0.100" (2.54 mm)
Through Hole Gold
Hex Standoff Threaded #4-40 Alumi- Keystone Electronics 1891
4 MH1-MH4
num 0.250" (6.35mm) 1/4" Corp.
4 MH1-MH4 Machine Screw Pan Phillips 4-40 B&FTM Fasteners Supply NY PMS 440 0025 PH
HV7321 Ultrasound TX Pulser Eval-
1 PCB — 04-10398
uation Board – Printed Circuit Board
R1, R2 Panasonic - ECG ERJ-L03KJ10CV
4 RES SMD 0.1 OHM 5% 1/5W 0603
R25, R26
R3, R14 Panasonic - ECG ERJ-3EKF49R9V
R17, R18 RES SMD 49.9 OHM 1% 1/10W
7
R20, R23 0603
R33
R5-11 RES SMD 200 OHM 5% 1/10W Panasonic - ECG ERJ-3GEYJ201V
8
R38 0603
R12 RES SMD 0.0OHM JUMPER 1/10W Panasonic - ECG ERJ-3GEY0R00V
2
R44 0603
R13, R16 RES SMD 49.9 OHM 1% 1/10W Panasonic - ECG ERJ-3EKF49R9V
4
R19, R22 0603
R24 RES SMD 499 OHM 1% 1/10W Panasonic - ECG ERJ-3EKF4990V
2
R29 0603
RES SMD 249 OHM 1% 1/10W Panasonic - ECG ERJ-3EKF2490V
1 R27
0603
R28, R32 Panasonic - ECG ERJ-3EKF1001V
3 RES SMD 1K OHM 1% 1/10W 0603
R39
R30 RES SMD 100 OHM 1% 1/10W Panasonic - ECG ERJ-3EKF1000V
2
R34 0603
7 R31, R35-37 DO NOT POPULATE — —
Note 1: The components listed in this Bill of Materials are representative of the PCB assembly. The released BOM
used in manufacturing uses all RoHS-compliant components.

DS20005656B-page 64  2016 Microchip Technology Inc.

TABLE B-1: HV7321 ULTRASOUND TX PULSER EVALUATION BOARD (ADM00659)
BILL OF MATERIALS (BOM) (CONTINUED)(Note 1)
Qty. Reference Description Manufacturer Part Number
RES SMD 100 OHM 1% 1/10W Panasonic - ECG ERJ-2RKF1000X
2 R40, R41
0402
RES SMD 0.0OHM JUMPER 1/10W Panasonic - ECG ERJ-2GE0R00X
2 R42, R43
0402
PC Pin Terminal Connector Free Mill-Max Mfg. 3132-0-00-15-00-00-08-0
TP50, TP61
3 Hanging (In-Line) Gold 0.030" Corporation
TP65
(0.76mm) Dia.
High-Voltage Ultrasound Pulser with Microchip HV7321K6-G
1 U1
T/R Switches Technology Inc.
Ultra-Low Phase Noise Continuous Microchip MD1730-V/M2
1 U2 Waveform Transmitter with Technology Inc.
Beamformer
Low-Voltage, Low-Quiescent Cur- Microchip MCP1727-2502E/SN
1 U3
rent LDO Regulator Technology Inc.
Microchip MCP661-E/SN
1 U4 Rail-to-Rail Output Op Amp
Technology Inc.
Voltage Feedback Amplifier 1 Circuit Analog Devices Inc. AD8099ARDZ-REEL7
1 U6
8-SOIC-EP
200 MHz LVDS XO (Standard) Oscil- Fox Electronics FXO-LC726R-200
1 X1 lator Surface Mount 2.5V 34 mA
Enable/Disable
Note 1: The components listed in this Bill of Materials are representative of the PCB assembly. The released BOM
used in manufacturing uses all RoHS-compliant components.

TABLE B-2: MUPB001 MICROCHIP ULTRASOUND PLATFORM BOARD (ADM00679)

BILL OF MATERIALS (BOM) (Note 1)
Qty. Reference Description Manufacturer Part Number
C1 33 µF Molded Tantalum Capacitors KEMET T494B336K010AT
C10-C12 10V 1411 (3528 Metric) 1.4 Ohm
8
C27-C29 0.138" L x 0.110" W (3.50 mm x
C90 2.80 mm)
0.10 µF 25V Ceramic Capacitor X7R Murata Electronics North GRM188R71E104KA01D
C2, C89
4 0603 (1608 Metric) 0.063" L x 0.031" America, Inc.
C104, C106
W (1.60 mm x 0.80 mm)
100 µF Molded Tantalum Capaci- AVX Corporation TPSB107K006R0400
tors 6.3V 1210 (3528 Metric) 400
1 C3
mOhm 0.138" L x 0.110" W
(3.50 mm x 2.80 mm)
C4, C13 0.047 µF 16V Ceramic Capacitor Murata Electronics North GRM188R71C473KA01D
C17, C21 X7R 0603 (1608 Metric) 0.063" L x America, Inc.
7
C30, C33 0.031" W (1.60 mm x 0.80 mm)
C37
C5-C9 1000 pF 50V 10% Ceramic Capaci- NIC Components Corp. NMC0603X7R102K50TRPF
C14-C16 tor X7R MLCC 0603
C18-C20
24 C22-C26
C31, C32
C34-C36
C38-C40
Note 1: The components listed in this Bill of Materials are representative of the PCB assembly. The released BOM
used in manufacturing uses all RoHS-compliant components.

 2016 Microchip Technology Inc. DS20005656B-page 65

HV7321 Ultrasound TX Pulser Evaluation Board User’s Guide

TABLE B-2: MUPB001 MICROCHIP ULTRASOUND PLATFORM BOARD (ADM00679)

BILL OF MATERIALS (BOM) (CONTINUED)(Note 1)
Qty. Reference Description Manufacturer Part Number
0.022 µF 50V Ceramic Capacitor AVX Corporation 06035C223JAT2A
1 C41 X7R 0603 (1608 Metric) 0.063" L x
0.032" W (1.60 mm x 0.81 mm)
C42, C50 TDK Corporation C1608X7R1H104M080AA
C52, C54 0.10 µF 50V Ceramic Capacitor X7R
10 C56, C58 0603 (1608 Metric) 0.063" L x 0.031"
C60, C62 W (1.60 mm x 0.80 mm)
C64, C66
10 µF 35V Ceramic Capacitor X5R Taiyo Yuden Co., Ltd. GMK316BJ106KL-T
3 C47-C49 1206 (3216 Metric) 0.126" L x 0.063"
W (3.20 mm x 1.60 mm)
C67, C68 0.10 µF 16V Ceramic Capacitor X7R Samsung CL10B104KO8NNNC
8 C81, C82 0603 (1608 Metric) 0.063" L x 0.031" Electro-Mechanics
C92-C95 W (1.60 mm x 0.80 mm) America, Inc.
C69, C70 TDK Corporation C1608X5R1C475K080AC
4.7 µF 16V Ceramic Capacitor X5R
C83, C84
9 0603 (1608 Metric) 0.063" L x 0.031"
C96, C97
W (1.60 mm x 0.80 mm)
C107-C109
10000 pF 25V Ceramic Capacitor Yageo Corporation CC0603KRX7R8BB103
C71, C85
3 X7R 0603 (1608 Metric) 0.063" L x
C98
0.031" W (1.60 mm x 0.80 mm)
4700 pF 50V Ceramic Capacitor KEMET C0603C472K5RACTU
C72, C86
3 X7R 0603 (1608 Metric) 0.063" L x
C99
0.031" W (1.60 mm x 0.80 mm)
C73-C78 AVX Corporation 06035C103KAT2A
10000 pF 50V Ceramic Capacitor
C87, C88
12 X7R 0603 (1608 Metric) 0.063" L x
C91
0.032" W (1.60 mm x 0.81 mm)
C100-C102
4.7 µF 16V Ceramic Capacitor X7R KEMET C1206C475K4RACTU
2 C103, C105 1206 (3216 Metric) 0.126" L x 0.063"
W (3.20 mm x 1.60 mm)
Diode Schottky 30V 2A Surface Vishay Intertechnology, VS-20BQ030TRPBF
1 D1
Mount SMB Inc.
Diode Schottky 30V 200 mA (DC) Micro Commercial BAT54WX-TP
8 D2-D9
Surface Mount SOD-523 Components
J1 CONN RCPT 40 POS 2 ROW RT TE Connectivity AMP 1469028-1
2
J2 ANG T/H Connectors
6 Positions Header, Unshrouded, Sullins Connector PEC06SAAN
J4
2 Breakaway Connector 0.100" Solutions
J5
(2.54 mm) Through Hole Tin
Power Barrel Connector Jack CUI Inc. PJ-002B
1 J6 2.50 mm ID (0.098"), 5.50 mm OD
(0.217") Through Hole, Right Angle
USB - mini B USB 2.0 Receptacle Hirose Electric Co., Ltd. UX60SC-MB-5ST(80)
1 J7 Connector 5 Position Surface
Mount, Right Angle, Horizontal
J8 SMA Connector Jack, Female TE Connectivity, Ltd. 5-1814832-1
2
J9 Socket 50 Through Hole Solder
Note 1: The components listed in this Bill of Materials are representative of the PCB assembly. The released BOM
used in manufacturing uses all RoHS-compliant components.

DS20005656B-page 66  2016 Microchip Technology Inc.

TABLE B-2: MUPB001 MICROCHIP ULTRASOUND PLATFORM BOARD (ADM00679)
BILL OF MATERIALS (BOM) (CONTINUED)(Note 1)
Qty. Reference Description Manufacturer Part Number
PC Pin Terminal Connector Free Mill-Max Mfg. 3132-0-00-15-00-00-08-0
4 J10-J13 Hanging (In-Line) Gold 0.030" Corporation
(0.76 mm) Dia
Fixed Inductors XAL6060 High Cur- Coilcraft XAL6060-472MEB
1 L1
rent 4.7 µH 20% 11A
LD1, LD2 Green 568 nm LED Indication - Dis- Kingbright Electronics APT1608SGC
3
LD4 crete 2.2V 0603 (1608 Metric) Co., Ltd.
Red 633 nm LED Indication - Dis- OSRAM Opto Semicon- LS Q976-NR-1
1 LD5
crete 2V 0603 (1608 Metric) ductors GmbH.
MOSFET N-CH 100V 170 mA Diodes Incorporated® BSS123-7-F
1 Q1
SOT23-3
1 PCB MUPB001 – Printed Circuit Board — 04-10438
R1, R2, R4 Panasonic - ECG ERJ-3GEYJ472V
RES SMD 4.7K OHM 5% 1/10W
6 R11, R13
0603
R14
R3 Panasonic - ECG ERJ-3GEYJ510V
2 RES SMD 51 OHM 5% 1/10W 0603
R8
R5, R10 NIC Components Corp. NRC06Z0TRF
3 RES TKF 0R 1/10W SMD 0603
R15
R5, R10 — —
6 R34, R35 DO NOT POPULATE
R39, R41
R6 RES SMD 100 OHM 5% 1/10W Vishay/Dale CRCW0603100RJNEA
2
R7 0603
1 R9 RES SMD 22 OHM 5% 1/10W 0603 Panasonic - ECG ERJ-3GEYJ220V
330 ±5% 0.063W, 1/16W Tem- Panasonic - ECG ERA-V33J331V
perature Sensitive Specialized
1 R12
Resistor Metal Film 3300 ppm/°C
Surface Mount
RES SMD 39K OHM 1% 1/10W Panasonic - ECG ERJ-3EKF3902V
1 R16
0603
RES SMD 19.1K OHM 1% 1/10W Panasonic - ECG ERJ-3EKF1912V
1 R17
0603
1 R18 RES SMD 1K OHM 5% 1/10W 0603 Panasonic - ECG ERJ-3GEYJ102V
RES SMD 390 OHM 5% 1/10W Panasonic - ECG ERJ-3GEYJ391V
2 R19, R27
0603
R20, R37 RES SMD 100 OHM 1% 1/10W Panasonic - ECG ERJ-3EKF1000V
3
R40 0603
RES SMD 8.66K OHM 1% 1/10W Yageo Corporation RC0603FR-078K66L
1 R21
0603
R22, R28 Vishay Beyschlag MCT06030C1002FP500
6 R29, R33 RES SMD 10K OHM 1% 1/8W 0603
R38, R42
RES SMD 51K OHM 1% 1/10W Panasonic - ECG ERJ-3EKF5102V
1 R25
0603
RES SMD 69.8K OHM 1% 1/10W Panasonic - ECG ERJ-3EKF6982V
1 R26
0603
Note 1: The components listed in this Bill of Materials are representative of the PCB assembly. The released BOM
used in manufacturing uses all RoHS-compliant components.

 2016 Microchip Technology Inc. DS20005656B-page 67

HV7321 Ultrasound TX Pulser Evaluation Board User’s Guide

TABLE B-2: MUPB001 MICROCHIP ULTRASOUND PLATFORM BOARD (ADM00679)

BILL OF MATERIALS (BOM) (CONTINUED)(Note 1)
Qty. Reference Description Manufacturer Part Number
R23, R24 RES SMD 10K OHM 5% 1/10W Panasonic - ECG ERJ-3GEYJ103V
4
R30, R50 0603
RES SMD 82K OHM 1% 1/10W Panasonic - ECG ERJ-3EKF8202V
1 R31
0603
RES SMD 10.7K OHM 1% 1/10W Panasonic - ECG ERJ-3EKF1072V
1 R32
0603
R34, R35 RES SMD 150 OHM 1% 1/10W Stackpole Electronics, RMCF0603FT150R
4
R39, R41 0603 Inc.
RES SMD 75K OHM 1% 1/10W Panasonic - ECG ERJ-3EKF7502V
1 R36
0603
R43, R45 RES SMD 100K OHM 1% 1/10W Panasonic - ECG ERJ-3EKF1003V
3
R47 0603
R44, R46 RES SMD 78.7K OHM 1% 1/10W Yageo Corporation RC0603FR-0778K7L
3
R48 0603
R49 RES SMD 0.0OHM JUMPER 1/10W Panasonic - ECG ERJ-3GEY0R00V
2
R52 0603
RES SMD 150 OHM 5% 1/10W Panasonic - ECG ERJ-3GEYJ151V
1 R51
0603
Switch Slide Min. Single Pole Dou- Jameco Valuepro SS-12F56-4
1 SW1 ble Throw On-On PCB Mount 50
Volt DC @ 0.5 Amps Lead 4 mm
Tactile Switch SPST-NO Top Actu- E-Switch®, Inc. TL3301NF260QG
1 SW2
ated Surface Mount
1 U1 IC FPGA 102 I/O 144TQFP Xilinx Inc. XC6SLX9-2TQG144C
IC PROM SRL FOR 4M GATE Xilinx Inc. XCF04SVOG20C
1 U2
20-TSSOP
Buck Switching Regulator IC Posi- Microchip MCP16323T-ADJE/NG
1 U3 tive Adjustable 0.9V 1 Output 3A Technology Inc.
16-VFQFN Exposed Pad
Microchip Analog LDO 0.8V-5V Microchip MCP1727-ADJE/MF
4 U4-U7
MCP1727T-ADJE/MF DFN-8 Technology Inc.
Linear Voltage Regulator IC Positive Microchip MIC94325YMT-TR
U8, U11
3 Adjustable 1 Output 1.2V ~ 3.4V Technology Inc.
U12
500 mA 6-TDFN (1.6x1.6)
USB Bridge, USB to SPI USB 2.0 Microchip MCP2210T-I/SS
1 U9
SPI Interface 20-SSOP Technology Inc.
Flexible Ultra-low Jitter Clock Gener- Microchip SM803234UMG
1 U10
ator Technology Inc.
Resonators 12 MHz 0.1% SMD Murata Electronics CSTCE12M0G15L99-R0
1 X1
CSTCE-G
40 MHz ±30 ppm Crystal 12 pF 40 TXC CORPORATION 7B-40.000MAAE-T
1 X2 -20°C ~ +70°C Surface Mount
4-SMD
Note 1: The components listed in this Bill of Materials are representative of the PCB assembly. The released BOM
used in manufacturing uses all RoHS-compliant components.

DS20005656B-page 68  2016 Microchip Technology Inc.

 HV7321
ULTRASOUND TX PULSER
EVALUATION BOARD
USER’S GUIDE
Appendix C. HV7321 Ultrasound TX Pulser Evaluation Board
Typical Waveforms

C.1 BOARD TYPICAL WAVEFORMS

C.1.1 5 MHz VPP0/VNN0 = ±80V, VPP1/VNN1 = ±60V, 220 pF//1K Load

TX0

C.1.2 10 MHz VPP0/VNN0 = ±80V, VPP1/VNN1 = ±60V, 220 pF//1K Load

SEL0

NEG0

POS0

TX0 ±80V ±60V

 2016 Microchip Technology Inc. DS20005656B-page 69

HV7321 Ultrasound TX Pulser Evaluation Board User’s Guide

C.1.3 10 MHz VPP0/VNN0 = ±80V, VPP1/VNN1 = ±60V, 220 pF//1K Load

SEL0

NEG0

POS0

TX0 ±80V ±60V

C.1.4 Fall Time of VPP0/VNN0 = ±80V, with 220 pF//1K Load

TX0

DS20005656B-page 70  2016 Microchip Technology Inc.

 HV7321 Ultrasound TX Pulser Evaluation Board Typical Waveforms

C.1.5 Rise Time of VPP1/VNN1 = ±80V, with 220 pF//1K Load

TX0

 2016 Microchip Technology Inc. DS20005656B-page 71

HV7321 Ultrasound TX Pulser Evaluation Board User’s Guide

NOTES:

DS20005656B-page 72  2016 Microchip Technology Inc.

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DS20005656B-page 73  2014-2016 Microchip Technology Inc.

11/07/16