© 2011 IEEE

IEEE Transactions on Dielectrics and Electrical Insulation, Vol. 18, No. 4, pp. 1171-1180, August 2011.

Design Procedure for Compact Pulse Transformers with Rectangular Pulse Shape and Fast Rise Times

D. Bortis
G. Ortiz
J. W. Kolarŋ
J. Biela

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IEEE Transactions on Dielectrics and Electrical Insulation Vol. 18, No. 4; August 2011 1171

Design Procedure for Compact Pulse Transformers

with Rectangular Pulse Shape and Fast Rise Times
D. Bortis, G. Ortiz, J.W. Kolar
Power Electronic Systems Laboratory, ETH Zurich, Switzerland

and J. Biela
Laboratory for High Power Electronic Systems, ETH Zurich, Switzerland

ABSTRACT
Microseconds range pulse modulators based on solid state technology often utilize a
pulse transformer, since it could offer an inherent current balancing for parallel
connected switches and with the turns ratio the modulator design could be adapted to
the available semiconductor switch technology. In many applications as e.g. radar
systems, linear accelerators or klystron/magnetron modulators a rectangular pulse
shape with a fast rise time and a as small as possible overshoot is required. In reality,
however, parasitic elements of the pulse transformer as leakage inductance and
capacitances limit the achievable rise time and result in overshoot. Thus, the design of
the pulse transformer is crucial for the modulator performance. In this paper, a step by
step design procedure of a pulse transformer for rectangular pulse shape with fast rise
time is presented. Different transformer topologies are compared with respect of the
parasitic elements, which are then calculated analytically depending on the mechanical
dimensions of the transformer. Additionally, the influence of the core material, the
limited switching speed of semiconductors and the nonlinear impedance characteristic
of a klystron are analyzed.
Index Terms - Pulse transformer, rise time, transformer topology, transformer
design, solid state modulator.

1 INTRODUCTION In applications like radar systems, linear accelerators or

klystronand magnetron modulators, where a nearly
IN many application areas, the required output power level rectangular pulse shape is needed, also the requirements with
of test facilities in laboratories or in industry is rising and in respect to rise times, overshoot or voltage droop are high. In
more and more applications solid state modulators deploying Figure 1a the schematic waveform of a typical power
for example IGBT modules, with a constantly increasing modulator’s output voltage and in b) a power modulator with
power handling capability, are utilized. In contrast to the spark the specifications given in Table 1 are shown. Since the
gap switches, which can only be turned-on and have a limited transformer parasitic limit the achievable rise time and define
life time and switching frequency, available fast the resulting overshoot, the design of the transformer is
semiconductor switches have a limited power handling crucial. On the one hand, due to non-ideal material properties
capability, so that a parallel and/or series connection of the like the limited permeability (ȝ  ’) or the limited maximum
switches is required. The parallel connection of the flux density Bmax of the core material, the maximum voltage-
semiconductors basically offers a more robust design due to time-product respectively the minimum cut-off frequency fu of
the better capability of the switches to handle over-currents the pulse transformer is defined.
compared to over-voltages. In [1] it has been shown, that a
modulator based on pulse transformer is the most suitable
topology for pulses in the Ɋs-range, since it could offer an
inherent current balancing in parallel connected power
semiconductors. Additionally, the turn ratio of the pulse
transformer offers a degree of freedom that allows adapting
the modulator design to the current and voltage ratings of
available switch technology.

Manuscript received on 11 October 2010, in final form 24 January 2011. Figure 1. a) Typical pulse waveform; b) 20 MW pulse modulator.

1070-9878/11/$25.00 © 2011 IEEE

1172 D. Bortis et al.: Design Procedure for Compact Pulse Transformers with Rectangular Pulse Shape and Fast Rise Times

Table 1. Specification of the 20 MW, 5ȝs pulse modulator.

DC Link Voltage Vin 1000V
Output Voltage Vout 200kV
Pulse Duration Tp 5ȝs
Output Power Pout 20MW
Rise Time Tr < 500ns
Overshoot οVmax < 3%
Turns ratio 1:170

On the other hand, in transformers no ideal magnetic

coupling between windings can be achieved, which results in Figure 2. a) IEEE standardized equivalent circuit of a pulse transformer and
a certain leakage inductance Lɐ. Additionally, parasitic b) simplified equivalent circuit during the leading edge.
capacitances of the transformer define the transient voltage
distribution and result in combination with Lɐ in an upper cut- shown in Figure 2b during the leading edge if n ‫ ب‬1 [4].
off frequency fo of the transformer. Often the parasitic There, all impedances and the input voltage Vg are
capacitances are summarized in one single lumped capacitor transferred to the secondary and, hence, the ideal
Cd as will be shown later. transformer can be neglected. If nothing mentioned, in this
The output voltage with an almost rectangular pulse shape, paper, also all measured impedances are referred to the
however, exhibits a wide frequency spectrum. In order to secondary. Since the pulse rise time Tr is in the range of
transfer the voltage pulse with a minimum pulse distortion, some 100 ns and there is - due to very small voltage-time-
especially during the rise time, a maximum bandwidth has to product – no excitation of the core, the influence of the core
be achieved, which means that the mentioned parasitic of the material, i.e. RFe and Lmag, can be neglected during the rise
transformer must be minimized. time. Even if the core resistance RFe would be considered, it
would not have an influence on the rise time, since it is
Consequently, the pulse transformer is one of the key
connected in parallel to the load resistance, which in this
components of pulse modulators, which mainly defines the
case is Rload = 1500 ё if referred to the secondary or Rload;pri
achievable rise time Tr and overshoot ǻVmax of the output
= 0.052 ё if referred to the primary. There, the load
voltage pulse.
resistance Rload is much smaller than the resistance of the
In this paper, a general step by step design procedure of a
core material, which was calculated to RFe ൎ 4 ё on the
pulse transformer is presented. In section 2 the influence of the
parasitic elements Lɐ and Cd is analyzed with a standardized primary.
pulse transformer model. During the rise time this model can Therefore, the rise time and the overshoot of the output
be simplified, which allows to derive basic design equations voltage, are mainly defined by the leakage inductance Lɐ
concerning rise time and overshoot of the pulse transformer. and the capacitance Cd. Assuming an ideal step voltage at
Based on this, in section 3 different transformer topologies are the primary, the output voltage vout(t) can be calculated with
compared with respect to the fastest achievable rise time. In the Laplace-transform as described in [4].
order to define the mechanical dimensions, the leakage
inductance Lɐ and the capacitance Cd are calculated
analytically in section 4. In order to achieve faster rise time,
transformers with multiple cores can be used, as described in
section 5. In section 6 the influence of the core material
properties like permeability Ɋ, maximum flux density B and
where the damping coefficient ߪ of (1) is given by
the core losses during pulse excitation is evaluated based on
experimental results.
In section 7 the influence of the limited switching speed of
semiconductors and the nonlinear impedance characteristic of
a klystron is evaluated. Experimental results of the built pulse If it is assumed, that the output pulse shape is mainly
modulator are shown in section 8. defined by the transformer characteristics,, the modulator’s
impedance Rg can be neglected. Thus, the damping
coefficient ߪ considering only the influence of the
2 PULSE TRANSFORMER'S transformer can be simplified to
EQUIVALENT CIRCUIT
In literature numerous electrical equivalent circuits
considering LF and HF properties of pulse transformers As will be shown later, however, depending on the turns
have been proposed and IEEE standardized the equivalent ratio of the pulse transformer, the pulse generator’s
circuit of pulse transformers [3] as shown in Figure 2a. In parasitic inductance Lgen and capacitance Cgen - resulting
order to simplify the analysis of the transient behavior for from the dc-link capacitors, the switches and the
operation with rectangular pulse voltages, the standardized interconnections – as well as the parasitic capacitance of
equivalent circuit can be reduced to the equivalent circuit the load Cd have to be considered for the calculation of the
IEEE Transactions on Dielectrics and Electrical Insulation Vol. 18, No. 4; August 2011 1173

vload(t) rises from 10% to 90% (cf. Figure 3). For ߪ = 0.75
the factor is T10%-90% = 0.365.
Since the rise time Tr is proportional to LߪήCd, the
parasitics have to be minimized in order to achieve the
fastest possible rise time. For example, to keep the rise time
below Tr = 500 ns, LߪήCd has to be smaller than 4.75x10-14
if ߪ = 0.75.
Since the load impedance is Rload = 1500 ё, the ratio of Lߪ
and Cd is fixed and the maximum values for the
specifications in Table I are: Lߪ < 490 ɊH, Cd < 97 pF.

2.3 DESIGN CRITERIA

In order to fulfill the requirements for the maximum
Figure 3. Transient behavior of the normalized output voltage for different overshoot and the maximum rise time, both a given ratio of
damping coefficients ɐ. Lߪ to Cd and a maximum product of Lߪ and Cd have to be
guaranteed. In general, the pulse modulator connected to
overshoot and the rise time. For these cases, the input the transformer’s primary as well as the load connected to
impedance should be changed from a resistance Rg to an the secondary winding have a certain inductance Lgen /
impedance Zg. If the step up ratio of the pulse transformer is capacitance Cload, which also have to be considered. For the
high, the parasitic capacitance Cgen can be neglected, since realized pulse generator a parasitic inductance of Lgen =
it is transferred to the secondary, the capacitance is divided 260ɊH was measured. Typical capacitance values of
by n2, which is much smaller than the parasitic capacitance klystrons are in the range of Cload = 40 -120 pF [18] for
of the transformer Cd or the load Cload. In Figure 3 the the considered application. This means that the leakage
transient behavior of the normalized output voltage during inductance and the distributed capacitance of the
transformer must be small to meet the pulse specifications.
b
T t is illustrated. A decreasing damping coefficient ߪ Therefore, equations (4) and (5) have to be extended to
2S
results in a faster rise time Tr. Starting from ߪ < 1 a
tradeoff between Tr and overshoot is found. Therefore, to
achieve a minimum rise time Tr, the damping coefficient ߪ
has to be selected as small as possible while the resulting
overshoot has to be still below the maximum allowed value 3 TRANSFORMER TOPOLOGY
(Figure 1a and Table 1). The ratio of Lߪ and Cd can be varied by the mechanical
2.1 OVERSHOOT dimensions of the transformer, i.e. the distances, the heights
and the lengths of the windings. The product of Lߪ and Cd,
Considering equation (3), ߪ depends on Lߪ and Cd, i. e. on however, is defined by the transformer topology and can be
the pulse transformer’s mechanical dimensions and on the assumed to be approximately constant [4]. Therefore, first
load impedance Rload. In general, Rload, for example of a the transformer topology resulting in the smallest LߪCd-
klystron, is defined by the application. Therefore, the pulse product has to be selected. Afterwards, the mechanical
transformer’s mechanical dimensions must be adjusted in dimensions must be calculated to achieve the needed LߪCd-
order to fulfill the specifications of the pulse shape. ratio.
Assuming a klystron load of Rload = 1500 ё, for a maximum In the following, the LߪCd-product of three different
overshoot of 3% a damping coefficient of ߪ = 0.75 is transformer topologies is analyzed. The leakage inductance
needed (equation (3)). Consequently, with a given Rload and Lߪ and the capacitance Cd are calculated with the energy
ߪ, the ratio of leakage inductance Lߪ and capacitance Cd is stored in the magnetic & electric field.
fixed by

2.2 RISE TIME

In addition to the overshoot, the rise time Tr of the output
voltage can be derived from equation (1). As shown in
equation (5), Tr is proportional to the product of Lߪ and Cd.

Figure 4. a) Picture of a pulse transformer with parallel winding and b) 2D

Factor T10%-90% depends on the selected damping drawing of one leg with simplified run of the magnetic and electric field
coefficient ߪ and equals the time in which the voltage lines.
1174 D. Bortis et al.: Design Procedure for Compact Pulse Transformers with Rectangular Pulse Shape and Fast Rise Times

Finally, the LߪCd-product of the transformer topology with

parallel windings is

To simplify the comparison, only the energies between 3.2 CONE WINDING
the windings are considered. Finally, for the transformer Since the distance between the windings of the
topology with the smallest LߪCd-product a more detailed transformer with parallel winding is constant but the
calculation of the parasitic is presented. voltage is increasing linearly in y-direction, the electric
field between the windings also increases linearly. In order
JG
3.1 PARALLEL WINDING to achieve a constant electric field E (y) the distance
Due to the simple construction, the parallel winding between the windings dw has to be linearly decreased for
topology is widely used. The primary and secondary are smaller voltage differences, which results in a cone winding
wound on two parallel bobbins, whose distance is defined [4], [19] as shown in Figure 5.
by the required isolation. In Figure 4a picture and 2D Compared to the parallel winding, the volume between
drawing of the parallel winding are shown. the windings and therefore also the leakage inductance Lߪ
The leakage inductance is mainly defined by the volume can be reduced by a factor of two. However, due to the
and the magnetic field strength between the bobbins smaller distance between the windings Cd is increases.
(equation (7)). According to Ampere’s law and assuming To calculate the leakage inductance Lߪ of the cone
an ideal core material (ߤ = λ), the magnetic field strength winding, again, a constant magnetic field in y-direction is
JG assumed (Figure 5), which was confirmed by FEM-
H in the core window is given by the primary current times
simulation as long as dw ‫ ا‬hw.
the number of turns NpriήIpri and the height of the core hk.
Considering equation (7), the stored magnetic energy Emag
and the resulting leakage inductance Lߪ,cone are
Using equations (7) and (9), the stored magnetic energy
Emag between the windings Wpri and Wsec can be
approximately calculated by
Due to the linearly increasing distance dw(y) and the
voltage distribution οV (y) in y-direction, the electric field
and the resulting leakage inductance Lߪ,parallel is JG
E between the winding is constant and runs approximately
parallel to the x-direction (Figure 5b). Hence, the stored
To calculate the capacitance Cd, a linear voltage electric energy (equation (8)) for a cone winding and the
distribution capacitance Cd are
Vpri(y) and Vsec(y) is assumed across the windings.

Therewith, the voltage difference between the primary

and secondary winding depending on the vertical position y Finally, the resulting LߪCd-product of the cone winding
is οV(y) = Vsec(y)-Vpri(y). is
Due to the voltage difference between the windings Wpri
and Wsec, the electric field lines run approximately
JG Compared to the parallel winding, the LߪCd-product can
horizontally (Figure 4b). Thus, the electric field E (y)
depending on the y-position is be reduced by 25%, which results in a rise time
improvement of
13.4%.
Considering equation (8), the stored energy between the
windings Wpri and Wsec and therewith the capacitance Cd are
calculated.

Figure 5. a) Picture of a pulse transformer with cone winding and b) 2D

drawing of one leg with simplified run of the magnetic and electric field
lines.
IEEE Transactions on Dielectrics and Electrical Insulation Vol. 18, No. 4; August 2011 1175

3.3 FOIL WINDING Considering only the stored magnetic and electric energy
Finally, for the primary Wpri and secondary Wsec foil between the windings Wpri and Wsec, the smallest LߪCd-
windings are considered. The secondary is directly wound product and therefore the fastest Tr can be achieved for the
on the primary winding as shown in Figure 6. For the transformer with a cone winding. Since the considered
isolation of the turns a material with a low permittivity is volume contains the major share of the magnetic and
used. electric energy, the calculated LߪCd-product is a reliable
The thickness diso of the isolation can be kept small, since indicator for selecting the best transformer topology.
the voltage difference between two consecutive turns is just
Vw,w = Vsec/Nsec. However, due to the increasing voltage 4 PARASITICS CALCUALTION
difference between the turns and the core, the winding’s In a next step, also the magnetic and electric fields
height is linearly decreased from hw,1 to hw,2 (Figure 6b). between the winding and the core as well as the electric
The total thickness dw of the winding is defined by the fields between the windings and the enclosing wall of a
thickness of the isolation diso and the foil dcu times the tank are considered in order to obtain a more precise model
number of turns. for designing the transformer. For example, in Figure 7a,
The leakage inductance Lߪ of the foil winding is JG
the resulting electric field E for a transformer placed in a
calculated again with the stored magnetic energy (equation
tank is shown.
(7)). Based on Ampere’s law, the magnetic field is
As it was proposed in [4], in Figure 8a a measured and a
gradually increasing with the number of turns nL, since the
calculated waveform considering only the energy stored
enclosed amount of current is increasing gradually (Figure
between the windings are shown. It clearly indicates the
6).
mismatch between measurement and simplified calculation
of the parasitics. Since only the electric energy between the
windings is considered, Cd is too small and results in a too
The total magnetic energy is the sum of all energies small overshoot predicted by the transformer model.
between two consecutive turns, which is Therefore, a more detailed calculation procedure, which
considers all stored electric and magnetic energies, is
needed.
4.1 DISTRIBUTED CAPACITANCE
To improve parasitics calculation the energy outside the
Thus, the resulting Lߪ,foil is
windings is considered in the following. As shown in Figure
7b, the space around the transformer is divided into six
relevant regions R1 to R6. With geometric approximations, the
stored energy in each region can then be calculated
Capacitance Cd can be calculated as a series connection of analytically. In [2] the detailed calculation of the distributed
parallel plate capacitors between consecutive turns Cw,w. capacitances depending on the mechanical dimensions of the
The distance of the plates equals diso, which can be transformer is investigated. There, the calculated values have
expressed by the total winding thickness. been compared with measured and simulated impedance
values determined by FEM-simulation. The output voltage
predicted with the improved model is shown in Figure 8b.
Assuming a constant winding height hw = (hw,1+hw,2)=2, the
capacitance Cd for the foil winding results in

and the LߪCd-product is

JG
Figure 7. a) Electric field E of a transformer with cone winding in a tank.
b) Six relevant regions for calculating capacitance Cd.

Table 2. Relative stored electric energy of each region R1¡R6 with and
without tank.
Region R1 R2 R3 R4 R5 R6
With tank 22.6% 6.4% 44.4% 25.2% 0.6% 0.8%
Figure 6. a) Picture of a pulse transformer with foil winding and b) 2D Without tank 33.9% 9.6% 44.3% 10.1% 0.9% 1.2%
drawing of one leg.
1176 D. Bortis et al.: Design Procedure for Compact Pulse Transformers with Rectangular Pulse Shape and Fast Rise Times

parallel/parallel, parallel/series, series/parallel or in

series/parallel on the primary/secondary.
5.1 PARALLEL OR SERIES CONNECTION OF
PULSE TRANSFORMERS

In Figure 10 the equivalent circuits of two parallel a) and

Figure 8. Comparison of measured and calculated output voltage if a) only
two series b) connected identical pulse transformers are
the energy between the winding and b) the energy in all regions is shown. There, also an interconnection of an arbitrary
considered. number of transformers would be possible. However,
considering Figure 10, it is directly obvious that no
The energies in all regions R1-R6 have to be calculated reduction of the LߪCd-product and the rise time Tr can be
and with the total electric energy, Cd can be determined. As achieve by such an interconnection.
an example, in Table 2 the relative stored electric energy in With the parallel connection of the secondaries, for
each region for a transformer with cone winding with and example, the total leakage inductance Lߪ is halve as big as
without tank is listed. with one transformer, whereas the total capacitance Cd
There, it is assumed, that the distance between the upper doubles. The only advantages are the reduction of winding
end of the secondary winding and the tank is the same as resistance and the more flexible design if several switches
the distance between primary and secondary, which is dw. have to be connected to the pulse transformer.
Table 2 clearly shows that only about a quarter of the Additionally, the transformer geometry will change, since
total electric energy is stored between the windings. the ratio of Lߪ to Cd is changed by a factor of four.
Considering only R1, in practice, the design of the However, the costs and the losses of the core material will
transformer would result in a too large overshoot, since the increase.
real distributed capacitance would be much larger than the
calculated one.
4.2 LEAKAGE INDUCTANCE

Compared to the capacitance Cd, the calculation Lߪ is

more challenging, since there no simple division into
subregions is possible.
To precisely calculate the stored magnetic energy, FEM
simulations are used. In Figure 9 the energy density for a Figure 10. Equivalent circuit of two identical pulse transformers, which
pulse transformer with cone winding is illustrated. are a) connected in parallel and b) connected in series.
The simulation shows, that the major part of the magnetic
energy is concentrated in the region between the windings 5.2 MULTIPLE CORE / MATRIX TRANSFORMER
JJG
and the magnetic field H is almost constant. Therefore, In contrast to parallel or series connection of multiple
pulse transformers a reduction of the LߪCd-product and the
the simple calculation of Lߪ in section 2 (equation (18)) rise time Tr can be achieve if a pulse transformer with
already matches the real leakage inductance well. multiple cores is used, which are usually called matrix
Compared to FEM simulation the relative error of the transformer, fractional turn transformer, split-core
simple equation is in the range of 10-20% if dw ‫ا‬hw. transformer or voltage adder [1, 6-11].
In Figure 11a the top view of two in series connected
5 INTERCONNECTION OF PULSE pulse transformers is shown, where Npri = 1 and Nsec = n=2.
TRANSFORMERS As mentioned before, by connecting transformers in series
or parallel no improvements regarding Tr can be achieved.
Instead of one pulse transformer also several pulse However, instead of connecting the secondaries in series,
transformers could be used, which are connected either in both secondaries can be combined to one secondary which

Figure 11. Top view of a) series connected pulse transformers with Nsec =
Figure 9. Magnetic energy density for a pulse transformer with cone n/2 and winding length lw and b) pulse transformer with two cores and
winding. reduced winding length lw’.
IEEE Transactions on Dielectrics and Electrical Insulation Vol. 18, No. 4; August 2011 1177

encloses both cores, whereas some volume between the

primary and secondary winding is saved (Figure 11b). The
saved volume directly results in a reduced leakage
inductance and distributed capacitance compared to the
series connection of the standard transformers. For this
transformer configuration the conversion ratio between the
primary and secondary voltage is not only defined by the
turns ratio n but also by the ratio of enclosed core areas Apri
and Asec (equation (28)) [1].
Figure 12. Measured hysteresis curve with flux excitation to Bmax.

the second highest flux density can be achieved.

Unfortunately, these materials also have the highest core
Since Tr is proportional to the winding length, the reduction losses. Nickel and nickel-iron alloys result in the lowest
of Tr can directly be calculated by the winding length’s core losses, which only can be achieved with amorphous
reduction. and nanocrystalline materials [14].
For the considered pulse transformer only silicon-iron
alloys, due to the high flux density and the low cost, as well
as iron based amorphous and nanocrystalline core
materials, due to the low losses, were analyzed (Table 4).
For the considered transformer the distance between The measured hysteresis curves of the materials listed in
primary and secondary is dw = 2.5 cm and the core Table 4 are shown in Figure 12 for a pulse excitation of 5
dimensions are ak = bk = 5 cm. Consequently, the winding Ɋs. There, the core was premagnetized with a passive
length of the transformer was reduced from lw = 60 cm to premagnetization circuit. Due to premagnetization of the
lw’ = 40 cm, which results in a Tr reduction of 33%. transformer core - either with passive [15] or active circuits
In order to further reduce the rise time, additional cores [16, 17] - the total flux swing during one pulse can be
could be used. However, the relative improvement doubled. Consequently, with a premagnetization circuit for
decreases for increasing number of cores, whereas the costs the pulse transformer only halve the core cross section is
for the core material increase. required. This further results in shorter winding lengths
(lower copper losses), in a smaller volume between the
windings (lower leakage inductance and distributed
6 CORE MATERIAL
capacitance) and finally in a reduced rise time. Due to the
higher core losses, however, a proper design concerning
Beside the winding topology, the selection of the core maximum allowable flux swing has to be done. On the one
material is crucial, since non-ideal material properties like hand the core losses increase since the flux swing is
the limited permeability (ߤ്λ) or the limited Bmax directly doubled; on the other hand the core losses are reduced since
influence the achievable bandwidth and therefore the the core volume is halved. In total the core losses will
performance of the pulse transformer. increase due to the nonlinear relation between flux density
With a higher Bmax, for example, the core cross section and core losses. With silicon-iron a maximum flux density
can be reduce, which results in smaller parasitics and
therefore in faster rise times.
In Table 3 different core materials are listed [12]. There,
with cobalt-iron alloys the highest flux densities can be
achieved. Due the high prices, however, this material is
mainly used in military or aerospace applications [13]. Iron
and silicon-iron alloys are the cheapest core material, where

Table 3. Core materials and maximum flux density Bmax [12].

CoFe (35%-65%) 2.43T
Fe 2.16T
SiFe (3%) 2T
Ni (75%) 0.6T
NiFe (50%-50%) 1.6T

Table 4. Analyzed core materials and manufacturers.

Finemet FT3-M (nanocrystalline) (18Ɋm) Hitachi Figure 13. Measured hysteresis curve of a) SiFe alloy with tape thicknesses
2605SA1 (amorphous)(25Ɋm) Metglas of 50 Ɋm and 100 Ɋm and b) of 2605SA1 for different pulse durations of 5
Ɋs, 7 Ɋs and 10 Ɋs and c) influence of a cut in the core material on the
SiFe alloy 3% (50Ɋm) e.g. Magnetics
hysteresis curve.
1178 D. Bortis et al.: Design Procedure for Compact Pulse Transformers with Rectangular Pulse Shape and Fast Rise Times

of Bsat = 1.73T was achieved. Since the flux density defines

the needed core cross section, compared to Finemet (1.18T)
and 2605SA1 (1.47T) the core cross section of silicon-iron
would be 46% respectively 17% smaller.
As already mentioned, due to the core losses - which are
given by the area of the hysteresis curve - the flux
excitation is usually much below the maximum flux
density, which mainly depends on the pulse repetition rate
Figure 14. a) Transient responses for different turn-on times Ton of the
and the allowable average core losses. As shown in Figure semiconductor and b) relative difference in overshoot for a turn-on time of
12, SiFe has the largest and Finemet the smallest areas in Ton = 300 ns.
the hystersis curve. Therefore, for a proper selection of the
core material beside Bmax also the core losses have to be illustrated. Due to the increased Ton, Tr is increased whereas
considered, since the efficiency can be increased and the the overshoot is decreased.
cooling effort is reduced. However, it has to be mentioned There, the relative reduction of the overshoot is not only
that the core losses are not only defined by the selected depending on the switching speed Ton and the ratio of Lߪ and
material. As shown in Figure 13a, for example, the Cd but also on the absolute values of Lߪ and Cd (Figure 14b).
thickness of the metal tape used in tape wound cores or the As shown in Figure 14a, for Ton in the range of ൎͳ00 ns
pulse duration, as shown in Figure 13b, can strongly the influence of the limited switching speed can be
influence the core losses. In addition a cut in the core neglected, which in the worst case results in a relative
material, which has be done due to fabrication reasons of overshoot reduction of less than 0.4%. However, for
the pulse transformer, leads to a lower permeability, to a switching times above Tonൎ300 ns the limited switching
slightly larger hysteresis loop and consequently to higher speed must be considered (Figure 14). It has to be
core losses, as shown in Figure 13c. Therefore, in order to mentioned, that the actual turn on characteristic (forward
compare different core materials regarding core losses, the voltage drop vs. time) of IGBTs tends to reduce the
same conditions must be applied. overshoot.

6.2 INFLUENCE OF NONLINEAR KLYSTRON

7 DESIGN PROCEDURE
IMPEDANCE
In general, for the design and the initial operation of the
As described in section II, Tr and the overshoot mainly power modulator, the klystron is substituted by an
depend on the ratio and the product of the total series equivalent resistive load Rload. On the one hand, this
inductance Lgen+Lߪ and the total capacitance Cd + Cload. substitution simplifies the design of the system and on the
There, the basic equations were derived based on an ideal other hand, the klystron is an expensive and sensitive
rectangular input voltage and a resistive load. However, in amplifier, which can be easily damaged during initial tests.
reality, the switching times of power semiconductors like However, for the design of the power modulator, especially
IGBT modules are in best case in the range of some 100 ns. of the pulse transformer, the nonlinear impedance
Consequently, due to the reduced voltage slope of the input characteristic of the klystron has to be considered. As
voltage also the rise time is increased, which results in a described in [20, 21], the klystron results in a higher
decreased overshoot. damping compared to the equivalent resistance, whereas
In addition, the impedance characteristic of the klystron is during the rising edge the damping coefficient changes
nonlinear and decreases with voltage, which also leads to from 0.6 to 0.9 due to the nonlinear impedance. Therefore,
an additional damping. Therefore, the influence of these with a klystron load a smaller damping coefficient ߪ is
effects has to be analyzed, since the design criteria like the needed compared to the equivalent resistive load.
needed damping coefficient ߪ and the resulting Tr are According to [20], the klystron’s impedance can be
changed. modeled by
6.1 INFLUENCE OF POWER SEMICONDUCTOR
SWITCHING SPEED
where k is the perveance of the klystron.
To calculate the influence of the limited switching speed
of the power semiconductor on Tr and the overshoot, the
real input voltage is approximated by a trapezoidal voltage.
According to section 2, the output voltage v(t) is again
calculated with the Laplace-transform and the equivalent
circuit shown in Figure 2b.
In Figure 14a the resulting transient responses of the
output voltage for different turn-on times Ton respectively Figure 15. a) Comparison of the transient responses for a klystron load and
voltage slopes of Ton = 0 ns, Ton = 120 ns, Ton = 300 ns and a resistive load. b) Relative difference in overshoot for a turn-on time of Ton
Ton = 500 ns and for Lߪ =250 ɊH/Cd = 200 pF are = 300 ns.
IEEE Transactions on Dielectrics and Electrical Insulation Vol. 18, No. 4; August 2011 1179

Considering equation (30), the klystron current Ik decreases In addition to the transformer parasitics, also the
more than linear with increasing klystron voltage, which nonlinear impedance characteristic of a klystron and the
results in a decreasing resistance for higher voltages and limited switching speed of semiconductors have to be
therefore in a decreasing overshoot compared to a linear considered in the design of the transformer as it is shown in
load. The resulting transient responses for a klystron load the paper and validated by measurement results.
and a resistive load are shown in Figure 15a assuming Lߪ =
250 ɊH and Cd = 200 pF. The klystron leads to a REFERENCES
significantly reduced overshoot compared to a resistive [1] D. Bortis, J. Biela and J.W. Kolar, “Transient Behaviour of Solid
load. State Modulator with Split Core Transformer”, IEEE Intern. Pulsed
Since the overshoot of 3% is specified for a klystron load, Power Conf. (PPC), Washington DC, USA, pp. 1396 – 1401, 2009.
for the equivalent resistive load the pulse transformer has to [2] J. Biela, D. Bortis and J.W. Kolar, “Modeling of Pulse Transformers
with Parallel- and Non-Parallel-Plate Windings for Power
be designed with a much higher overshoot, which is in this Modulators“, IEEE Transa. Dielectr. Electr. Insul., Vol. 14,
case 11%. Compared to the calculation in section II, the pp.1016–1024, 2007.
damping coefficient has to be decreased from ߪ = 0.75 to ߪ [3] The Institute of Electrical and Electronics Engineers, “IEEE
= 0.58. Standards for Pulse Transformers“, ANSI/IEEE Std 390-1987,
1987.
In contrast to the limited switching speed, the influence of
[4] N. G. Glasoe and J. V. Lebacqz, Pulse Generators, MIT Radiation
the klystron load on the overshoot does not depend on the Laboratory Series, Vol. 5, McGraw-Hill Book, New York, 1948.
absolute values of Lߪ and Cd but only depends on the [5] M. Akemoto, S. Gold, A. Krasnykh and R. Koontz, “Pulse
damping coefficient ߪ, as shown in Figure 15b. Transformer R&D for NLC Klystron Pulse Modulator”, IEEE 11th
Pulsed Power Conf., Baltimore MA, USA, Vol. 1, pp. 724-729,
1997.
8 EXPERIMENTAL RESULTS [6] W. Crewson, M. Lindholm and D.K. Woodburn, “A New Solid
State High Power Pulsed Modulator”, United States Patent, Patent
In Figure 16 the measured output voltage and the built No. 5905646, 1999.
pulse transformer for a 20 MW power modulator with a [7] W. Crewson, M. Lindholm and D. K. Woodburn, “Power
klystron load is shown. Modulator”, Scanditronix Medical AB, Patent US 5905646A, May
The measured Tr is below 500 ns and the overshoot with 1999.
[8] W. Crewson and D. K. Woodburn, “Power Modulator Having at
resistive load is 10.4%. This matches well with the 11% Least One Pulse Generating Module; Multiple Cores; And Primary
overshoot calculated for a passive load. Due to the larger Windings Parallel-Connected such that each Pulse Generating
damping, with the klystron the resulting overshoot will be Module Drives all Cores”, Patent US 2003/0128554 A1, 2003.
below 3%. [9] M. Akemoto, Y. H. Chin and Y. Sakamoto, “High-Power Klystron
Modulator Using Solid-State IGBT Modules”, 2nd Asian Particle
Accelerator Conf., Beijing, China, pp. TUP001, 2001.
[10] E. Herbert, “Flat Matrix Transformer”, Patent US 4665357, May
1987.
[11] E. Herbert, “High Frequency Matrx Transformer”, Patent US
4845606, 1989.
[12] R. Böll, Weichmagnetische Werkstoffe, Book, Wiley-VCH Verlag,
Germany, Issue 4, 1990.
[13] A. W. Molvik and A. Faltens, “Induction core alloys for heavy-ion
inertial fusion-energy accelerators”, Phys. Rev. Special Topics -
Accelerators and Beams, Vol. 5, Issue 8, Paper No. 080401, 2002.
[14] G. E. Fish, “Soft Magnetic Materials“, Proceedings of IEEE, Vol.
Figure 16. a) Measured output voltage waveform and b) designed pulse 78, Issue 6, Page(s): 947-972, Jun. 1990.
transformer for the specifications given in Figure 1. [15] D. Bortis, J. Biela and J. W. Kolar, “Optimal Design of a DC Reset
Circuit for Pulse Transformers”, IEEE 20th Applied Power Electronics
Conf. (APEC), Anaheim CA, USA, pp. 1171-1177, 2007.
[16] J. Biela, D. Bortis and J.W. Kolar, “Reset Circuits with Energy
9 CONCULSION Recovery for Solid State Modulators”, IEEE Trans. Plasma Science,
Vol. 36, Issue 5, pp. 2626-2631, 2008.
In this paper, a step-by-step design procedure of a pulse [17] D. Bortis, J. Biela and J. W. Kolar, “Design and Control of an
transformer for rectangular pulse shapes and a fast rise time Active Reset Circuit for Pulse Transformers”, IEEE Trans.
is presented. Dielectrics and Electrical Insulation, Vol. 16, Issue 4, pp. 940-947,
2009.
Based on the transformer model, it could be seen that the [18] J. S. Oh, M.H. Cho, W. Namkung, K. H. Chung, T. Shintake and H.
rise time of transformers is proportional to the product of Matsumoto, “Rise time analysis of pulsed klystron modulator for
the leakage inductance Lߪ and the parasitic output efficiency improvement of linear colliders”, Nuclear Instruments
capacitance Cd of the pulse transformer. and Methods in Physics Research Section A, Vol. 443, No. 2-3, pp.
223-230, 2000.
This product is calculated for three different transformer [19] H. W. Lord, “Pulse Transformers”, IEEE Trans. Magnetics, Vol. 7,
topologies: parallel, cone and foil winding concepts and it pp. 17-28, 1971.
is shown that with a cone winding the fastest rise time can [20] G. Caryotakis, High Power Klystrons: Theory and Practice at the
be achieved. Stanford Linear Accelerator Center, SLAC-PUB, 2004.
[21] J. S. Oh, M. H. Cho, W. Namkung, T. Shintake, H. Matsumoto, K.
The resulting overshoot is defined by the LߪCd-ratio. For Watanabe and H. Baba, “Efficiency Analysis of the first 111- MW
the calculation of these parasitics an improved calculation C-Band Klystron-Modulator for Linear Collider”, Particle
procedure is proposed and validated by measurements. Accelerator Conf. (PAC), Vol. 1, pp. 163-166, 1998.
1180 D. Bortis et al.: Design Procedure for Compact Pulse Transformers with Rectangular Pulse Shape and Fast Rise Times

Dominik Bortis (S’06-M’09) was born in Fiesch, Gabriel Ortiz was born in Chuquicamata, Chile,
Switzerland on 29 December 1980. He studied on 13 September 1984. He studied electronics
electrical engineering at the Swiss Federal Institute engineering at Universidad Técnica Federico Santa
of Technology (ETH) Zurich. During his studies he María, Valparaíso, Chile, joining the power
majored in communication technology and automatic electronics group early on 2007. During his Master
control engineering. In his diploma thesis he worked thesis he worked with reconfiguration of
with Levitronix, where he designed a galvanic regenerative and non-regenerative cascaded
isolation system for analog signals. He received his multilevel converters under fault condition,
M.Sc. degree in 2005, and has been a Ph.D. student obtaining maximum qualification on his Thesis
at the Power Electronic Systems Laboratory, ETH Zürich, from 2005 to Examination. He received his M.Sc. degree in 2008. He has been a Ph.D.
2008. Since 2008 he is working as PostDoc at the Power Electronic student at the Power Electronic Systems Laboratory, ETH Zürich, since
Systems Laboratory, ETH Zürich. 2009.

Juergen Biela (S’04-M’06) received the diploma

(with honors) from the Friedrich-Alexander Johann W. Kolar (M’89-SM’02) studied
University in Erlangen, Germany in 2000 and the industrial electronics at the University of
Ph.D. degree from ETH Zurich in 2005, all in Technology Vienna, Austria, where he also
electrical engineering. During his Master degree received the Ph.D. degree (summa cum laude).
studies, he also studied at the Strathclyde University, From 1984 to 2001 he was with the University of
Scotland, UK, and at the Technical University of Technology in Vienna, where he was teaching and
Munich. From 2000 to 2002 he worked at the working in research in close collaboration with
research department of A&D Siemens. In 2002, he joined the Power industry. He has proposed numerous novel
Electronic Systems Laboratory (PES), ETH Zurich working towards his converter topologies, e.g., the VIENNA Rectifier
Ph.D. degree. After finishing his Ph.D. degree in 2005, he worked as and the Three-Phase AC-AC Sparse Matrix
Post-Doctoral Fellow (2006-2007) and as Senior Scientist (2008-2010) at Converter concept. Dr. Kolar has published over 300 scientific papers in
PES. In 2007 he was a guest researcher at the Tokyo Institute of international journals and conference proceedings and has filed more than
Technology, Japan. In 2010, he has been appointed associate professor 75 patents. He was appointed Professor and Head of the Power
for high power electronics at the ETH Zurich. Electronics Systems Laboratory at the ETH Zurich in 2001.