0% found this document useful (0 votes)

6 views

ECE Syllabus 2022

The document outlines the teaching and examination scheme for the B.E. in Electronics and Communication Engineering at Visvesvaraya Technological University, effective from the academic year 2023-24. It details the courses, credits, teaching hours, and evaluation methods for the III and IV semesters, including core and elective courses, as well as mandatory activities like National Service Scheme and Physical Education. The document emphasizes the importance of continuous internal evaluation and semester-end examinations for student assessment.

Uploaded by

akshatakalgudimath

Available Formats

Download as PDF, TXT or read online on Scribd

0% found this document useful (0 votes)

6 views

ECE Syllabus 2022

Uploaded by

akshatakalgudimath

Available Formats

Download as PDF, TXT or read online on Scribd

You are on page 1/ 95

1

VISVESVARAYA TECHNOLOGICAL UNIVERSITY, BELAGAVI

B.E. in Electronics and Communication Engineering
Scheme of Teaching and Examinations2022
Outcome Based Education (OBE) and Choice Based Credit System (CBCS)
(Effective from the academic year 2023-24)
III SEMESTER
Teaching Hours /Week Examination

Department (TD)

Paper Setting
and Question

Board (PSB)
Course

Practical/
Drawing
Tutorial
Lecture
Teaching

Total Marks
Theory
Sl. Course

Duration in

CIE Marks

SEE Marks

Credits
SDA
Code Course Title

hours
No

L T P S
TD- Maths
1
PCC BMATEC301 AV Mathematics-III for EC Engineering PSB - Maths 3 0 0 03 50 50 100 3
2
IPCC BEC302 Digital System Design using Verilog
TD: ECE
3 0 2 03 50 50 100 4
PSB: ECE
3 IPCC BEC303 Electronic Principles and Circuits
TD: ECE
3 0 2 03 50 50 100 4
PSB: ECE
PCC BEC304 TD: ECE
4 Network Analysis PSB: ECE 3 0 0 03 50 50 100 3
5
PCCL BECL305 Analog and Digital Systems Design Lab
TD: ECE
0 0 2 03 50 50 100 1
PSB: ECE
6
ESC BXX306x ESC/ETC/PLC
TD:
3 0 0 03 50 50 100 3
PSB:
7 UHV BSCK307 Social Connect and Responsibility Any Department 0 0 2 01 100 --- 100 1
If the course is a Theory
AEC/ Ability Enhancement Course/Skill Enhancement 1 0 0
01
8
SEC
BXX358x Course– III If a course is a laboratory
50 50 100 1
0 0 2
02
BNSK359 National Service Scheme (NSS) NSS coordinator
Physical Education (PE) (Sports and Physical Education
9 MC BPEK359
Athletics) Director 0 0 2 100 --- 100 0
BYOK359 Yoga Yoga Teacher
Total 550 350 900 20
PCC: Professional Core Course, PCCL: Professional Core Course laboratory, UHV: Universal Human Value Course, MC: Mandatory Course (Non-credit), AEC: Ability
Enhancement Course, SEC: Skill Enhancement Course, L: Lecture, T: Tutorial, P: Practical S= SDA: Skill Development Activity, CIE: Continuous Internal Evaluation, SEE:
Semester End Evaluation.K :This letter in the course code indicates common to all the stream of engineering. ESC: Engineering Science Course, ETC: Emerging

JBOS 10.02.2023 / V5
2

Technology Course, PLC: Programming Language Course

.
Engineering Science Course (ESC/ETC/PLC)
BEC306A Electronic Devices BEC306C Computer Organization and Architecture
BEC306B Sensors and Instrumentation BEC306D Applied Numerical Methods for EC Engineers
Ability Enhancement Course – III
BEC358A LABVIEW programming BEC358C C++ Basics
BEC358B MATLAB Programming BEC358D IOT for Smart Infrastructure
Professional Core Course (IPCC): Refers to Professional Core Course Theory Integrated with practical’s of the same course. Credit for IPCC can be 04 and its Teaching–
Learning hours (L : T : P) can be considered as (3 : 0 : 2) or (2 : 2 : 2). The theory part of the IPCC shall be evaluated both by CIE and SEE. The practical part shall be
evaluated by only CIE (no SEE). However, questions from the practical part of IPCC shall be included in the SEE question paper. For more details, the regulation
governing the Degree of Bachelor of Engineering /Technology (B.E./B.Tech.) 2022-23 may please be referred.

National Service Scheme /Physical Education/Yoga: All students have to register for any one of the courses namely National Service Scheme (NSS), Physical Education
(PE)(Sports and Athletics), and Yoga(YOG) with the concerned coordinator of the course during the first week of III semesters. Activities shall be carried out between III
semester to the VI semester (for 4 semesters). Successful completion of the registered course and requisite CIE score is mandatory for the award of the degree. The
events shall be appropriately scheduled by the colleges and the same shall be reflected in the calendar prepared for the NSS, PE, and Yoga activities. These courses shall
not be considered for vertical progression as well as for the calculation of SGPA and CGPA, but completion of the course is mandatory for the award of degree.

JBOS 10.02.2023 / V5
3

VISVESVARAYA TECHNOLOGICAL UNIVERSITY, BELAGAVI

Department (TD)

Board (PSB)
and Question
Paper Setting

Self -Study
Practical/
Teaching

Drawing
Tutorial

Total Marks
Lecture
Sl. Course and

Duration in
Theory

CIE Marks

SEE Marks

Credits
Course Title

hours
No Course Code

L T P S
1 PCC BEC401 Engineering Electromagnetics ECE 3 0 0 03 50 50 100 3
2 IPCC BEC402 Basic signal Processing ECE 3 0 2 03 50 50 100 4
3 IPCC BEC403 Principles of Communication Systems ECE 3 0 2 03 50 50 100 4
4 PCCL BECL404 Communication laboratory ECE 0 0 2 03 50 50 100 1
5 ESC BEC405x ESC/ETC/PLC 3 0 0 03 50 50 100 3
If the course is Theory
TD and PSB: 01
AEC/ Ability Enhancement Course/Skill Concerned 1 0 0
6
SEC BXX456x department 50 50 100 1
Enhancement Course- IV If the course is a lab
02
0 0 2
4 BSC BBOK407 Biology For Engineers TD / PSB: BT, CHE, 3 0 0 03 50 50 100 3
7 UHV BUHK408 Universal human values course Any Department 1 0 0 01 50 50 100 1
BNSK459 National Service Scheme (NSS) NSS coordinator
Physical Education
9 MC BPEK459 Physical Education (PE) (Sports and Athletics)
Director
0 0 2 100 --- 100 0
BYOK459 Yoga Yoga Teacher

Total 500 400 900 20

PCC: Professional Core Course, PCCL: Professional Core Course laboratory, UHV: Universal Human Value Course, MC: Mandatory Course (Non-credit), AEC: Ability
Enhancement Course, SEC: Skill Enhancement Course, L: Lecture, T: Tutorial, P: Practical S= SDA: Skill Development Activity, CIE: Continuous Internal Evaluation, SEE:
Semester End Evaluation. K :This letter in the course code indicates common to all the stream of engineering.

JBOS 10.02.2023 / V5
4

Engineering Science Course (ESC/ETC/PLC)

BEC405A 8051 Microcontroller BEC405C Operating Systems
BEC405B Industrial Electronics BEC405D Control Systems
Ability Enhancement Course / Skill Enhancement Course - IV
BEC456A Embedded C basics BEC456C DAQ using LabVIEW
BEC456B PCB Design BEC456D Risk Management in IOT Implementation
Professional Core Course (IPCC): Refers to Professional Core Course Theory Integrated with practical of the same course. Credit for IPCC can be 04 and its Teaching–
Learning hours (L : T : P) can be considered as (3 : 0 : 2) or (2 : 2 : 2). The theory part of the IPCC shall be evaluated both by CIE and SEE. The practical part shall be
evaluated by only CIE (no SEE). However, questions from the practical part of IPCC shall be included in the SEE question paper. For more details, the regulation
governing the Degree of Bachelor of Engineering /Technology (B.E./B.Tech.) 2022-23
National Service Scheme /Physical Education/Yoga: All students have to register for any one of the courses namely National Service Scheme (NSS), Physical Education
(PE)(Sports and Athletics), and Yoga(YOG) with the concerned coordinator of the course during the first week of III semesters. Activities shall be carried out between III
semester to the VI semester (for 4 semesters). Successful completion of the registered course and requisite CIE score is mandatory for the award of the degree. The
events shall be appropriately scheduled by the colleges and the same shall be reflected in the calendar prepared for the NSS, PE, and Yoga activities. These courses shall
not be considered for vertical progression as well as for the calculation of SGPA and CGPA, but completion of the courses is mandatory for the award of degree.

JBOS 10.02.2023 / V5
AV Mathematics-III for EC Engineering Semester 3
Course Code BMATEC301 CIE Marks 50
Teaching Hours/Week (L:T:P: S) 3:0:0:0 SEE Marks 50
Total Hours of Pedagogy 40 Total Marks 100
Credits 03 Exam Hours 03
Examination type (SEE) Theory
Course objectives:
● Learn to use the Fourier series to represent periodical physical phenomena in
engineering analysis and to enable the student to express non-periodic functions to
periodic functions using the Fourier series and Fourier transforms.
● Analyze signals in terms of Fourier transforms
● Develop the knowledge of solving differential equations and their applications in
Electronics & Communication engineering.
● To find the association between attributes and the correlation between two variables
Teaching-Learning Process
Pedagogy (General Instructions):
These are sample Strategies, teachers can use to accelerate the attainment of the various course
outcomes.
1. In addition to the traditional lecture method, different types of innovative teaching methods
may be adopted so that the delivered lessons shall develop students’ theoretical and applied
Mathematical skills.
2. State the need for Mathematics with Engineering Studies and Provide real-life examples.
3. Support and guide the students for self–study.
4. You will assign homework, grading assignments and quizzes, and documenting students'
progress.
5. Encourage the students to group learning to improve their creative and analytical skills.
6. Show short related video lectures in the following ways:
● As an introduction to new topics (pre-lecture activity).
● As a revision of topics (post-lecture activity).
● As additional examples (post-lecture activity).
● As an additional material of challenging topics (pre-and post-lecture activity).
● As a model solution of some exercises (post-lecture activity).

Module-1: Fourier series and practical harmonic analysis

Periodic functions, Dirichlet’s condition. Fourier series expansion of functions with period 2𝜋
and with arbitrary period: periodic rectangular wave, Half-wave rectifier, rectangular pulse,
Saw tooth wave. Half-range Fourier series. Triangle and half range expansions, Practical
harmonic analysis, variation of periodic current.(8 hours)
(RBT Levels: L1, L2 and L3)
Module-2: Infinite Fourier Transforms
Infinite Fourier transforms, Fourier cosine and sine transforms, Inverse Fourier transforms,
Inverse Fourier cosine and sine transforms, discrete Fourier transform (DFT), Fast Fourier
transform (FFT). (8 hours)
(RBT Levels: L1, L2 and L3)
Module-3: Z Transforms
Definition, Z-transforms of basic sequences and standard functions. Properties: Linearity,
scaling, first and second shifting, multiplication by n. Initial and final value theorem. Inverse
Z- transforms. Application to difference equations. (8 hours)
(RBT Levels: L1, L2 and L3)

@#12102023
Module-4: Ordinary Differential Equations of Higher Order
Higher-order linear ODEs with constant coefficients - Inverse differential operator,
problems.Linear differential equations with variable Coefficients-Cauchy’s and Legendre’s
differential equations–Problems. Application of linear differential equations to L-C circuit and
L-C-R circuit.(8 hours)
(RBT Levels: L1, L2 and L3)
Module-5: Curve fitting, Correlation, and Regressions
Principles of least squares, Curve fitting by the method of least squares in the form
𝑦 = 𝑎 + 𝑏𝑥 , 𝑦 = 𝑎 + 𝑏𝑥 + 𝑐𝑥 2 , and 𝑦 = 𝑎𝑥 𝑏 . Correlation, Coefficient of correlation, Lines
of regression, Angle between regression lines, standard error of estimate, rank correlation.
(RBT Levels: L1, L2 and L3)(8 hours)
Course outcome (Course Skill Set)
At the end of the course, the student will be able to:
1. Demonstrate the Fourier series to study the behavior of periodic functions and their
applications in system communications, digital signal processing, and field theory.
2. To use Fourier transforms to analyze problems involving continuous-time signals
3. To apply Z-Transform techniques to solve difference equations
4. Understand that physical systems can be described by differential equations and solve
such equations
5. Make use of correlation and regression analysis to fit a suitable mathematical model for
statistical data
Assessment Details (both CIE and SEE)
The weightage of Continuous Internal Evaluation (CIE) is 50% and for Semester End Exam
(SEE) is 50%. The minimum passing mark for the CIE is 40% of the maximum marks (20
marks out of 50) and for the SEE minimum passing mark is 35% of the maximum marks (18
out of 50 marks). The student is declared as a pass in the course if he/she secures a minimum of
40% (40 marks out of 100) in the sum total of the CIE (Continuous Internal Evaluation) and
SEE (Semester End Examination) taken together.
Continuous Internal Evaluation:
● There are 25 marks for the CIE's Assignment component and 25 for the Internal Assessment
Test component.
● Each test shall be conducted for 25 marks. The first test will be administered after 40-50%
of the coverage of the syllabus, and the second test will be administered after 85-90% of the
coverage of the syllabus. The average of the two tests shall be scaled down to 25 marks
● Any two assignment methods mentioned in the 22OB2.4, if an assignment is project-based
then only one assignment for the course shall be planned. The schedule for assignments
shall be planned properly by the course teacher. The teacher should not conduct two
assignments at the end of the semester if two assignments are planned. Each assignment
shall be conducted for 25 marks. (If two assignments are conducted then the sum of the two
assignments shall be scaled down to 25 marks)
● The final CIE marks of the course out of 50 will be the sum of the scale-down marks of
tests and assignment/s marks.

@#12102023
Internal Assessment Test question paper is designed to attain the different levels of
Bloom’s taxonomy as per the outcome defined for the course.
Semester-End Examination:
Theory SEE will be conducted by University as per the scheduled timetable, with common
question papers for the course (duration 03 hours).
1. The question paper will have ten questions. Each question is set for 20 marks.
2. There will be 2 questions from each module. Each of the two questions under a module
(with a maximum of 3 sub-questions), should have a mix of topics under that module.
3. The students have to answer 5 full questions, selecting one full question from each module.
4. Marks scored shall be proportionally reduced to 50 marks.
Suggested Learning Resources:
Books (Name of the author/Title of the Book/Name of the publisher/Edition and Year)
Text Books:
1. B. S. Grewal: “Higher Engineering Mathematics”, Khanna Publishers, 44thEd., 2021.
2. E. Kreyszig: “Advanced Engineering Mathematics”, John Wiley & Sons, 10thEd., 2018.

Reference Books:
1. V. Ramana: “Higher Engineering Mathematics” McGraw-Hill Education, 11thEd., 2017
2. Srimanta Pal & Subodh C.Bhunia: “Engineering Mathematics” Oxford University Press,
3rdEd., 2016.
3. N.P Bali and Manish Goyal: “A Textbook of Engineering Mathematics” Laxmi
Publications, 10thEd., 2022.
4. C. Ray Wylie, Louis C. Barrett: “Advanced Engineering Mathematics” McGraw–Hill
Book Co., New York, 6thEd., 2017.
5. Gupta C.B, Sing S.R and Mukesh Kumar: “Engineering Mathematic for Semester I and
II”, McGraw Hill Education(India) Pvt. Ltd 2015.
6. H.K. Dass and Er. Rajnish Verma: “Higher Engineering Mathematics” S.Chand
Publication, 3rdEd.,2014.
7. James Stewart: “Calculus” Cengage Publications, 7thEd., 2019.
Web links and Video Lectures (e-Resources):
• http://nptel.ac.in/courses.php?disciplineID=111
• http://www.class-central.com/subject/math(MOOCs)
• http://academicearth.org/
• VTU e-Shikshana Program
• VTU EDUSAT Program.

Activity-Based Learning (Suggested Activities in Class)/Practical-Based Learning

• Quizzes
• Assignments
• Seminar

@#12102023
Digital System Design using Verilog Semester 3
Course Code BEC302 CIE Marks 50
Teaching Hours/Week (L:T:P: S) 3:0:2 SEE Marks 50
Total Hours of Pedagogy 40 hours Theory + 8-10 Lab slots Total Marks 100
Credits 04 Exam Hours 03
Examination nature (SEE) Theory/Practical
Course objectives:
This course will enable students to:
 To impart the concepts of simplifying Boolean expression using K-map techniques and Quine-
McCluskey minimization techniques.
 To impart the concepts of designing and analyzing combinational logic circuits.
 To impart design methods and analysis of sequential logic circuits.
 To impart the concepts of Verilog HDL-data flow and behavioural models for the design of digital
systems.
Teaching-Learning Process (General Instructions)
These are sample Strategies, which teacher can use to accelerate the attainment of the various course
outcomes.
 Lecture method (L) does not mean only traditional lecture method, but different type of
teaching methods may be adopted to develop the outcomes.
 Show Video/animation films to explain the different concepts of Linear Algebra & Signal
Processing.
 Encourage collaborative (Group) Learning in the class.
 Ask at least three HOTS (Higher order Thinking)questions in the class, which promotes
critical thinking.
 Adopt Problem Based Learning (PBL), which fosters students’ Analytical skills, develop
thinking skills such as the ability to evaluate, generalize, and analyze information rather than
simply recall it.
 Topics will be introduced in a multiple representation.
 Show the different ways to solve the same problem and encourage the students to come up
with their own creative ways to solve them.
 Discuss how every concept can be applied to the real world-and when that's possible, it
helps improve the students' understanding.
 Adopt Flipped class technique by sharing the materials/Sample Videos prior to the class and
have discussions on the topic in the succeeding classes.
 Give Programming Assignments.
MODULE-1
Principles of Combinational Logic: Definition of combinational logic, Canonical forms,
Generation of switching equations from truth tables, Karnaugh maps-up to 4 variables, Quine-
McCluskey Minimization
Technique. Quine-McCluskey using Don’t CareTerms.(Section3.1to3.5ofText1).
MODULE-2
Logic Design with MSI Components and Programmable Logic Devices: Binary Adders and
Subtractors, Comparators, Decoders, Encoders, Multiplexers, Programmable Logic Devices(PLDs)
(Section5.1to5.7 ofText2)
MODULE-3

@#12102023
Flip-Flops and its Applications: The Master-Slave Flip-flops(Pulse-Triggered flip-flops):SR flip-
flops, JK flip flops, Characteristic equations, Registers, Binary Ripple Counters, Synchronous
Binary Counters, Counters based on Shift Registers, Design of Synchronous mod-n Counter using
clocked T, J K, D and SR flip-flops.(Section 6.4, 6.6 to 6.9 (Excluding 6.9.3)of Text2)
MODULE-4
Introduction to Verilog: Structure of Verilog module, Operators, Data Types, Styles of
Description. (Section1.1to1.6.2, 1.6.4 (only Verilog),2 of Text 3)
Verilog Data flow description: Highlights of Data flow description, Structure of Data flow
description.(Section2.1to2.2(only Verilog) of Text3)
MODULE-5
Verilog Behavioral description: Structure, Variable Assignment Statement, Sequential
Statements, Loop Statements, Verilog Behavioral Description of Multiplexers (2:1, 4:1, 8:1).
(Section 3.1 to 3.4 (onlyVerilog)of Text 3)
Verilog Structural description: Highlights of Structural description, Organization of structural
description, Structural description of ripple carry adder.(Section4.1 to 4.2 of Text 3)

PRACTICAL COMPONENT OF IPCC (Experiments can be conducted either using any circuit simulation
software or discrete components)

Sl.N Experiments
1 To simplify the given Boolean expressions and realize using Verilog program
2 To realize Adder/Subtractor(Full/half)circuits using Verilog data flow description.
3 To realize 4-bit ALU using Verilog program.
4 To realize the following Code converters using Verilog Behavioral description
a)Gray to binary and vice versa b)Binary to excess3 and vice versa
5 To realize using Verilog Behavioral description:8:1mux, 8:3encoder, Priority encoder
6 To realize using Verilog Behavioral description:1:8Demux, 3:8 decoder,2 –bit Comparator
7 To realize using Verilog Behavioral description:
Flip-flops: a)JK type b)SR type c)T type and d)D type
8 To realize Counters-up/down (BCD and binary)using Verilog Behavioral description.
Demonstration Experiments (For CIE only–not to be included for SEE)
Use FPGA/CPLD kits for down loading Verilog codes and check the output for interfacing
experiments.
9 Verilog Program to interface a Stepper motor to the FPGA/CPLD and rotate the motor
in the specified direction (by N steps).
10 Verilog programs to interface Switches and LEDs to the FPGA/CPLD and demonstrate
its working.
Course outcomes (Course Skill Set):
At the end of the course the student will be able to:
1. Simplify Boolean functions using K-map and Quine-McCluskey minimization technique.
2. Analyze and design for combinational logic circuits.
3. Analyze the concepts of Flip Flops(SR, D,T and JK) and to design the synchronous sequential
circuits using Flip Flops.
4. Model Combinational circuits (adders, subtractors, multiplexers) and sequential circuits using
Verilog descriptions.

@#12102023
Assessment Details (both CIE and SEE)
The weightage of Continuous Internal Evaluation (CIE) is 50% and for Semester End Exam (SEE) is
50%. The minimum passing mark for the CIE is 40% of the maximum marks (20 marks out of 50)
and for the SEE minimum passing mark is 35% of the maximum marks (18 out of 50 marks). The
student is declared as a pass in the course if he/she secures a minimum of 40% (40 marks out of 100)
in the sum total of the CIE (Continuous Internal Evaluation) and SEE (Semester End Examination)
taken together.
The IPCC means the practical portion integrated with the theory of the course. CIE marks for the
theory component are 25 marks and that for the practical component is 25 marks.
CIE for the theory component of the IPCC
 25 marks for the theory component are split into 15 marks for two Internal Assessment Tests
(Two Tests, each of 15 Marks with 01-hour duration, are to be conducted) and 10 marks for other
assessment methods mentioned in 22OB4.2. The first test at the end of 40-50% coverage of the
syllabus and the second test after covering 85-90% of the syllabus.
 Scaled-down marks of the sum of two tests and other assessment methods will be CIE marks for
the theory component of IPCC (that is for 25 marks).
 The student has to secure 40% of 25 marks to qualify in the CIE of the theory component of
IPCC.
CIE for the practical component of the IPCC
 15 marks for the conduction of the experiment and preparation of laboratory record, and 10
marks for the test to be conducted after the completion of all the laboratory sessions.
 On completion of every experiment/program in the laboratory, the students shall be evaluated
including viva-voce and marks shall be awarded on the same day.
 The CIE marks awarded in the case of the Practical component shall be based on the continuous
evaluation of the laboratory report. Each experiment report can be evaluated for 10 marks. Marks
of all experiments’ write-ups are added and scaled down to 15 marks.
 The laboratory test (duration 02/03 hours) after completion of all the experiments shall be
conducted for 50 marks and scaled down to 10 marks.
 Scaled-down marks of write-up evaluations and tests added will be CIE marks for the laboratory
component of IPCC for 25 marks.
 The student has to secure 40% of 25 marks to qualify in the CIE of the practical component of the
IPCC.

SEE for IPCC

Theory SEE will be conducted by University as per the scheduled timetable, with common question
papers for the course (duration 03 hours)
1. The question paper will have ten questions. Each question is set for 20 marks.
2. There will be 2 questions from each module. Each of the two questions under a module (with a
maximum of 3 sub-questions), should have a mix of topics under that module.
3. The students have to answer 5 full questions, selecting one full question from each module.
4. Marks scored by the student shall be proportionally scaled down to 50 Marks

The theory portion of the IPCC shall be for both CIE and SEE, whereas the practical portion
will have a CIE component only. Questions mentioned in the SEE paper may include questions
from the practical component.
 The minimum marks to be secured in CIE to appear for SEE shall be 10 (40% of maximum
marks-25) in the theory component and 10 (40% of maximum marks -25) in the practical
component. The laboratory component of the IPCC shall be for CIE only. However, in SEE,
the questions from the laboratory component shall be included. The maximum of 04/05 sub-
questions are to be set from the practical component of IPCC, the total marks of all questions

@#12102023
should not be more than 20 marks.
 SEE will be conducted for 100 marks and students shall secure 35% of the maximum marks to
qualify for the SEE. Marks secured will be scaled down to 50.
 The student is declared as a pass in the course if he/she secures a minimum of 40% (40 marks
out of 100) in the sum total of the CIE (Continuous Internal Evaluation) and SEE (Semester
End Examination) taken together.
Suggested Learning Resources:
Books
1. Digital Logic Applications and Design by John MYarbrough,Thomson Learning,2001.
2. Digital Principles and Design by Donald DGivone,McGrawHill, 2002.
3. HDL Programming VHDL and Verilog by Nazeih M Botros, 2009 reprint, Dream techpress.
ReferenceBooks:
1. Fundamentals of logic design, by Charles H Roth Jr., Cengage Learning
2. Logic Design, by Sudhakar Samuel, Pearson/Sanguine, 2007
3. Fundamentals of HDL,by Cyril PR, Pearson/Sanguine2010
Web links and Video Lectures (e-Resources):

Activity Based Learning (Suggested Activities in Class)/ Practical Based learning

Programming Assignments/Mini Projects can be given to improve programming skills.

@#12102023
TEMPLATE for IPCC (26.04.2022) Annexure-III

Electronic Principles and Circuits Semester 3

Course Code BEC303 CIE Marks 50
Teaching Hours/Week (L:T:P: S) 3:0:2 SEE Marks 50
Total Hours of Pedagogy 40 hours Theory + 8-10 Lab slots Total Marks 100
Credits 04 Exam Hours
Examination nature (SEE) Theory/Practical/Viva-Voce /Term-work/Others
Course objectives:
This course will enable students to
 Design and analyse the BJT circuits as an amplifier and voltage regulation.
 Design of MOSFET Amplifiers and analyse the basic amplifier configurations using small signal equivalent
circuit models
 Design of operational amplifiers circuits as Comparators, DAC and filters.
 Understand the concept of positive and negative feedback.
 Analyze Power amplifier circuits in different modes of operation.
 Construct Feedback and Oscillator circuits using FET.
 Understand the thyristor operation and the different types of thyristors.

Teaching-Learning Process (General Instructions)

MODULE-1
Transistor Biasing: Voltage Divider Bias, VDB Analysis, VDB Load line and Q point, Two supply Emitter Bias,
Other types of Bias.
BJT AC models: Base Biased Amplifier, Emitter Biased Amplifier, Small Signal Operation, AC Beta, AC Resistance
of the emitter diode, Two transistor models, Analyzing an amplifier, H parameters, Relations between R and H
parameters.
Voltage Amplifiers: Voltage gain, Loading effect of Input Impedance.
CC Amplifiers: CC Amplifier, Output Impedance.
[Text1]

MODULE-2
MOSFET
Biasing in MOS amplifier circuits: Fixing VGS, Fixing VG, Drain to Gate feedback resistor.
Small signal operation and modelling: The DC bias point, signal current in drain, voltage gain, small signal
equivalent circuit models, transconductance, The T equivalent circuit model.
MOSFET Amplifier configuration: Basic configurations, characterizing amplifiers, CS amplifier with and
without source resistance, The Common Gate Amplifier, Source follower.
[Text 2]

@#12102023 1
TEMPLATE for IPCC (26.04.2022) Annexure-III

MODULE-3

Linear Opamp Circuits: Summing Amplifier and D/A Converter, Nonlinear Op-amp Circuits: Comparator with
zero reference, Comparator with non-zero references. Comparator with Hysteresis.
Oscillator: Theory of Sinusoidal Oscillation, The Wein-Bridge Oscillator, RC Phase Shift Oscillator, The Colpitts
Oscillator, Hartley Oscillator, Crystal Oscillator.
The 555 timer: Monostable Operation, Astable Operation.
[Text1]
MODULE-4
Negative Feedback: Four Types of Negative Feedback, VCVS Voltage gain, Other VCVS Equations, ICVS
Amplifier, VCIS Amplifier, ICIS Amplifier (No Mathematical Derivation).
Active Filters: Ideal Responses, First Order Stages, VCVS Unity Gain Second Order Low pass Filters, VCVS Equal
Component Low Pass Filters, VCVS High Pass Filters, MFB Bandpass Filters, Bandstop Filters.
[Text1]

MODULE-5
Power Amplifiers: Amplifier terms, Two load lines, Class A Operation, Class B operation, Class B push pull
emitter follower, Class C Operation.
Thyristors: The four layer Diode, SCR, SCR Phase control, Bidirectional Thyristors, IGBTs, Other Thyristors.
[Text1]

@#12102023 2
TEMPLATE for IPCC (26.04.2022) Annexure-III

PRACTICAL COMPONENT OF IPCC (Experiments can be conducted either using any circuit simulation
software or discrete components)
Sl.NO Experiments
1 Design and Test
(i) Bridge Rectifier with Capacitor Input Filter
(ii) Zener voltage regulator

2 Design and Test

Biased Clippers – a)Positive, b) Negative , c) Positive-Negative
Positive and Negative Clampers with and without Reference.
3 Plot the transfer and drain characteristics of a JFET and calculate its drain resistance, mutual conductance
and amplification factor.

4 Plot the transfer and drain characteristics of n-channel MOSFET and calculate its parameters, namely;
drain resistance, mutual conductance and amplification factor.

5
Design and test Emitter Follower

6
Design and plot the frequency response of Common Source JFET/MOSFET amplifier

7
Test the Opamp Comparator with zero and non zero reference and obtain the Hysteresis curve.

8
Design and test Full wave Controlled rectifier using RC triggering circuit.

9 Design and test Precision Half wave and full wave rectifiers using Opamp

10 Design and test RC phase shift oscillator

Course outcomes (Course Skill Set):

At the end of the course, the student will be able to:
1. Understand the characteristics of BJTs and FETs for switching and amplifier circuits.
2. Design and analyze amplifiers and oscillators with different circuit configurations and biasing conditions.
3. Understand the feedback topologies and approximations in the design of amplifiers and oscillators.
4. Design of circuits using linear ICs for wide range applications such as ADC, DAC, filters and timers.
5. Understand the power electronic device components and its functions for basic power electronic circuits.
Assessment Details (both CIE and SEE)
The weightage of Continuous Internal Evaluation (CIE) is 50% and for Semester End Exam (SEE) is 50%. The
minimum passing mark for the CIE is 40% of the maximum marks (20 marks out of 50) and for the SEE minimum
passing mark is 35% of the maximum marks (18 out of 50 marks). The student is declared as a pass in the course if
he/she secures a minimum of 40% (40 marks out of 100) in the sum total of the CIE (Continuous Internal
Evaluation) and SEE (Semester End Examination) taken together.

The IPCC means the practical portion integrated with the theory of the course. CIE marks for the theory component
are 25 marks and that for the practical component is 25 marks.
CIE for the theory component of the IPCC
 25 marks for the theory component are split into 15 marks for two Internal Assessment Tests (Two Tests,
each of 15 Marks with 01-hour duration, are to be conducted) and 10 marks for other assessment methods
mentioned in 22OB4.2. The first test at the end of 40-50% coverage of the syllabus and the second test after
covering 85-90% of the syllabus.

@#12102023 3
TEMPLATE for IPCC (26.04.2022) Annexure-III

 Scaled-down marks of the sum of two tests and other assessment methods will be CIE marks for the theory
component of IPCC (that is for 25 marks).
 The student has to secure 40% of 25 marks to qualify in the CIE of the theory component of IPCC.
CIE for the practical component of the IPCC

 15 marks for the conduction of the experiment and preparation of laboratory record, and 10 marks for the
test to be conducted after the completion of all the laboratory sessions.
 On completion of every experiment/program in the laboratory, the students shall be evaluated including viva-
voce and marks shall be awarded on the same day.
 The CIE marks awarded in the case of the Practical component shall be based on the continuous evaluation of
the laboratory report. Each experiment report can be evaluated for 10 marks. Marks of all experiments’ write-
ups are added and scaled down to 15 marks.
 The laboratory test (duration 02/03 hours) after completion of all the experiments shall be conducted for 50
marks and scaled down to 10 marks.
 Scaled-down marks of write-up evaluations and tests added will be CIE marks for the laboratory component of
IPCC for 25 marks.
 The student has to secure 40% of 25 marks to qualify in the CIE of the practical component of the IPCC.
SEE for IPCC
Theory SEE will be conducted by University as per the scheduled timetable, with common question papers for the
course (duration 03 hours)
1. The question paper will have ten questions. Each question is set for 20 marks.
2. There will be 2 questions from each module. Each of the two questions under a module (with a maximum of 3
sub-questions), should have a mix of topics under that module.
3. The students have to answer 5 full questions, selecting one full question from each module.
4. Marks scored by the student shall be proportionally scaled down to 50 Marks
The theory portion of the IPCC shall be for both CIE and SEE, whereas the practical portion will have a CIE
component only. Questions mentioned in the SEE paper may include questions from the practical
component.
 The minimum marks to be secured in CIE to appear for SEE shall be 10 (40% of maximum marks-25) in the
theory component and 10 (40% of maximum marks -25) in the practical component. The laboratory
component of the IPCC shall be for CIE only. However, in SEE, the questions from the laboratory
component shall be included. The maximum of 04/05 sub-questions are to be set from the practical
component of IPCC, the total marks of all questions should not be more than 20 marks.
 SEE will be conducted for 100 marks and students shall secure 35% of the maximum marks to qualify for
the SEE. Marks secured will be scaled down to 50.

@#12102023 4
TEMPLATE for IPCC (26.04.2022) Annexure-III

Suggested Learning Resources:

Books
1. Albert Malvino, David J Bates, Electronic Principles, 7 th Edition, Mc Graw Hill Education, 2017, ISBN:978-0-
07-063424-4.
2. Microelectronic Circuits, Theory and Applications, Adel S Sedra, Kenneth C Smith, 6thEdition, Oxford,
2015.ISBN:978-0-19-808913-1

Web links and Video Lectures (e-Resources):

1. Integrated Electronics: Analog and Digital Circuits and Systems, Jacob Millman, Christos C. Halkias,
McGraw-Hill, 2015.
2. Electronic Devices and Circuit, Boylestad & Nashelsky, Eleventh Edition, Pearson, January 2015.

Activity Based Learning (Suggested Activities in Class)/ Practical Based learning

@#12102023 5
Network Analysis Semester 3
Course Code BEC304 CIE Marks 50
Teaching Hours/Week (L:T:P: S) 3:0:0 SEE Marks 50
Total Hours of Pedagogy 40 Total Marks 100
Credits 03 Exam Hours 3
Examination type (SEE) Theory
Course objectives:
1. Apply mesh and nodal techniques to solve an electrical network.
2. Solve different problems related to Electrical circuits using Network Theorems and Two
port network.
3. Familiarize with the use of Laplace transforms to solve network problems.
4. Study two port network parameters and their applications.
5. Study of RLC Series and parallel tuned circuit.

Teaching-Learning Process (General Instructions)

These are sample Strategies, which teachers can use to accelerate the attainment of the various
course outcomes.
These are sample Strategies, which teacher can use to accelerate the attainment of the various
course outcomes.
 Lecture method (L) does not mean only traditional lecture method, but different type of
teaching methods may be adopted to develop the outcomes.
 Encourage collaborative (Group)Learning in the class.
 Ask at least three HOTS(Higher order Thinking)questions in the class, which
promotes critical thinking.
 Adopt Problem Based Learning (PBL), which fosters students’ Analytical skills, develop
thinking skills such as the ability to evaluate, generalize, and analyze information rather
than simply recall it.
 Topics will be introduced in a multiple representation.
 Show the different ways to solve the same problem and encourage the students to
come up with their own creative ways to solve them.
 Discuss how every concept can be applied to the real world-and when that's possible,
it helps improve the students' understanding.
 Adopt Flipped class technique by sharing the materials/Sample Videos prior to the class
and have discussions on the topic in the succeeding classes.

Module-1
Basic Concepts: Practical sources, Source transformations, Network reduction using Star -
Delta transformation, Loop and node analysis with linearly dependent and independent
sources for DC and AC networks.
Module-2
Network Theorems: Superposition, Millman's theorems, Thevenin's and Norton's
theorems, Maximum Power transfer theorem.
Module-3
Transient behavior and initial conditions: Behavior of circuit elements under switching
condition and their Representation, evaluation of initial and final conditions in RL, RC and

@#12102023
RLC circuits for AC and DC excitations.

Module-4
Laplace Transformation &Applications: Solution of networks, step, ramp and impulse
responses, waveform Synthesis.
Module-5
Two port network parameters: Definition of Z,Y, h and Transmission parameters, modelling
with these parameters, relationship between parameters sets.
Resonance:
Series Resonance: Variation of Current and Voltage with Frequency,
SelectivityandBandwidth,Q-Factor,CircuitMagnificationFactor,Selectivity with Variable
Capacitance, Selectivity with Variable Inductance.
Parallel Resonance: Selectivity and Bandwidth, Maximum Impedance Conditions with C,
Land f Variable, current in Anti-Resonant Circuit, The General Case-Resistance Present in
both Branches.

Course outcome (Course Skill Set)

At the end of the course, the student will be able to :

1. Determine currents and voltages using source transformation/ source shifting/ mesh/
nodal analysis and reduce given network using star- delta transformation.
2. Solve problems by applying Network Theorems and electrical laws to reduce circuit
complexities and to arrive at feasible solutions.
3. Analyse the circuit parameters during switching transients and apply Laplace transform to
solve the given network
4. Evaluate the frequency response for resonant circuits and the network parameters for two
port networks

@#12102023
Assessment Details (both CIE and SEE)
The weightage of Continuous Internal Evaluation (CIE) is 50% and for Semester End Exam
(SEE) is 50%. The minimum passing mark for the CIE is 40% of the maximum marks (20 marks
out of 50) and for the SEE minimum passing mark is 35% of the maximum marks (18 out of 50
marks). The student is declared as a pass in the course if he/she secures a minimum of 40% (40
marks out of 100) in the sum total of the CIE (Continuous Internal Evaluation) and SEE
(Semester End Examination) taken together.
Continuous Internal Evaluation:
 There are 25 marks for the CIE's Assignment component and 25 for the Internal Assessment
Test component.
 Each test shall be conducted for 25 marks. The first test will be administered after 40-50% of
the coverage of the syllabus, and the second test will be administered after 85-90% of the
coverage of the syllabus. The average of the two tests shall be scaled down to 25 marks
 Any two assignment methods mentioned in the 22OB2.4, if an assignment is project-based
then only one assignment for the course shall be planned. The schedule for assignments shall
be planned properly by the course teacher. The teacher should not conduct two assignments at
the end of the semester if two assignments are planned. Each assignment shall be conducted
for 25 marks. (If two assignments are conducted then the sum of the two assignments shall be
scaled down to 25 marks)
 The final CIE marks of the course out of 50 will be the sum of the scale-down marks of tests
and assignment/s marks.
Internal Assessment Test question paper is designed to attain the different levels of Bloom’s
taxonomy as per the outcome defined for the course.

Semester-End Examination:
Theory SEE will be conducted by University as per the scheduled timetable, with common
question papers for the course (duration 03 hours).
1. The question paper will have ten questions. Each question is set for 20 marks.
2. There will be 2 questions from each module. Each of the two questions under a module (with
a maximum of 3 sub-questions), should have a mix of topics under that module.
3. The students have to answer 5 full questions, selecting one full question from each module.
Suggested Learning Resources:
Books
1. M.E.Van Valkenburg (2000), Network Analysis, Prentice Hall of India, 3rdedition, 2000,
ISBN:9780136110958.
2. Roy Choudhury-Networks and Systems, 2nd edition, New Age International Publications,
2006, ISBN: 9788122427677
ReferenceBooks:
3. Hayt, Kemmerly and Durbin-Engineering Circuit Analysis, TMH7th Edition, 2010.
4. J.David Irwin/ R.Mark Nelms- Basic Engineering Circuit Analysis
JohnWiley,8thed,2006.
5. Charles K Alexander and Mathew NO Sadiku-Fundamentals of Electric Circuits, Tata
McGraw-Hill,3rc1 Ed,2009.

@#12102023
Web links and Video Lectures (e-Resources):
 .

Activity Based Learning (Suggested Activities in Class)/ Practical Based learning



@#12102023
Template for Practical Course and if AEC is a practical Course Annexure-V

Analog and Digital Systems Design Laboratory Semester 3

Course Code BECL305 CIE Marks 50
Teaching Hours/Week (L:T:P: S) 0:0:2 SEE Marks 50
Credits 01 Exam Hours 100
Examination type (SEE) Theory/Practical/Viva-Voce /Term-work/Others
Course objectives:
This laboratory course enables students to
 Understand the electronic circuit schematic and its working
 Realize and test amplifier and oscillator circuits for the given specifications
 Realize the opamp circuits for the applications such as DAC, implement mathematical functions and precision
rectifiers.
 Study the static characteristics of SCR and test the RC triggering circuit.
 Design and test the combinational and sequential logic circuits for their functionalities.
 Use the suitable ICs based on the specifications and functions.
Sl.NO Experiments (All the experiments has to be conducted using discrete components)
1 Design and set up the BJT common emitter voltage amplifier with and without feedback and determine the
gain- bandwidth product, input and output impedances.
2
Design and set-up BJT/FET i) Colpitts Oscillator, ii) Crystal Oscillator

3
Design and set up the circuits using opamp: i) Adder, ii) Integrator, iii) Differentiator and iv) Comparator

4 Design 4-bit R – 2R Op-Amp Digital to Analog Converter (i) for a 4-bit binary input using toggle switches
(ii) by generating digital inputs using mod-16
5 Design and implement (a) Half Adder & Full Adder using basic gates and NAND gates, (b) Half subtractor &
Full subtractor using NAND gates, (c) 4-variable function using IC74151(8:1MUX).
6 Realize (i) Binary to Gray code conversion & vice-versa (IC74139), (ii) BCD to Excess-3 code conversion
and vice versa
7 a) Realize using NAND Gates: i) Master-Slave JK Flip-Flop, ii) D Flip-Flop and iii) T Flip-Flop b) Realize the
shift registers using IC7474/7495: (i) SISO (ii) SIPO (iii) PISO (iv) PIPO (v) Ring counter and (vi) Johnson
counter.
8 Realize a) Design Mod – N Synchronous Up Counter & Down Counter using 7476 JK Flip-flop b) Mod-N
Counter using IC7490 / 7476 c) Synchronous counter using IC74192
Demonstration Experiments ( For CIE )
9 Design and Test the second order Active Filters and plot the frequency response,
i) Low pass and Highpass Filter
ii) Bandpass and Bandstop Filter

10 Design and test the following using 555 timer

i) Monostable Multivibraator
ii) Astable Multivibrator
11 Design and Test a Regulated Power supply

12 Design and test an audio amplifier by connecting a microphone input and observe the output using a loud
speaker.

@#12102023
Template for Practical Course and if AEC is a practical Course Annexure-V

Course outcomes (Course Skill Set):

At the end of the course the student will be able to:
1. Design and analyze the BJT/FET amplifier and oscillator circuits.
2. Design and test Opamp circuits to realize the mathematical computations, DAC and precision rectifiers.
3. Design and test the combinational logic circuits for the given specifications.
4. Test the sequential logic circuits for the given functionality.
5. Demonstrate the basic circuit experiments using 555 timer.
Assessment Details (both CIE and SEE)
The weightage of Continuous Internal Evaluation (CIE) is 50% and for Semester End Exam (SEE) is 50%. The
minimum passing mark for the CIE is 40% of the maximum marks (20 marks out of 50) and for the SEE minimum
passing mark is 35% of the maximum marks (18 out of 50 marks). A student shall be deemed to have satisfied the
academic requirements and earned the credits allotted to each subject/ course if the student secures a minimum of
40% (40 marks out of 100) in the sum total of the CIE (Continuous Internal Evaluation) and SEE (Semester End
Examination) taken together.

Continuous Internal Evaluation (CIE):

CIE marks for the practical course are 50 Marks.
The split-up of CIE marks for record/ journal and test are in the ratio 60:40.
 Each experiment is to be evaluated for conduction with an observation sheet and record write-up. Rubrics for
the evaluation of the journal/write-up for hardware/software experiments are designed by the faculty who is
handling the laboratory session and are made known to students at the beginning of the practical session.
 Record should contain all the specified experiments in the syllabus and each experiment write-up will be
evaluated for 10 marks.
 Total marks scored by the students are scaled down to 30 marks (60% of maximum marks).
 Weightage to be given for neatness and submission of record/write-up on time.
 Department shall conduct a test of 100 marks after the completion of all the experiments listed in the
syllabus.
 In a test, test write-up, conduction of experiment, acceptable result, and procedural knowledge will carry a
weightage of 60% and the rest 40% for viva-voce.
 The suitable rubrics can be designed to evaluate each student’s performance and learning ability.
 The marks scored shall be scaled down to 20 marks (40% of the maximum marks).
The Sum of scaled-down marks scored in the report write-up/journal and marks of a test is the total CIE marks
scored by the student.
Semester End Evaluation (SEE):
 SEE marks for the practical course are 50 Marks.
 SEE shall be conducted jointly by the two examiners of the same institute, examiners are appointed
by the Head of the Institute.
 The examination schedule and names of examiners are informed to the university before the conduction of
the examination. These practical examinations are to be conducted between the schedule mentioned in the
academic calendar of the University.
 All laboratory experiments are to be included for practical examination.
 (Rubrics) Breakup of marks and the instructions printed on the cover page of the answer script to be
strictly adhered to by the examiners. OR based on the course requirement evaluation rubrics shall be
decided jointly by examiners.
 Students can pick one question (experiment) from the questions lot prepared by the examiners jointly.
 Evaluation of test write-up/ conduction procedure and result/viva will be conducted jointly by examiners.
 General rubrics suggested for SEE are mentioned here, writeup-20%, Conduction procedure and result in -60%,
Viva-voce 20% of maximum marks. SEE for practical shall be evaluated for 100 marks and scored marks shall

@#12102023
Template for Practical Course and if AEC is a practical Course Annexure-V

be scaled down to 50 marks (however, based on course type, rubrics shall be decided by the examiners)
 Change of experiment is allowed only once and 15% of Marks allotted to the procedure part are to be made
zero.
The minimum duration of SEE is 02 hours

Suggested Learning Resources:

1. David A Bell, “Fundamentals of Electronic Devices and Circuits Lab Manual”, 5th Edition, 2009, Oxford
University Press.
2. Albert Malvino, David J Bates, Electronic Principles, 7 th Edition, Mc Graw Hill Education, 2017.
3. Fundamentals of Logic Design, Charles H Roth Jr., Larry L Kinney, Cengage Learning, 7th Edition.

@#12102023
Electronic Devices Semester 3
Course Code BEC306A CIE Marks 50
Teaching Hours/Week (L:T:P: S) 3:0:0 SEE Marks 50
Total Hours of Pedagogy 40 Total Marks 100
Credits 03 Exam Hours 3
Examination type (SEE) Theory

Course objectives: This course will enable students to:

• Understand the basics of semiconductor physics and electronic devices.
• Describe the mathematical models BJTs and FETs along with the constructional details.
• Understand the construction and working principles of optoelectronic devices
• Understand the fabrication process of semiconductor devices and CMOS process integration.

Teaching-Learning Process (General Instructions)

These are sample Strategies, which teachers can use to accelerate the attainment of the various course
outcomes.
These are sample Strategies, which teacher can use to accelerate the attainment of the various course
outcomes.
 Lecture method(L) does not mean only traditional lecture method, but different type of teaching
methods may be adopted to develop the outcomes.
 Encourage collaborative(Group)Learning in the class.
 Ask at least three HOTS(Higher order Thinking)questions in the class, which promotes critical
thinking.
 Adopt Problem Based Learning (PBL), which fosters students’ Analytical skills, develop thinking skills
such as the ability to evaluate, generalize, and analyze information rather than simply recall it.
 Topics will be introduced in a multiple representation.
 Show the different ways to solve the same problem and encourage the students to come up with
their own creative ways to solve them.
 Discuss how every concept can be applied to the realworld-and when that's possible, it helps
improve the students' understanding.
 Adopt Flipped class technique by sharing the materials/Sample Videos prior to the class and have
discussions on the topic in the succeeding classes.

Module-1
Semiconductors
Bonding forces in solids, Energy bands, Metals, Semiconductors and Insulators, Direct and Indirect
semiconductors, Electrons and Holes, Intrinsic and Extrinsic materials, Conductivity and Mobility, Drift and
Resistance, Effects of temperature and doping on mobility, Hall Effect.
(Text1:3.1.1,3.1.2,3.1.3,3.1.4,3.2.1,3.2.3,3.2.4,3.4.1,3.4.2,3.4.3,3.4.5).

Module-2
PN Junctions
Forward and Reverse biased junctions-Qualitative description of Current flow at a junction, reverse bias, Reverse
bias breakdown- Zener breakdown, avalanche breakdown, Rectifiers.(Text1:5.3.1,5.3.3,5.4,5.4.1,5.4.2,5.4.3)
Optoelectronic Devices Photodiodes: Current and Voltage in an Illuminated Junction, Solar Cells,
Photodetectors. Light Emitting Diode: Light Emitting materials.
(Text1:8.1.1,8.1.2,8.1.3,8.2,8.2.1),
Module-3

@#12102023
Bipolar Junction Transistor
Fundamentals of BJT operation, Amplification with BJTS,BJT Fabrication, The coupled Diode model(Ebers-Moll
Model),Switching operation of a transistor, Cutoff, saturation, switching cycle, specifications, Drift in the base
region, Base narrowing, Avalanche breakdown.
(Text1:7.1,7.2,7.3,7.5.1,7.6,7.7.1,7.7.2, 7.7.3)

Module-4
Field Effect Transistors
Basic pn JFET Operation, Equivalent Circuit and Frequency Limitations, MOSFET-Two terminal MO Sstructure-
Energy band diagram, Ideal Capacitance
-Voltage Characteristics and Frequency Effects, Basic MOSFET Operation- MOSFET structure, Current-Voltage
Characteristics.
(Text2:9.1.1,9.4,9.6.1,9.6.2,9.7.1,9.7.2,9.8.1,9.8.2).
Module-5
Fabrication of p-n junctions
Thermal Oxidation, Diffusion, Rapid Thermal Processing, Ion implantation, chemical vapour deposition,
photolithography, Etching, metallization. (Text 1: 5.1)
Integrated Circuits
Background, Evolution of ICs, CMOS Process Integration, Integration of Other Circuit Elements.(Text
1:9.1,9.2,9.3.1,9.3.3).
Course outcome (Course Skill Set)
At the end of the course, the student will be able to :

1. Understand the principles of semiconductor Physics

2. Understand the principles and characteristics of different types of semiconductor devices
3. Understand the fabrication process of semiconductor devices
4. Utilize the mathematical models of semiconductor junctions for circuits and systems.
5. Identify the mathematical models of MOS transistors for circuits and systems.

Continuous Internal Evaluation:

 There are 25 marks for the CIE's Assignment component and 25 for the Internal Assessment
Test component.
 Each test shall be conducted for 25 marks. The first test will be administered after 40-50% of
the coverage of the syllabus, and the second test will be administered after 85-90% of the
coverage of the syllabus. The average of the two tests shall be scaled down to 25 marks
 Any two assignment methods mentioned in the 22OB2.4, if an assignment is project-based then
only one assignment for the course shall be planned. The schedule for assignments shall be
planned properly by the course teacher. The teacher should not conduct two assignments at the
end of the semester if two assignments are planned. Each assignment shall be conducted for 25
marks. (If two assignments are conducted then the sum of the two assignments shall be scaled
down to 25 marks)
 The final CIE marks of the course out of 50 will be the sum of the scale-down marks of tests and
assignment/s marks.
Internal Assessment Test question paper is designed to attain the different levels of Bloom’s taxonomy
as per the outcome defined for the course.

Suggested Learning Resources:

Books
1. Ben. G. Streetman, Sanjay Kumar Banerjee, "Solid State Electronic Devices",7thEdition,Pearson
Education,2016,ISBN978-93-325-5508-2.
2. Donald A Neamen, Dhrubes Biswas, "Semiconductor Physics and Devices", 4thEdition,McGraw Hill
Education, 2012,ISBN 978-0-07- 107010-2.
ReferenceBooks:
3. S.M.Sze,KwokK.Ng,"PhysicsofSemiconductorDevices",3rdEdition, Wiley,2018.
4. AdirBar-Lev,"SemiconductorandElectronicDevices",3rdEdition,PHI, 1993

Web links and Video Lectures (e-Resources):

@#12102023
 .

Activity Based Learning (Suggested Activities in Class)/ Practical Based learning



@#12102023
Sensors and Instrumentation Semester 3
Course Code BEC306B CIE Marks 50
Teaching Hours/Week (L:T:P: S) 3:0:0 SEE Marks 50
Total Hours of Pedagogy 40 Total Marks 100
Credits 03 Exam Hours 3
Examination type (SEE) Theory
Course objectives:
• Understand various technologies associated in manufacturing of sensors
• Acquire knowledge about types of sensors used in modern digital systems
• Get acquainted about material properties required to make sensors
• Understand types of instrument errors and circuits for multirange Ammeters and Voltmeters.
• Describe principle of operation of digital measuring instruments and Bridges.
• Understand the operations of transducers and instrumentation amplifiers.
Teaching-Learning Process (General Instructions)
These are sample Strategies, which teacher can use to accelerate the attainment of the various course
outcomes.
 Lecture method(L) does not mean only traditional lecture method, but different type of
teaching methods may be adopted to develop the outcomes.
 Encourage collaborative(Group)Learning in the class.
 Ask at least three HOTS(Higher order Thinking)questions in the class, which promotes
critical thinking.
 Adopt Problem Based Learning (PBL), which fosters students’ Analytical skills, develop thinking
skills such as the ability to evaluate, generalize, and analyze information rather than simply recall
it.
 Topics will be introduced in a multiple representation.
 Show the different ways to solve the same problem and encourage the students to come up
with their own creative ways to solve them.
 Discuss how every concept can be applied to the realworld-and when that's possible, it helps
improve the students' understanding.
 Adopt Flipped class technique by sharing the materials/Sample Videos prior to the class and
have discussions on the topic in the succeeding classes.
Module-1
Introduction to sensor based measurement systems:
General concepts and terminology, sensor classification, Primary Sensors, material for sensors,
microsensor technology. (Text 1)
Module-2
Self-generating Sensors-Thermoelectric sensors, piezoelectric sensors, pyroelectric sensors,
photovoltaic sensors, electrochemical sensors. (Text 1)
Module-3
Principles of Measurement: Static Characteristics, Error in Measurement, Types of Static Error.(Text
2: 1.2-1.6)
Multirange Ammeters, Multirange voltmeter.(Text2:3.2,4.4)
Digital Voltmeter: Ramp Technique, Dual slope integrating Type DVM, Direct Compensation type
and Successive Approximations type DVM (Text 2: 5.1-5.3, 5.5,5.6)
Module-4
Digital Multimeter: Digital Frequency Meter and Digital Measurement of Time, Function Generator.
Bridges: Measurement of resistance: Wheatstone's Bridge, AC Bridges - Capacitance and
Inductance Comparison bridge, Wien's bridge.

@#12102023
(Text2:refer 6.2,6.3 up to 6.3.2, 6.4 up to 6.4.2, 8.8, 11.2, 11.8 -11.10, 11.14).

Module-5
Transducers:Introduction,ElectricalTransducer,ResistiveTransducer,Resistive position Transducer,
Resistance Wire Strain Gauges, Resistance Thermometer, Thermistor, LVDT.
(Text2:13.1-13.3,13.5, 13.6 up to 13.6.1,13.7,13.8,13.11).
Instrumentation Amplifier using Transducer Bridge, Temperature indicators using Thermometer,
Analog Weight Scale(Text2:14.3.3, 14.4.1, 14.4.3).
Course outcome (Course Skill Set)

At the end of the course, the student will be able to :

1. Understand the material properties required to make sensors
2. Understand the principle of transducers for measuring physical parameters.
3. Describe the manufacturing process of sensors
4. Analyze the instrument characteristics and errors.
5. Describe the principle of operation and develop circuits for multirange Ammeters,
Voltmeters and Bridges to measure passive component values and frequency.

Continuous Internal Evaluation:

 There are 25 marks for the CIE's Assignment component and 25 for the Internal Assessment Test
component.
 Each test shall be conducted for 25 marks. The first test will be administered after 40-50% of the
coverage of the syllabus, and the second test will be administered after 85-90% of the coverage of the
syllabus. The average of the two tests shall be scaled down to 25 marks
 Any two assignment methods mentioned in the 22OB2.4, if an assignment is project-based then only
one assignment for the course shall be planned. The schedule for assignments shall be planned
properly by the course teacher. The teacher should not conduct two assignments at the end of the
semester if two assignments are planned. Each assignment shall be conducted for 25 marks. (If two
assignments are conducted then the sum of the two assignments shall be scaled down to 25 marks)
 The final CIE marks of the course out of 50 will be the sum of the scale-down marks of tests and
assignment/s marks.
Internal Assessment Test question paper is designed to attain the different levels of Bloom’s
taxonomy as per the outcome defined for the course.

Suggested Learning Resources:

Books
1. "Sensors and Signal Conditioning", Ramon Pallas Areny, JohnG. Webster,2nd edition, John Wiley
and Sons,2000
rd
2. H.S.Kalsi, "Electronic Instrumentation", Mc Graw Hill,3 Edition,2012,ISBN:9780070702066.

Reference Books
1. DavidA. Bell,"Electronic Instrumentation & Measurements", Oxford University Press PHI
2ndEdition, 2006,ISBN 81-203-2360-2.
2. D. HelfrickandW.D. Cooper, "Modern Electronic Instrumentation and Measuring
Techniques", Pearson, 1stEdition, 2015, ISBN: 9789332556065.

Web links and Video Lectures (e-Resources):

@#12102023
 .

Activity Based Learning (Suggested Activities in Class)/ Practical Based learning



@#12102023
Computer Organization and Architecture Semester 3
Course Code BEC306C CIE Marks 50
Teaching Hours/Week (L:T:P: S) 3:0:0 SEE Marks 50
Total Hours of Pedagogy 40 Total Marks 100
Credits 03 Exam Hours 3
Examination type (SEE) Theory
Course objectives: This course will enable students to:
• Explain the basic sub systems of a computer, their organization, structure and
operation.
• Illustrate the concept of programs as sequences of machine instructions.
• Demonstrate different ways of communicating with I/O devices
• Describe memory hierarchy and concept of virtual memory.
• Illustrate organization of simple pipelined processor and other computing systems.
Teaching-Learning Process (General Instructions)
These are sample Strategies, which teachers can use to accelerate the attainment of the various
course outcomes.
These are sample Strategies, which teacher can use to accelerate the attainment of the various
course outcomes.
 Lecture method (L) does not mean only traditional lecture method, but different type of
teaching methods may be adopted to develop the outcomes.
 Encourage collaborative (Group) Learning in the class.
 Ask at least three HOTS(Higher order Thinking)questions in the class, which
promotes critical thinking.
 Adopt Problem Based Learning (PBL), which fosters students’ Analytical skills, develop
thinking skills such as the ability to evaluate, generalize, and analyze information rather
than simply recall it.
 Topics will be introduced in a multiple representation.
 Show the different ways to solve the same problem and encourage the students to
come up with their own creative ways to solve them.
 Discuss how every concept can be applied to the real world-and when that's possible,
it helps improve the students' understanding.
 Adopt Flipped class technique by sharing the materials/Sample Videos prior to the class
and have discussions on the topic in the succeeding classes.

Module-1
Basic Structure of Computers: Computer Types, Functional Units, Basic Operational
Concepts, Bus Structures, Software, Performance -Processor Clock, Basic Performance
Equation(upto1.6.2ofChap1ofText).
Machine Instructions and Programs: Numbers, Arithmetic Operations and Characters, IEEE
standard for Floating point Numbers, Memory Location and Addresses, Memory Operations,
Instructions and Instruction Sequencing (up to 2.4.6 of Chap 2 and 6.7.1 of Chap 6 of Text).
Module-2

@#12102023
Addressing Modes, Assembly Language, Basic Input and Output Operations, Stacks and
Queues, Subroutines, Additional Instructions (from2.4.7ofChap2, except 2.9.3, 2.11 & 2.12 of
Text).
Module-3
Input/ Output Organization: Accessing I/O Devices, Interrupts -Interrupt Hardware, Enabling
and Disabling Interrupts, Handling Multiple Devices,
Controlling Device Requests, Direct Memory Access
(upto4.2.4and4.4except4.4.1ofChap4ofText).

Module-4
Memory System: Basic Concepts, Semiconductor RAM Memories-Internal organization of
memory chips, Static memories, Asynchronous DRAMS, Read Only Memories, Cash
Memories, Virtual Memories, Secondary Storage- Magnetic Hard Disks
(5.1,5.2,5.2.1,5.2.2,5.2.3,5.3,5.5(except 5.5.1 to 5.5.4), 5.7 (except5.7.1), 5.9, 5.9.1 of Chap 5
of Text).
Module-5
Basic Processing Unit: Some Fundamental Concepts, Execution of a Complete Instruction,
Multiple Bus Organization, Hardwired Control, Microprogrammed Control (up to 7.5 except
7.5.1 to7.5.6 of Chap 7 of Text).

Course outcome (Course Skill Set)

At the end of the course, the student will be able to :

1. Explain the basic organization of a computer system.
2. Describe the addressing modes, instruction formats and program control statement.
3. Explain different ways of accessing an input/ output device including interrupts.
4. Illustrate the organization of different types of semiconductor and other secondary
storage memories.
5. Illustrate simple processor organization based on hard wired control and micro-
programmed control.

Continuous Internal Evaluation:

 There are 25 marks for the CIE's Assignment component and 25 for the Internal Assessment
Test component.
 Each test shall be conducted for 25 marks. The first test will be administered after 40-50% of
the coverage of the syllabus, and the second test will be administered after 85-90% of the
coverage of the syllabus. The average of the two tests shall be scaled down to 25 marks
 Any two assignment methods mentioned in the 22OB2.4, if an assignment is project-based
then only one assignment for the course shall be planned. The schedule for assignments shall
be planned properly by the course teacher. The teacher should not conduct two assignments at
the end of the semester if two assignments are planned. Each assignment shall be conducted
for 25 marks. (If two assignments are conducted then the sum of the two assignments shall be
scaled down to 25 marks)
 The final CIE marks of the course out of 50 will be the sum of the scale-down marks of tests
and assignment/s marks.
Internal Assessment Test question paper is designed to attain the different levels of Bloom’s
taxonomy as per the outcome defined for the course.

ReferenceBooks:
2. David A. Patterson, John L. Hennessy: Computer Organization and Design-The Hardware/
Software InterfaceARM Edition, 4th Edition, Elsevier,2009.
3. William Stallings: Computer Organization &Architecture,7th Edition, PHI, 2006.
4. Vincent P. Heuring & Harry F. Jordan: Computer Systems Design and Architecture, 2nd
Edition, Pearson Education, 2004.

@#12102023
Web links and Video Lectures (e-Resources):
 .

Activity Based Learning (Suggested Activities in Class)/ Practical Based learning



@#12102023
Applied Numerical Methods for EC Engineers Semester 3
Course Code BEC306D CIE Marks 50
Teaching Hours/Week (L:T:P: S) 3:0:0:0 SEE Marks 50
Total Hours of Pedagogy 40 Total Marks 100
Credits 03 Exam Hours 03
Examination type (SEE) Theory
Course objectives:
● To provide the knowledge and importance of error analysis in engineering problems
● To represent and solve an application problem using a system of linear equations
● Analyzeregression data to choose the most appropriate model for a situation.
● Familiarize with the ways of solving complicated mathematical problems numerically
● Prepare to solve mathematical models represented by initial or boundary value problems
Teaching-Learning Process
Pedagogy (General Instructions):
These are sample Strategies, teachers can use to accelerate the attainment of the various course
outcomes.
1. In addition to the traditional lecture method, different innovative teaching methods may be
adopted so that the delivered lessons shall develop students’ theoretical and applied
Mathematical skills.
2. State the need for Mathematics with Engineering Studies and Provide real-life examples.
3. Support and guide the students for self–study.
4. You will assign homework, grading assignments and quizzes, and documenting students'
progress.
5. Encourage the students to group learning to improve their creative and analytical skills.
6. Show short related video lectures in the following ways:
● As an introduction to new topics (pre-lecture activity).
● As a revision of topics (post-lecture activity).
● As additional examples (post-lecture activity).
● As an additional material of challenging topics (pre-and post-lecture activity).
● As a model solution of some exercises (post-lecture activity).

Module-1: Errors in computations and Root of the equations

Approximations and Round Off -Errors in computation: Error definitions, Round-Offerrors,
Truncation errors and the Taylor series-The Taylor series, Error Propagation, Total numerical
error,Absolute,Relative and percentage errors,Blunders, Formulation errors and data
uncertainty. Roots of equations: Simple fixed point iteration methods. Secant Method, Muller’s
method, and Graeffe’s Roots Squaring Method. Aitkin’s Method. (8 hours)
(RBT Levels: L1, L2 and L3)
Module-2: Solution of System of Linear Equations
Rank of the matrix, Echelon form, Linearly dependent and independent equations, Solutions
for linear equations, Partition method, Croute's Triangularisation method. Relaxation method.
Solution of non-linear simultaneous equations by Newton-Raphson method. Eigen Values and
properties, Eigen Vectors, Bounds on Eigen Values, Jacobi’s method, Given’s method for
symmetric matrices. (8 hours)
(RBT Levels: L1, L2 L3)

@#12102023
Module-3: Curve Fitting
Least-Squares Regression: Linear Regressions, Polynomial regressions, Multiple Linear
regressions, General Linear Least squares, Nonlinear Regressions, QR Factorization. Curve
Fitting with Sinusoidal Functions
Introduction to Splines,Linear Splines, Quadratic Splines, Cubic Splines. Bilinear
Interpolation. (8 hours)
(RBT Levels: L1, L2 L3)
Module-4: Numerical integration, Difference equations and Boundary Value Problems
Romberg’s method, Euler-Maclaurin formula, Gaussian integration for n = 2 and n=3.
Numerical double integration by trapezoidal and Simpson’s 1/3 rd rule. Solution of linear
difference equations.
Boundary-Value Problems, Introduction. The Shooting Method, Finite-Difference Methods
(8 hours)
(RBT Levels: L1, L2 and L3)
Module-5: Numerical solution of partial differential equations
Classifications of second-order partial differential equations,Finite difference approximations to
partial derivatives. Solution of:Laplace equation, Poisson equations, one-dimensional heat
equation and wave equations. (8 hours)
(RBT Levels: L1, L2 and L3)
Course outcome (Course Skill Set)
At the end of the course, the student will be able to:
1. Explain and measure errors in numerical computations
2. Test for consistency and solve a system of linear equations.
3. Construct a function which closely fits given n- n-points of an unknown function.
4. Understand and apply the basic concepts related to solving problems by
numericaldifferentiation and numerical integration.
5. Use appropriate numerical methods to study phenomena modelled as partial differential
equations.

Assessment Details (both CIE and SEE)

@#12102023
Continuous Internal Evaluation:
● There are 25 marks for the CIE's Assignment component and 25 for the Internal
Assessment Test component.
● Each test shall be conducted for 25 marks. The first test will be administered after 40-50%
of the coverage of the syllabus, and the second test will be administered after 85-90% of
the coverage of the syllabus. The average of the two tests shall be scaled down to 25
marks
● Any two assignment methods mentioned in the 22OB2.4, if an assignment is project-
based then only one assignment for the course shall be planned. The schedule for
assignments shall be planned properly by the course teacher. The teacher should not
conduct two assignments at the end of the semester if two assignments are planned. Each
assignment shall be conducted for 25 marks. (If two assignments are conducted then the
sum of the two assignments shall be scaled down to 25 marks)
● The final CIE marks of the course out of 50 will be the sum of the scale-down marks of
tests and assignment/s marks.
The Internal Assessment Test question paper is designed to attain the different levels of
Bloom’s taxonomy as per the outcome defined for the course.
Semester-End Examination:
Theory SEE will be conducted by University as per the scheduled timetable, with common
question papers for the course (duration 03 hours).
1. The question paper will have ten questions. Each question is set for 20 marks.
2. There will be 2 questions from each module. Each of the two questions under a module
(with a maximum of 3 sub-questions), should have a mix of topics under that module.
3. The students have to answer 5 full questions, selecting one full question from each
module.
4. Marks scored shall be proportionally reduced to 50 marks.

Suggested Learning Resources:

Books (Name of the author/Title of the Book/Name of the publisher/Edition and Year)
Text Books:
1. Steven C. Chapra & Raymond P. Canale: “Numerical Methods for Engineers and
Scientists”, McGraw Hill, 8th Edition, 2020.
2. Steven C. Chapra: “Applied Numerical Methods with MATLAB for Engineers and
Scientists”, McGraw Hill, Fifth Edition, 2023.
3. B. S. Grewal: “Numerical Methods in Engineering & Science with programs in C, C++
and MATLAB”, Khanna Publishers, 10hEd., 2015.
Reference Books:
1.John H. Mathews & Kurtis D. Frank: “Numerical Methods Using MATLAB”, PHI
Publications, 4th Edition, 2005.
2.Won Young Yang, Wenwu Cao, Tae Sang Chung, John Morris: “Applied Numerical
Methods Using MATLAB”, WILEY Interscience, Latest Edition, 2005.

Web links and Video Lectures (e-Resources):

@#12102023
• http://nptel.ac.in/courses.php?disciplineID=111
• http://www.class-central.com/subject/math(MOOCs)
• http://academicearth.org/
• VTU e-Shikshana Program
• VTU EDUSAT Program.

Activity-Based Learning (Suggested Activities in Class)/Practical-Based Learning

• Quizzes
• Assignments
• Seminar

@#12102023
Lab VIEW Programming Semester 3
Course Code BEC358A CIE Marks 50
Teaching Hours/Week (L:T:P: S) 0:0:2 SEE Marks 50
Credits 01 Total 100
Exam Hours 2
Examination type (SEE) Practical
Course objectives:
 Aware of various front panel controls and indicators.
 Connect and manipulate nodes and wires in the block diagram.
 Locate various tool bars and pull-down menus for the purpose of implementing specific functions.
 Locate and utilize the context help window.
 Familiar with LabVIEW and different applications using it.

Sl.NO VI Programs(using LabVIEW software)to realize the following:
1 Basic arithmetic operations: addition, subtraction, multiplication and division

2 Boolean operations: AND, OR, XOR, NOT and NAND

3 Sum of ‘n’ numbers using ‘for’ loop

4 Factorial of a given number using ‘for’ loop

5 Determine square of a given number

6 Factorial of a given number using ‘while‘ loop

7 Sorting even numbers using ‘while’ loop in an array

8 Finding the array maximum and array minimum

Demonstration Experiments (For CIE)

9 Build a Virtual Instrument that simulates a heating and cooling system. The system must be able to be controlled
manually or automatically.
10 Build a Virtual Instrument that simulates a Basic Calculator (using formula node).

11 Build a Virtual Instrument that simulates a Water Level Detector.

12 DemonstratehowtocreateabasicVIwhichcalculatestheareaandperimeterofacircle.

Course outcomes (Course Skill Set):

At the end of the course the student will be able to:
 Use LabVIEW to create data acquisition, analysis and display operations
 Create user interfaces with charts, graph and buttons
 Use the programming structures and data types that exist in LabVIEW
 Use various editing and debugging techniques.

Continuous Internal Evaluation (CIE):

The minimum duration of SEE is 02 hours

Suggested Learning Resources:

@#12102023
1. VirtualInstrumentationusingLABVIEW,JovithaJerome,PHI,2011
2. VirtualInstrumentationusingLABVIEW,SanjayGupta,JosephJohn,TMH,McGrawHill,SecondEdition,2011.

@#12102023
MATLAB Programming Semester 3
Course Code BEC358B CIE Marks 50
Teaching Hours/Week (L:T:P: S) 1:0:0 SEE Marks 50
Total Hours of Pedagogy 14 Total Marks 100
Credits 01 Exam Hours 1
Examination type (SEE) Theory
Course objectives:
 Understand the MATLAB commands and functions.
 Create and Execute the script and function files
 Work with built in function, saving and loading data and create plots.
 Work with the arrays, matrices, symbolic computations, files and directories.
 Learn MATLAB programming with script, functions and language specific features.

Teaching-Learning Process (General Instructions)

These are sample Strategies, which teachers can use to accelerate the attainment of the various course
outcomes.
1. Adopt Problem Based Learning (PBL), which fosters students’ analytical skills, develop thinking
skills such as the ability to evaluate, generalize, and analyze information rather than simply recall
it.
2. Give programming assignments.
Module-1
Introduction: Basics of MATLAB, Simple arithmetic calculations, Creating and working with arrays and
numbers.

Module-2
Creating and printing simple plots, Creating, saving and executing a script file, Creating and executing a
function file, Working with arrays and matrices.

Module-3
Working with anonymous functions, Symbolic Computations, Importing and exporting data,
Working with files and directories.

Module-4
Interactive computations: Matrices and vectors, Matrix and array operations, Character strings, Command
line functions, Built-in functions, Saving and loading data, Plotting simple plots.

Module-5
Programming in MATLAB:Script Files, Function Files, Language specific Features.

Course outcome (Course Skill Set)

At the end of the course the student will be able to:
1. Understand the syntax of MATLAB for arithmetic computations, arrays, matrices.
2. Understand the built in function, saving and loading data, and create plots
3. Create program using symbolic computations, Importing and exporting data and files
4. Create program using character strings, Command line functions and Built-in functions.

Semester End Examinations (SEE)

SEE paper shall be set for 50 questions, each of the 01 marks. The pattern of the question paper is MCQ
(multiple choice questions). The time allotted for SEE is 01 hour. The student has to secure a minimum of
35% of the maximum marks meant for SEE.
OR
MCQ (Multiple Choice Questions) are preferred for 01 credit courses, however, if course content demands the
general question paper pattern that followed for 03 credit course, then
1. The question paper will have ten questions. Each question is set for 10 marks.
2. There will be 2 questions from each module. Each of the two questions under a module may or may not
have the sub-questions (with maximum sub-questions of 02, with marks distributions 5+5, 4+6, 3+7).
3. The students have to answer 5 full questions, selecting one full question from each module.
4. The duration of the examinations shall be defined by the concerned board of studies

Suggested Learning Resources:

Book
1. Rudra Pratap, Getting Started with MATLAB – A quick Introduction for scientists and Engineers, Oxford
University Press, 2010.

Web links and Video Lectures (e-Resources):

 .

Activity Based Learning (Suggested Activities in Class)/ Practical Based learning



@#12102023
C++ Basics Semester 4
Course Code BEC358C CIE Marks 50
Teaching Hours/Week (L: T:P: S) 0:0:2:0 SEE Marks 50
Total Hours of Pedagogy 24 Total Marks 100
Credits 1 Exam Hours 02

Examination nature (SEE) Practical

Course objectives:
 Understand object-oriented programming concepts, and apply them in solving problems.
 To create, debug and run simple C++ programs.
 Introduce the concepts of functions, friend functions, inheritance, polymorphism and function
overloading.
 Introduce the concepts of exception handling and multithreading.
Sl.No Experiments
1 Write a C++ program to find largest, smallest & second largest of three numbers using inline
functions MAX & Min.
2 Write a C++ program to calculate the volume of different geometric shapes like cube, cylinder
and sphere using function overloading concept.
3 Define a STUDENT class with USN, Name & Marks in 3 tests of a subject. Declare an array of 10
STUDENT objects. Using appropriate functions, find the average of the two better marks for each
student. Print the USN, Name & the average marks of all the students.
4 Write a C++ program to create class called MATRIX using two-dimensional array of integers, by
overloading the operator == which checks the compatibility of two matrices to be added and
subtracted. Perform the addition and subtraction by overloading + and – operators
respectively. Display the results by overloading the operator <<. If (m1 == m2) then m3 = m1 +
m2 and m4 = m1 – m2 else display error
5 Demonstrate simple inheritance concept by creating a base class FATHER with data members:
First Name, Surname, DOB & bank Balance and creating a derived class SON, which inherits:
Surname & Bank Balance feature from base class but provides its own feature: First Name & DOB.
Create & initialize F1 & S1 objects with appropriate constructors & display the FATHER & SON
details.
6 Write a C++ program to define class name FATHER & SON that holds the income respectively.
Calculate & display total income of a family using Friend function.
7 Write a C++ program to accept the student detail such as name & 3 different marks by get_data()
method & display the name & average of marks using display() method. Define a friend function
for calculating the average marks using the method mark_avg().
8 Write a C++ program to explain virtual function (Polymorphism) by creating a base class polygon
which has virtual function areas two classes rectangle & triangle derived from polygon & they
have area to calculate & return the area of rectangle & triangle respectively.
9 Design, develop and execute a program in C++ based on the following requirements: An
EMPLOYEE class containing data members & members functions: i) Data members: employee
number (an integer), Employee_ Name (a string of characters), Basic_ Salary (in integer), All_
Allowances (an integer), Net_Salary (an integer). (ii) Member functions: To read the data of
an employee, to calculate Net_Salary & to print the values of all the data members. (All_Allowances
= 123% of Basic, Income Tax (IT) =30% of gross salary (=basic_ Salary_All_Allowances_IT).
10 Write a C++ program with different class related through multiple inheritance & demonstrate the
use of different access specified by means of members variables & members functions.

11 Write a C++ program to create three objects for a class named count object with data members

@#12102023
such as roll_no & Name. Create a members function set_data ( ) for setting the data values &
display ( ) member function to display which object has invoked it using „this‟ pointer.
12 Write a C++ program to implement exception handling with minimum 5 exceptions classes
including two built in exceptions.
Course outcomes (Course Skill Set):
At the end of the course the student will be able to:
1. Write C++ program to solve simple and complex problems
2. Apply and implement major object-oriented concepts like message passing, function overloading,
operator overloading and inheritance to solve real-world problems.
3. Use major C++ features such as Templates for data type independent designs and File I/O to deal
with large data set.
4. Analyze, design and develop solutions to real-world problems applying OOP concepts of C++
Assessment Details (both CIE and SEE)
The weightage of Continuous Internal Evaluation (CIE) is 50% and for Semester End Exam (SEE) is
50%. The minimum passing mark for the CIE is 40% of the maximum marks (20 marks). A student shall
be deemed to have satisfied the academic requirements and earned the credits allotted to each course.
The student has to secure not less than 35% (18 Marks out of 50) in the semester-end examination
(SEE).
Continuous Internal Evaluation (CIE):
CIE marks for the practical course is 50 Marks.
The split-up of CIE marks for record/ journal and test are in the ratio 60:40.
 Each experiment to be evaluated for conduction with observation sheet and record write-up.
Rubrics for the evaluation of the journal/write-up for hardware/software experiments designed by
the faculty who is handling the laboratory session and is made known to students at the beginning
of the practical session.
 Record should contain all the specified experiments in the syllabus and each experiment write-up
will be evaluated for 10 marks.
 Total marks scored by the students are scaled downed to 30 marks (60% of maximum marks).
 Weightage to be given for neatness and submission of record/write-up on time.
 Department shall conduct 02 tests for 100 marks, the first test shall be conducted after the 8 th week
of the semester and the second test shall be conducted after the 14th week of the semester.
 In each test, test write-up, conduction of experiment, acceptable result, and procedural knowledge
will carry a weightage of 60% and the rest 40% for viva-voce.
 The suitable rubrics can be designed to evaluate each student’s performance and learning ability.
Rubrics suggested in Annexure-II of Regulation book
 The average of 02 tests is scaled down to 20 marks (40% of the maximum marks).
The Sum of scaled-down marks scored in the report write-up/journal and average marks of two tests is
the total CIE marks scored by the student.
Semester End Evaluation (SEE):
SEE marks for the practical course is 50 Marks.
SEE shall be conducted jointly by the two examiners of the same institute, examiners are appointed by
the University
All laboratory experiments are to be included for practical examination.
(Rubrics) Breakup of marks and the instructions printed on the cover page of the answer script to be
strictly adhered to by the examiners. OR based on the course requirement evaluation rubrics shall be
decided jointly by examiners.
Students can pick one question (experiment) from the questions lot prepared by the internal
/external examiners jointly.
Evaluation of test write-up/ conduction procedure and result/viva will be conducted jointly by
examiners.
General rubrics suggested for SEE are mentioned here, writeup-20%, Conduction procedure and

@#12102023
result in -60%, Viva-voce 20% of maximum marks. SEE for practical shall be evaluated for 100 marks
and scored marks shall be scaled down to 50 marks (however, based on course type, rubrics shall be
decided by the examiners)
Change of experiment is allowed only once and 15% Marks allotted to the procedure part to be made
zero.
The duration of SEE is 03 hours

Rubrics suggested in Annexure-II of Regulation book

Suggested Learning Resources:

1. Object oriented programming in TURBO C++, Robert Lafore, Galgotia Publications, 2002
2. The Complete Reference C++, Herbert Schildt, 4th Edition, Tata McGraw Hill, 2003.
3. Object Oriented Programming with C++, E Balaguruswamy, 4th Edition, Tata McGraw Hill, 2006.

@#12102023
IoT for Smart Infrastructure Semester 3
Course Code BEC358D CIE Marks 50
Teaching Hours/Week (L: T:P: S) 1:0:0:0 SEE Marks 50
Total Hours of Pedagogy 14 Total Marks 100
Credits 01 Exam Hours 1
Examination type (SEE) Theory/Practical
Course objectives:
To provide an understanding of the concepts, principles, and applications of IoT in the context of
smart infrastructure.
To explore the role of IoT technologies in transforming infrastructure into smart, efficient, and
sustainable systems and analyse the challenges, opportunities, and considerations in implementing
IoT for smart infrastructure.
To examine real-world case studies and successful implementations of IoT in smart cities,
buildings, transportation, and energy management and explore future trends and emerging
technologies shaping the field of IoT for smart infrastructure.
Teaching-Learning Process (General Instructions)
These are sample Strategies, which teachers can use to accelerate the attainment of the various
course outcomes.
 Interactive Lectures: Conduct interactive lectures to present the theoretical concepts and
foundational knowledge of IoT for smart infrastructure.
 Case Studies and Group Discussions: Utilize case studies to analyse real-world
implementations of IoT in smart infrastructure projects. Divide students into groups and
assign them specific cases to discuss and analyse.
 Hands-on Workshops and Simulations: Organize hands-on workshops or simulations
where students can interact with IoT devices and technologies relevant to smart
infrastructure.
 Guest Lectures and Industry Experts: Invite guest speakers or industry experts who
have hands-on experience in implementing IoT in smart infrastructure projects. They can
share their insights, challenges, and success stories, providing students with a real-world
perspective
 Project-Based Learning: Assign students to work on individual or group projects related
to IoT for smart infrastructure. Provide a project brief with specific objectives and
deliverables. Students can apply their knowledge and skills to design, develop, or analyse
IoT solutions for smart infrastructure challenges.

Module-1
Introduction to IoT and Smart Infrastructure
Introduction to IoT: Definition of IoT and its basic components, Overview of IoT applications in
various industries, Importance of IoT in transforming infrastructure.
Smart Infrastructure Overview: Introduction to smart infrastructure and its key components,
Benefits and challenges of implementing smart infrastructure, Case studies showcasing
successful smart infrastructure projects.
IoT Technologies for Smart Infrastructure: Sensors and actuators: Types, functionalities, and
applications; Communication protocols: Wi-Fi, Bluetooth, cellular networks, and their use in IoT;

@#12102023
Cloud computing and data analytics in IoT for infrastructure; Edge computing: Real-time
decision-making at the edge.
Security and Privacy in IoT for Smart Infrastructure: Security challenges and threats in
IoT, Privacy considerations and data protection in smart infrastructure, best practices and
solutions for ensuring IoT security and privacy.
Module-2
IoT Applications in Smart Cities
Introduction to Smart Cities - Definition and key features of smart cities, Role of IoT in
transforming cities into smart cities, Benefits and challenges of smart city implementations.
IoT Applications in Smart City Infrastructure - Smart transportation: Intelligent traffic
management and transportation systems, Smart buildings: Energy management and occupant
comfort; Smart grids: Optimizing energy distribution and consumption; Waste management,
water management, and environmental monitoring.
Case Studies of Smart City Implementations: Showcase of successful smart city projects around
the world; Analysis of the IoT technologies and strategies implemented; Lessons learned from
these case studies.
Future Trends in Smart Cities: Emerging technologies shaping the future of smart cities, Role of
IoT, AI, and 5G in advancing smart city infrastructure, Opportunities and challenges for future
smart city developments.

Module-3
IoT Applications in Smart Buildings
Introduction to Smart Buildings: Definition and key features of smart buildings, Benefits of IoT
in improving energy efficiency and occupant comfort, Challenges and considerations in
implementing smart building technologies.
IoT Technologies for Smart Buildings: Building automation systems and controls; Energy
management and monitoring using IoT devices; Indoor environmental quality monitoring and
optimization; Smart lighting and HVAC systems.
Case Studies of Smart Building Implementations: Showcase of successful smart building
projects; Analysis of IoT technologies and solutions deployed; Lessons learned from these case
studies.
Future Trends in Smart Buildings: Emerging technologies for smart buildings; Integration of IoT
with AI and machine learning; Potential impact of 5G on smart building applications.

Module-4
IoT Applications in Smart Transportation
Introduction to Smart Transportation: Definition and key features of smart transportation; Role
of IoT in intelligent traffic management and transportation systems; Challenges and
opportunities in implementing smart transportation solutions.
IoT Technologies for Smart Transportation: Traffic sensors and monitoring systems; Intelligent
transportation systems (ITS); Vehicle-to-vehicle (V2V) and vehicle-to-infrastructure (V2I)
communication; Real-time data analysis and predictive analytics.

@#12102023
Case Studies of Smart Transportation Implementations: Showcase of successful smart
transportation projects; Analysis of IoT technologies and solutions deployed; Lessons learned
from these case studies.
Future Trends in Smart Transportation: Emerging technologies shaping the future of smart
transportation; Role of IoT, AI, and autonomous vehicles; Potential impact of 5G on smart
transportation applications.
Module-5
IoT for Smart Grids and Energy Management
Introduction to Smart Grids: Definition and key features of smart grids: Role of IoT in optimizing
energy distribution and consumption; Benefits and challenges of smart grid implementations. IoT
Technologies for Smart Grids: Smart meters and energy monitoring devices; Demand response
and load management; Grid optimization and fault detection using IoT; Renewable energy
integration and grid stability.
Case Studies of Smart Grid Implementations: Showcase of successful smart grid projects,
Analysis of IoT technologies and solutions deployed, Lessons learned from these case studies.
Future Trends in Smart Grids and Energy Management: Emerging technologies for smart grids;
Integration of IoT, AI, and blockchain in energy management; Potential impact of 5G on smart
grid applications.

Course outcome (Course Skill Set)

At the end of the course the student will be able to:

 Define and explain the core concepts and components of IoT and its relevance to smart
infrastructure. Identify and evaluate the key technologies and communication protocols
used in IoT for smart infrastructure.
 Assess the benefits, challenges, and ethical considerations associated with implementing
IoT in smart infrastructure projects and analyse & compare different IoT applications in
smart cities, buildings, transportation, and energy management.
 Examine real-world case studies of successful IoT implementations in smart infrastructure
and extract lessons learned. Demonstrate an understanding of security and privacy
considerations in IoT for smart infrastructure.
 Discuss the impact of emerging technologies, such as artificial intelligence and 5G, on the
future of IoT in smart infrastructure. Apply knowledge and critical thinking skills to propose
IoT-based solutions for smart infrastructure challenges.
 Work effectively in teams to analyse, design, and present IoT projects related to smart
infrastructure and communicate effectively and articulate the potential benefits and
limitations of IoT for smart infrastructure.

Continuous internal Examination (CIE)

 For the Assignment component of the CIE, there are 25 marks and for the Internal Assessment
Test component, there are 25 marks.
 The first test will be administered after 40-50% of the syllabus has been covered, and the
second test will be administered after 85-90% of the syllabus has been covered
 Any two assignment methods mentioned in the 22OB2.4, if an assignment is project-based
then only one assignment for the course shall be planned. The teacher should not conduct two
assignments at the end of the semester if two assignments are planned.
 For the course, CIE marks will be based on a scaled-down sum of two tests and other methods
of assessment.
Internal Assessment Test question paper is designed to attain the different levels of
Bloom’s
taxonomy as per the outcome defined for the course.

Semester End Examinations (SEE)

SEE paper shall be set for 50 questions, each of the 01 marks. The pattern of the question paper is
MCQ (multiple choice questions). The time allotted for SEE is 01 hour. The student has to secure a
minimum of 35% of the maximum marks meant for SEE.
OR
MCQ (Multiple Choice Questions) are preferred for 01 credit courses, however, if course content
demands the general question paper pattern that followed for 03 credit course, then
1. The question paper will have ten questions. Each question is set for 10 marks.
2. There will be 2 questions from each module. Each of the two questions under a module may
or may not have the sub-questions (with maximum sub-questions of 02, with marks
distributions 5+5, 4+6, 3+7).
3. The students have to answer 5 full questions, selecting one full question from each module.

Suggested Learning Resources:

1. MindMatrix.io
2. "Internet of Things (A Hands-on-Approach)" by Arshdeep Bahga and Vijay Madisetti
3. "Building the Internet of Things: Implement New Business Models, Disrupt Competitors,
Transform Your Industry" by Maciej Kranz
4. "Smart Cities: Big Data, Civic Hackers, and the Quest for a New Utopia" by Anthony
M.
Townsend

@#12102023
5. "Internet of Things for Architects: Architecting IoT solutions by implementing sensors,
communication infrastructure, edge computing, analytics, and security" by Perry Lea.

Web links and Video Lectures (e-Resources):

 makes.mindmatrix.io
Activity Based Learning (Suggested Activities in Class)/ Practical Based learning
 Sensor Deployment and Data Collection: Organize a hands-on activity where participants
work in groups to deploy sensors in a simulated smart infrastructure environment.
 Smart City Simulation Game: Develop a simulation game where participants take on
different roles representing stakeholders in a smart city.
 IoT Solution Design Challenge: Assign participants to design an IoT-based solution for a
specific smart infrastructure problem. They can work individually or in teams to identify
the problem, propose an IoT solution, outline the required components and technologies,
and create a prototype or presentation.
 Security and Privacy Risk Assessment: Conduct a group activity where participants
analyse the security and privacy risks associated with IoT deployments in smart
infrastructure.
 Field Visit to Smart Infrastructure Project: Organize a field visit to a smart infrastructure
project, such as a smart building, smart city district, or IoT-enabled transportation system.

@#12102023
13.09.2023

Engineering Electromagnetics Semester 4

Course Code BEC401 CIE Marks 50
Teaching Hours/Week (L:T:P: 3:0:0
SEE Marks 50
S)
Total Hours of Pedagogy 40 Total Marks 100
Credits 03 Exam Hours 3
Examination type (SEE) Theory
Course objectives:
This course will enable students to:
 Study the different coordinate systems, Physical significance of Divergence, Curl and
Gradient.
 Understand the applications of Coulomb's law and Gauss law to different charge distributions
and the applications of Laplace's and Poisson's Equations to solve real time problems on
capacitance of different charge distributions.
 Understand the physical significance of Biot-Savart's, Ampere's Law and Stokes' theorem
for different current distributions.
 Infer the effects of magnetic forces, materials and inductance.
 KnowthephysicalinterpretationofMaxwell'sequationsandapplications for Plane waves for
their behavior in different media.
 Acquire knowledge of Poynting theorem and its application of power flow.
Teaching-Learning Process (General Instructions)
These are sample Strategies, which teachers can use to accelerate the attainment of the various
course outcomes.
These are sample Strategies, which teacher can use to accelerate the attainment of the various
course outcomes.
 Lecturemethod(L)doesnotmeanonlytraditionallecturemethod,butdifferenttypeofteachingmet
hodsmaybe adopted to develop the outcomes.
 Encourage collaborative (Group) Learning in the class.
 Ask at least three HOTS (Higher order Thinking) questions in the class, which promotes
critical thinking.
 Adopt Problem Based Learning (PBL), which fosters students’ Analytical skills, develop
thinking skills such as the ability to evaluate, generalize, and analyze information rather
than simply recall it.
 Topics will be introduced in a multiple representation.
 Showthedifferentwaystosolvethesameproblemandencouragethestudentstocomeupwiththeiro
wncreative ways to solve them.
 Discusshoweveryconceptcanbeappliedtotherealworld-andwhenthat'spossible,it helps
improve the students' understanding.
 AdoptFlippedclasstechniquebysharingthematerials/SampleVideospriortotheclassandhavedi
scussionson the topic in the succeeding classes.
Module-1
Revision of Vector Calculus-(Text1:Chapter1)
Coulomb'sLaw,ElectricFieldIntensityandFluxdensity:Experimentallawof Coulomb,
Electric field intensity, Field due to continuous volume charge distribution, Field of a line
charge, Field due to Sheet of charge, Electric flux density, Numerical Problems.(Text:
Chapter2.1to 2.5, 3.1)

@#12102023
13.09.2023

Module-2
Gauss's law and Divergence: Gauss law, Application of Gauss law to point charge, line
charge, Surface charge and volume charge, Point (differential) form of Gauss law, Divergence.
Maxwell's First equation (Electrostatics),Vector Operator V and divergence theorem,
Numerical Problems (Text:Chapter3.2to 3.7).
Energy, Potential and Conductors: Energy expended or work done in moving a point charge
in an electric field, The line integral, Definition of potential difference and potential, The potential
field of point charge, Potential gradient, Numerical Problems (Text: Chapter 4.1 to 4.4 and
4.6). Current and Current density, Continuity of current. (Text: Chapter 5.1, 5.2)

Module-3
Poisson's and Laplace's Equations: Derivation of Poisson's and Laplace's Equations,
Uniqueness theorem, Examples of the solution of Laplace's equation, Numerical problems on
Laplace equation (Text: Chapter 7.1to 7.3)
Steady Magnetic Field: Biot-Savart Law, Ampere's circuital law, Curl, Stokes' theorem,
Magnetic flux and magnetic flux density, Basic concepts Scalar and Vector Magnetic
Potentials, Numerical problems.(Text: Chapter 8.1to8.6)

Module-4
Magnetic Forces: Force on a moving charge, differential current elements, Force between
differential current elements, Numerical problems(Text:Chapter9.1 to9.3).
Magnetic Materials: Magnetization and permeability, Magnetic boundary conditions, The
magnetic circuit, Potential energy and forces on magnetic materials, Inductance and mutual
reactance, Numerical problems (Text: Chapter9.6 to 9.7).
Faraday' law of Electromagnetic Induction -Integral form and Point form, Numerical
problems (Text: Chapter 10.1)

Module-5
Maxwell's equations Continuity equation, Inconsistency of Ampere's law with continuity
equation, displacement current, Conduction current, Derivation of Maxwell's equations in
point form, and integral form, Maxwell's equations for different media, Numerical problems
(Text: Chapter 10.2 to 10.4)
Uniform Plane Wave: Plane wave, Uniform plane wave, Derivation of plane wave equations
from Maxwell's equations, Solution of wave equation for perfect dielectric, Relation
between E and H, Wave propagation in frees pace, Solution of wave equation for sinusoidal
excitation, wave propagation in any conducting media (y,a,,ri) and good conductors, Skin
effect or Depth of penetration, Poynting's theorem and wave power, Numerical
problems.(Text: Chapter 12.1 to12.4)

Course outcome (Course Skill Set)

At the end of the course, the student will be able to :

1. Evaluate problems on electrostatic force, electric field due to point, linear, volume
charges by applying conventional methods and charge in a volume.
2. Apply Gauss law to evaluate Electric fields due to different charge distributions and
Volume Charge distribution by using Divergence Theorem.

@#12102023
13.09.2023

3. Determine potential and energy with respect to point charge and capacitance using
Laplace equation and Apply Biot-Savart's and Ampere's laws for evaluating
Magnetic field for different current configurations
4. Calculate magnetic force, potential energy and Magnetization with respect to magnetic
materials and voltage induced in electric circuits.
5. Apply Maxwell's equations for time varying fields, EM waves in free space and
conductors and Evaluate power associated with EM waves using Poynting theorem.

Assessment Details (both CIE and SEE)

Continuous Internal Evaluation:

 There are 25 marks for the CIE's Assignment component and 25 for the Internal Assessment
Test component.
 Each test shall be conducted for 25 marks. The first test will be administered after 40-50% of
the coverage of the syllabus, and the second test will be administered after 85-90% of the
coverage of the syllabus. The average of the two tests shall be scaled down to 25 marks
 Any two assignment methods mentioned in the 22OB2.4, if an assignment is project-based
then only one assignment for the course shall be planned. The schedule for assignments shall
be planned properly by the course teacher. The teacher should not conduct two assignments at
the end of the semester if two assignments are planned. Each assignment shall be conducted
for 25 marks. (If two assignments are conducted then the sum of the two assignments shall be
scaled down to 25 marks)
 The final CIE marks of the course out of 50 will be the sum of the scale-down marks of tests
and assignment/s marks.
Internal Assessment Test question paper is designed to attain the different levels of Bloom’s
taxonomy as per the outcome defined for the course.

@#12102023
13.09.2023

Reference Books:
th
2. Elements of Electromagnetics –Matthew N.O., Sadiku, Oxford university press, 4
Edn.
3. Electromagnetic Waves and Radiating systems-E.C. Jordan and K.G. Balmain,PHl,
2ndEdn.
4. Electromagnetics-Joseph Edminister, Schaum Outline Series, McGraw Hill.
5. Fundamentals of Electromagnetics for Engineering-N. Narayana Rao, Pearson
Web links and Video Lectures (e-Resources):


Activity Based Learning (Suggested Activities in Class)/ Practical Based learning



@#12102023
13.09.2023

Basic Signal Processing Semester 4

Course Code BEC402 CIE Marks 50
Teaching Hours/Week (L:T:P: S) 3:0:2:0 SEE Marks 50
Total Hours of Pedagogy 40 hours Theory + 8-10 Lab slots Total Marks 100
Credits 04 Exam Hours 3
Examination nature (SEE) Theory/practical
Course objectives:
This course will enable students to:
Preparation: To prepare students with fundamental knowledge /overview in the field of Signal Processing with
Familiarization with the concept of Vector spaces and orthogonality with a qualitative insight into applications in
communications.
Core Competence: To equip students with a basic foundation of Signal Processing by delivering the basics of
quantitative parameters for Matrices & Linear Transformations, the mathematical description of discrete time signals and
systems, analyzing the signals in time domain using convolution sum, classifying signals into different categories based
on their properties, analyzing Linear Time Invariant(LTI) systems in time and transform domains

Teaching-Learning Process (General Instructions)

These are sample Strategies, which teacher can use to accelerate the attainment of the various course
outcomes.
 Lecture method (L) does not mean only traditional lecture method, but different type of teaching
methods maybe adopted to develop the outcomes.
 Show Video/animationfilmstoexplainthedifferentconceptsofLinearAlgebra&SignalProcessing.
 Encourage collaborative (Group)Learning in the class.
 Ask at least three HOTS(Higher order Thinking) questions in the class, which promotes critical
thinking.
 Adopt Problem Based Learning (PBL), which fosters students’ Analytical skills, develop thinking skills
such as the ability to evaluate, generalize, and analyze information rather than simply recall it.
 Topics will be introduced in a multiple representation.
 Showthedifferentwaystosolvethesameproblemandencouragethestudentstocomeupwiththeirowncreati
ve ways to solve them.
 Discuss how every concept can be applied to the real world - and when that's possible, it helps
improve the students' understanding.
 Adopt Flipped class technique by sharing the materials/Sample Videos prior to the class and have
discussions on the that topic in the succeeding classes.
 Give Programming Assignments.
MODULE-1
Vector Spaces: Vector spaces and Null subspaces, Rank and Row reduced form, Independence, Basis
anddimension,Dimensionsofthefoursubspaces,Rank-NullityTheorem,LinearTransformationsOrthogonality:
Orthogonal Vectors and Subspaces, Projections and Least squares, Orthogonal Bases and Gram-Schmidt
Orthogonalization procedure
(ReferChapters2and3of Text1)
MODULE-2
Eigen values and Eigen vectors: Review of Eigen values and Diagonalization of a Matrix, Special Matrices
(Positive Definite, Symmetric) and their properties, Singular Value Decomposition.
(ReferChapter5,Text1)

MODULE-3

@#12102023
13.09.2023

Introduction and Classification of signals: Definition of signal and systems with examples, Elementary
signals/Functions: Exponential, sinusoidal, step, impulse and ramp functions
Basic Operations on signals: Amplitude scaling, addition, multiplication, time scaling, time shift and time
reversal. Expression of triangular, rectangular and other wave forms in terms of elementary signals
System Classification and properties: Linear-nonlinear, Time variant-invariant, causal-non-causal, static-
dynamic, stable-unstable, invertible.
(Text2)[Only for Discrete Signals & Systems]
MODULE-4
Time domain representation of LTI System: Impulse response, convolution sum. Computation of convolution
sum using graphical method for unit step and unit step, unit step and exponential, exponential and exponential,
unit step and rectangular, and rectangular and rectangular.
LTI system Properties in terms of impulse response: System interconnection, Memory less, Causal,
Stable, Invertible and Deconvolution and step response
(Text2)[Only for Discrete Signals & Systems]
MODULE-5
The Z-Transforms: Z-transform, properties of the region of convergence, properties of the Z-transform, Inverse
Z-transform by partial fraction, Causality and stability, Transform analysis of LTI systems.
(Text2)

@#12102023
13.09.2023

PRACTICAL COMPONENT OF IPCC

Sl.NO Experiments execute dusing programming languages Scilab / MATLAB (but not limited to)

1 a. Program to create and modify a vector (array).

b. Program to create and modify a matrix.
2 Programs on basic operations on matrix.

3 Program to solve system of linear equations.

4 Program for Gram-Schmidt orthogonalization.

5 Program to find Eigen value and Eigen vector.

6
Program to find Singular value decomposition.

7 Program to generate discrete waveforms.

8 Program to perform asic operation on signals.

9 Program to perform convolution of two given sequences.

10 a. Program to perform verification of commutative property of convolution.

b. Program to perform verification of distributive property of convolution.
c. Program to perform verification of associative property of convolution.
Course outcomes (Course Skill Set):
At the end of the course, the student will be able to:
1. Understand the basics of Linear Algebra
2. Analyze different types of signals and systems
3. Analyze the properties of discrete-time signals & systems
4. Analyse discrete time signals & systems using Z transforms

Assessment Details (both CIE and SEE)

@#12102023
13.09.2023

 The student has to secure 40% of 25 marks to qualify in the CIE of the theory component of IPCC.
CIE for the practical component of the IPCC

 The student is declared as a pass in the course if he/she secures a minimum of 40% (40 marks out of 100)
in the sum total of the CIE (Continuous Internal Evaluation) and SEE (Semester End Examination) taken
together.
Suggested Learning Resources:
Books
1. Gilbert Strang, “Linear Algebra and its Applications”, Cengage Learning, 4thEdition, 2006,
ISBN97809802327
2. Simon Haykin and Barry Van Veen, “Signals and Systems”, 2 Edition, 2008, Wiley India. ISBN9971-51-239-
nd

@#12102023
13.09.2023

Reference Books
3. Michael Roberts, “Fundamentals of Signals & Systems”, 2 edition, Tata McGraw-Hill, 2010, ISBN978-0-07-070221-
nd

9.
4. Alan V Oppenheim, Alan S WiIIsky and S Hamid Nawab, “Signals and Systems” Pearson Education Asia/ PHI, 2nd
edition, 1997. Indian Reprint 2002.
5. H P H su, R Ranjan, “Signals and Systems”, Schaum’s outlines, TMH, 2006.
6. BP Lathi, “Linear Systems and Signals”, Oxford University Press, 2005.
7. Ganesh Rao and Satish Tunga, “Signals and Systems”, Pearson/Sanguine.
8. Seymour Lipschutz,Marc Lipson,“Schaums Easy Outline of Linear Algebra”, 2020.
Web links and Video Lectures (e-Resources):
VideolecturesonSignalsandSystemsbyAlanVOppenheim
Lecture1,Introduction|MITRES.6.007SignalsandSystems,Spring2011-YouTube
Lecture 2, Signals and Systems: Part 1 | MIT RES.6.007 Signals and Systems, Spring 2011 -
YouTubeNPTELvideolecturessignalsandsystem:
https://www.youtube.com/watch?v=7Z3LE5uM-
6Y&list=PLbMVogVj5nJQQZbah2uRZIRZ_9kfoqZyxVideolecturesonLinearAlgebrabyGilbertStrang
https://www.youtube.com/watch?v=ZK3O402wf1c&list=PL49CF3715CB9EF31D&index=1

Activity Based Learning (Suggested Activities in Class)/ Practical Based learning

ProgrammingAssignments/MiniProjectscanbegiventoimproveprogrammingskills.

@#12102023
13.09.2023

PRINCIPLES OF COMMUNICATION SYSTEMS Semester 4

Course Code BEC403 CIE Marks 50
Teaching Hours/Week (L:T:P: S) 3:0:2:0 SEE Marks 50
Total Hours of Pedagogy 40 hours Theory + 8-10 Lab slots Total Marks 100
Credits 04 Exam Hours 3
Examination nature (SEE) Theory/practical
Course objectives:
This course will enable students to
 Understand and analyse concepts of Analog Modulation schemes viz; AM, FM
 Design and analyse the electronic circuits for AM and FM modulation and demodulation.
 Design and analyse the electronic circuits used at various stages of RF transmitter and receiver.
 Understand and analyse concepts of digitization of signals.
 Evolve the concept of SNR in the presence of channel induced noise

Teaching-Learning Process (General Instructions)

These are sample Strategies, which teacher can use to accelerate the attainment of the various course
outcomes.
1. Lecture method (L) does not mean only traditional lecture method, but different type of teaching methods
may be adopted to develop the outcomes.
2. Show Video/animation films to explain evolution of communication technologies.
3. Encourage collaborative (Group) Learning in the class.
4. Ask at least three HOTS (Higher order Thinking) questions in the class, which promotes critical thinking.
5. Adopt Problem Based Learning (PBL), which fosters students’ Analytical skills, develop thinking skills such
as the ability to evaluate, generalize, and analyze information rather than simply recall it.
6. Show the different ways to solve the same problem and encourage the students to come up with their own
creative ways to solve them.
7. Discuss how every concept can be applied to the real world - and when that's possible, it helps improve the
students' understanding.
MODULE-1
Amplitude Modulation Fundamentals: AM Concepts, Modulation index and Percentage of Modulation,
Sidebands and the frequency domain, AM Power, Single Sideband Modulation.
AM Circuits: Amplitude Modulators, Amplitude Demodulators, Balanced Modulators (Lattice type).
MODULE-2
Fundamentals of Frequency Modulation: Basic Principles of Frequency Modulation, Principles of Phase
Modulation, Modulation index and sidebands, Noise Suppression effects of FM, Frequency Modulation versus
Amplitude Modulation.
FM Circuits: Frequency Modulators: , Frequency Demodulators

MODULE-3
Radio Transmitters: Transmitter Fundamentals: Transmitter Configurations, Carrier Generators: Crystal
Oscillators, Frequency Synthesisizers, Phase Locked Loop Synthesisizers.
Communication Receivers: Basic Principles of Signal reproduction, Superheterodyne Receivers, Frequency
Conversion: Mixing principles, Mixer and Converter Circuits, Local Oscillators and Frequency Synthesizers,
Intermediate Frequency and Images.
MODULE-4
Digital communication Techniques: Digital transmission of data, parallel and serial Transmission, Data
Conversion: Basic Principles of Data Conversion, D/A Converters, A/D Converters, ADC Specifications, Pulse
Modulation: Comparing Pulse Modulation Methods, Pulse-Code Modulation.

MODULE-5

@#12102023
13.09.2023

Noise: Signal to Noise Ratio, External Noise, Internal Noise, Expressing Noise Levels, Noise in Cascade Stages.
Multiplexing and Demultiplexing: Multiplexing Principles, Frequency Division Multiplexing, Time Division
Multiplexing, Pulse code Modulation: PCM Multiplexers, Demultiplexers, Benefits, Digital Carrier Systems (T
carrier System) , Duplexing.

PRACTICAL COMPONENT OF IPCC (Experiments can be conducted using a suitable circuit simulation software
or hardware components)
Sl.NO Experiments
1 Design and Test the Amplitude Modulation and demodulation using diode and transistors.

2
Design and Test the Frequency modulation using VCO and demodulation using slope detector circuit.

3 Design and test a high power

a) Class A line RF amplifier.
b) Class E RF amplifier
4
Design and test a mixer used for frequency translation.

5
Design and test a VCO used for local oscillator service

6
Verification of Sampling Theorem using sampling a sinusoidal signal using a sample and hold circuit.

7 TDM PAM Multiplexer and Demultiplexer

8 A String DAC and Flash Converter (Demo Experiment)

9 Design and Test a RF Transmitter circuit (Demo Experiment)

10 Design and Test a RF Receiver circuit (Demo Experiment)

Course outcomes (Course Skill Set):

At the end of the course, the student will be able to:
1. Understand the amplitude and frequency modulation techniques and perform time and frequency domain
transformations.
2. Identify the schemes for amplitude and frequency modulation and demodulation of analog signals and compare
the performance.
3. Characterize the influence of channel noise on analog modulated signals.
4. Define the schemes for sampling, pulse amplitude modulation and pulse code modulation systems.
5. Design of circuits used in different stages of communication transmitters and receivers.
Assessment Details (both CIE and SEE)
The weightage of Continuous Internal Evaluation (CIE) is 50% and for Semester End Exam (SEE) is 50%. The
minimum passing mark for the CIE is 40% of the maximum marks (20 marks out of 50) and for the SEE minimum
passing mark is 35% of the maximum marks (18 out of 50 marks). The student is declared as a pass in the course if
he/she secures a minimum of 40% (40 marks out of 100) in the sum total of the CIE (Continuous Internal
Evaluation) and SEE (Semester End Examination) taken together.

The IPCC means the practical portion integrated with the theory of the course. CIE marks for the theory component
are 25 marks and that for the practical component is 25 marks.

@#12102023
13.09.2023

CIE for the theory component of the IPCC

 25 marks for the theory component are split into 15 marks for two Internal Assessment Tests (Two Tests,
each of 15 Marks with 01-hour duration, are to be conducted) and 10 marks for other assessment methods
mentioned in 22OB4.2. The first test at the end of 40-50% coverage of the syllabus and the second test after
covering 85-90% of the syllabus.
 Scaled-down marks of the sum of two tests and other assessment methods will be CIE marks for the theory
component of IPCC (that is for 25 marks).
 The student has to secure 40% of 25 marks to qualify in the CIE of the theory component of IPCC.
CIE for the practical component of the IPCC

 The student is declared as a pass in the course if he/she secures a minimum of 40% (40 marks out of 100)

@#12102023
13.09.2023

in the sum total of the CIE (Continuous Internal Evaluation) and SEE (Semester End Examination) taken
together.
Suggested Learning Resources:
Books
1. Louis E Frenzel, Principles of Electronic Communication Systems, 3rd Edition, Mc Graw Hill Education
(India) Private Limited, 2016. ISBN: 978-0-07-066755-6.
Reference Books
1. Herbert Taub, Donald L Schilling, Goutam Saha, “Principles of Communication systems”, 4th Edition, Mc
Graw Hill Education (India) Private Limited, 2016. ISBN: 978-1-25-902985-1
2. B P Lathi, Zhi Ding, “Modern Digital and Analog Communication Systems”, Oxford University Press., 4th
edition, 2010, ISBN: 97801980738002.
3. Simon Haykins & Moher, Communication Systems, 5th Edition, John Wiley, India Pvt. Ltd, 2010, ISBN: 978-
81-265-2151-7.
Web links and Video Lectures (e-Resources):

Activity Based Learning (Suggested Activities in Class)/ Practical Based learning

@#12102023
13.09.2023

Communication Laboratory Semester 4

Course Code BECL404 CIE Marks 50
Teaching Hours/Week (L:T:P: S) 0:0:2 SEE Marks 50
Credits 01 Total Marks 100
Exam Hours 3
Examination type (SEE) Practical
Course objectives:
This laboratory course enables students to

 Understand the basic concepts of AM and FM modulation and demodulation.

 Design and analyse the electronic circuits used for AM and FM modulation and demodulation circuits.
 Understand the sampling theory and design circuits which enable sampling and reconstruction of ofanalog
signals.

 Realize the electronic circuits to perform pulse amplitude modulation, pulse code modulation and s and
multiplexing.
 Understand the working principles of RF transmitters and receivers.

Experiments
1 Design and plot the frequency response of an active band pass and band stop filters.

2
Design and test a high-level collector Modulator circuit and Demodulation the signal using diode detector.

3
Test the Balanced Modulator / Lattice Modulator (Diode ring)

4
Frequency modulation using VCO and PLL FM demodulator.

5 Design and test i) Pulse sampling, flat top sampling and reconstruction. ii)Pulse amplitude modulation and
demodulation.
6
Design and test the Time Division Multiplexing of two bandlimited signals

7
Design and test BJT/FET Mixer

8
Design and test the Pulse width Modulation and Pulse Position Modulation.

Demonstration Experiments ( For CIE )

9 PLL Frequency Synthesizer

10 PAM Multiplexer and Demultiplexer

11 PCM Multiplexer and Demultiplexer

12 Low power RF Transmitter and Receiver operations.

@#12102023
13.09.2023

Course outcomes (Course Skill Set):

At the end of the course the student will be able to:
1. Understand the basic concepts of RF transmitters and Receivers.
2. Illustrate the AM and FM modulation generation and detection using suitable electronic circuits.
3. Design and test the sampling, Multiplexing and pulse modulation techniques using electronic hardware.
4. Design and Demonstrate the electronic circuits used for RF transmitters and receivers.

Assessment Details (both CIE and SEE)

Continuous Internal Evaluation (CIE):

@#12102023
13.09.2023

be scaled down to 50 marks (however, based on course type, rubrics shall be decided by the examiners)
Change of experiment is allowed only once and 15% of Marks allotted to the procedure part are to be made
zero.
The minimum duration of SEE is 02 hours

Suggested Learning Resources:

1. Louis E Frenzel, Principles of Electronic Communication Systems, 3rd Edition, McGraw Hill Education
(India) Private Limited, 2016. ISBN: 978-0-07-066755-6.

@#12102023
13.09.2023

8051 MICROCONTROLLER Semester 4

Course Code BEC405A CIE Marks 50
Teaching Hours/Week (L: T:P: S) 3:0:0:0 SEE Marks 50
Total Hours of Pedagogy 40 Total Marks 100
Credits 03 Exam Hours 3
Examination type (SEE) Theory
Course objectives:
This course will enable students to:
• Understand the difference between a Microprocessor and a Microcontroller and
embedded
microcontrollers.
• Familiarize the basic architecture of 8051 microcontroller.
• Program 8051microprocessor using Assembly Level Language and C.
• Understand the interrupt system of 8051 and the use of interrupts.
• Understand the operation and use of inbuilt Timers/Counters and Serial port of 8051.
Interface 8051 to external memory and I/O devices using its I/O ports.
Teaching-Learning Process (General Instructions)
The sample strategies, which the teacher can use to accelerate the attainment of the various course
outcomes are listed in the following:
1. Lecture method (L) does not mean only the traditional lecture method, but a different
type of teaching method may be adopted to develop the outcomes.
2. Show Video/animation films to explain the functioning of various techniques.
3. Encourage collaborative (Group) Learning in the class
4. Ask at least three HOTS (Higher-order Thinking) questions in the class, which
promotes critical thinking
5. Adopt Problem Based Learning (PBL), which fosters students’ Analytical skills, develop
thinking skills such as the ability to evaluate, generalize, and analyze information rather
than simply recall it.
6. Show the different ways to solve the same problem and encourage the students to come
up with their own creative ways to solve them.
7. Discuss how every concept can be applied to the real world - and when that's possible,
it helps improve the students' understanding.
Give Programming Assignments.
Module-1
8051 Microcontroller:
Microprocessor Vs Microcontroller, Embedded Systems, Embedded
Microcontrollers, 8051 Architecture- Registers, Pin diagram, I/O ports
functions, Internal Memory organization. External Memory (ROM & RAM)
interfacing.
Module-2
8051 Instruction Set: Addressing Modes, Data Transfer instructions,
Arithmetic instructions, Logical instructions, Branch instructions, Bit
manipulation instructions. Simple Assembly language program examples (without
loops) to use these instructions

Module-3

@#12102023
13.09.2023

8051 Stack, I/O Port Interfacing and Programming: 8051 Stack, Stack and
Subroutine instructions. Assembly language program examples on subroutine and
involving loops - Delay subroutine, Factorial of an 8 bit number (result maximum
8 bit), Block move without overlap, Addition of N 8 bit numbers, Picking
smallest/largest of N 8 bit numbers.
Interfacing simple switch and LED to I/O ports to switch on/off LED withrespect
to switch status.
Module-4
8051 Timers and Serial Port: 8051 Timers and Counters – Operation and Assembly
language programming to generate a pulse using Mode-1 and a square wave using
Mode-2 on a port pin.
8051 Serial Communication- Basics of Serial Data Communication, RS-232 standard,
9 pin RS232 signals, Simple Serial Port programming in Assembly and C to transmit
a message and to receive data serially
Module 5
8051 Interrupts and Interfacing Applications: 8051 Interrupts. 8051
Assembly language programming to generate an external interrupts using a switch,
8051 C programming to generate a square waveform on a port pin using a Timer
interrupt. Interfacing 8051 to ADC-0804, LCD and Stepper motor and their 8051
Assembly language interfacing programming

Course outcome (Course Skill Set)

At the end of the course, students will be able to:
1. Explain the difference between Microprocessors & Microcontrollers, Architecture of
8051 Microcontroller, Interfacing of 8051 to external memory and Instruction set of
8051.
2. Write 8051 Assembly level programs using 8051 instruction set.
3. Explain the Interrupt system, operation of Timers/Counters and Serial port of
8051.
4. Write 8051 Assembly language program to generate timings and waveforms using
8051 timers, to send & receive serial data using 8051 serial port and to generate
an external interrupt using a switch.
5. Write 8051 C programs to generate square wave on 8051 I/O port pin using interrupt
and to send & receive serial data using 8051 serial port. Interface simple
switches, simple LEDs, ADC 0804, LCD and Stepper Motorto 8051 using
8051 I/O ports.

@#12102023
13.09.2023

Assessment Details (both CIE and SEE)

The weightage of Continuous Internal Evaluation (CIE) is 50% and for Semester End Exam
(SEE) is 50%. The minimum passing mark for the CIE is 40% of the maximum marks (20 marks
out of 50) and for the SEE minimum passing mark is 35% of the maximum marks (18 out of 50
marks). The student is declared as a pass in the course if he/she secures a minimum of 40% (40
marks out of 100) in the sum total of the CIE (Continuous Internal Evaluation) and SEE
(Semester End Examination) taken together.
Continuous Internal Evaluation:
There are 25 marks for the CIE's Assignment component and 25 for the Internal Assessment
Test component.
Each test shall be conducted for 25 marks. The first test will be administered after 40-50% of
the coverage of the syllabus, and the second test will be administered after 85-90% of the
coverage of the syllabus. The average of the two tests shall be scaled down to 25 marks
Any two assignment methods mentioned in the 22OB2.4, if an assignment is project-based
then only one assignment for the course shall be planned. The schedule for assignments shall
be planned properly by the course teacher. The teacher should not conduct two assignments
at the end of the semester if two assignments are planned. Each assignment shall be
conducted for 25 marks. (If two assignments are conducted then the sum of the two
assignments shall be scaled down to 25 marks)
The final CIE marks of the course out of 50 will be the sum of the scale-down marks of tests
and assignment/s marks.
Internal Assessment Test question paper is designed to attain the different levels of Bloom’s
taxonomy as per the outcome defined for the course.
Semester-End Examination:
Theory SEE will be conducted by University as per the scheduled timetable, with common
question papers for the course (duration 03 hours).
1. The question paper will have ten questions. Each question is set for 20 marks.
2. There will be 2 questions from each module. Each of the two questions under a module (with
a maximum of 3 sub-questions), should have a mix of topics under that module.
3. The students have to answer 5 full questions, selecting one full question from each module.
4. Marks scored shall be proportionally reduced to 50 marks
Suggested Learning Resources:
Books
1. The 8051 Microcontroller and Embedded Systems – using assembly and C ”,
Muhammad Ali Mazidi and Janice Gillespie Mazidi and Rollin D. McKinlay;
PHI, 2006 / Pearson, 2006.
rd
2. “The 8051 Microcontroller”, Kenneth J. Ayala, 3 Edition, Thomson/
Cengage Learning
REFERENCE BOOKS:
1. “The 8051 Microcontroller Based Embedded Systems”, Manish K Patel,
McGraw Hill, 2014, ISBN: 978-93-329-0125-4.
2. “Microcontrollers: Architecture, Programming, Interfacing and System Design”,
Raj Kamal, Pearson Education, 2005.

Web links and Video Lectures (e-Resources):

@#12102023
13.09.2023

Activity Based Learning (Suggested Activities in Class)/ Practical Based learning

@#12102023
13.09.2023

Industrial Electronics Semester 4

Course Code BEC405B CIE Marks 50
Teaching Hours/Week (L: T:P: S) 3:0:0 SEE Marks 50
Total Hours of Pedagogy 40 hours Total Marks 100
Credits 03 Exam Hours 03
Examination type (SEE) Theory
Course objectives: This course will enable student to
 Explain broad types of industrial power devices, there structure, and its characteristics.
 Design and analyse the broad categories of power electronic circuits.
 Explain various types of MEMs devices, principle of operation and construction.
 Familiarize with soft core processors and computer architecture.
 Apply protective methods for devices and circuits.

Teaching-Learning Process (General Instructions)

These are sample Strategies, which teachers can use to accelerate the attainment of the various course
outcomes.
1. Lecture method (L) does not mean only traditional lecture method, but different type of teaching
methods may be adopted to develop the outcomes.
2. Show Video/animation films to explain evolution of communication technologies.
3. Encourage collaborative (Group) Learning in the class.
4. Ask at least three HOTS (Higher order Thinking) questions in the class, which promotes critical
thinking.
5. Adopt Problem Based Learning (PBL), which fosters students’ Analytical skills, develop thinking skills
such as the ability to evaluate, generalize, and analyze information rather than simply recall it.
6. Show the different ways to solve the same problem and encourage the students to come up with their
own creative ways to solve them.
7. Discuss how every concept can be applied to the real world - and when that's possible, it helps
improve the students' understanding.

Module-1
Industrial Power Devices: General purpose power diodes, fast recovery power diodes, schottky power
diodes, silicon carbide power diodes (Text book 1: 2.5, 2.6), Power MOSFETs, Steady state characteristics,
switching characteristics, silicon carbide MOSFETs, COOLMOS, Junction field effect transistors, operation and
characteristics of JFETs, Silicon Carbide JFET structures, Bipolar Junction Transistors, Steady state
characteristics, switching characteristics, silicon carbide BJTs, IGBT, silicon carbide IGBTs (Text book 1: 4.3,
4.4, 4.6, 4.7), Thyristor, Thyristor characteristics, two transistor model (Text book 1: 9.2, 9.3, 9.4).
Module-2
Power Electronics Circuits: Controlled Rectifiers – Single phase full converter with R and RL load, Single
phase dual converters, and Three phase full converter with RL load (Text book 1: 10.2, 10.3, 10.4).
Switching mode regulators – Buck Regulator, Boost regulator, Buck – Boost regulator, comparison of
regulators (Text book 1: 5.9.1, 5.9.2, 5.9.3, 5.10)
Inverters – Principle of operation, Single phase bridge inverter, Three phase inverter with 180 and 120
degree conduction, Current source inverter (Text book 1: 6.3, 6.4, 6.5, 6.9).
AC voltage controllers – Single phase full wave controller with resistive load, single phase full wave controller
with inductive load (Text book 1: 11.3, 11.4).
Module-3
MEMS Devices: Sensing and Measuring Principles, Capacitive Sensing, Resistive Sensing, Piezoelectric
Sensing, Thermal Transducers, Optical Sensors, Magnetic Sensors, MEMS Actuation Principles, Electrostatic
Actuation, Thermal Actuation, Piezoelectric Actuation, Magnetic Actuation, MEMS Devices Inertial Sensors,
Pressure Sensors, Radio Frequency MEMS: Capacitive Switches and Phase Shifters, Microfluidic Components,
Optical Devices. (Text book 2: 13.1, 13.3, 13.4)
Module-4
@#12102023
13.09.2023

Soft Core Processors - Processor Core Options, Processor Definition Process, Software Development Aspects,
Utilization of Soft-Core Processors, Custom Instructions, Soft-Core Processor on an ASIC vs. FPGA, Design
Issues, Applications for Soft-Core Processors (Text book 2: 22.2, 22.3, 22.4, 22.5, 22.6, 22.7, 22.8, 22.9).
Computer Architecture - Hardware Organization, Computer Software, Programming Languages, Operating
Systems, Information Representation in Digital Computers, Computer Programming Model, CPU Registers,
Immediate Operands, Memory, Organization, Memory Addressing, Computer Instruction, Types, Interrupts
and Exceptions, Evaluating Instruction Set Architectures, Computer System Design, Hierarchical Memory
Systems, Memory Characteristics, Semiconductor Memory Technologies, Memory System Organization, Cache
Memory, Virtual Memory Management, Interfaces to Input/Output Devices, Microcontroller Architectures
Multiple Processor Architectures (Text book 2: 23.2, 23.3, 23.4, 23.5, 23.6, 23.7, 23.8, 23.9, 23.10)
Module-5
Protections of Devices and Circuits: Cooling and Heat sinks, Thermal Modeling of Power Switching Devices,
Electrical Equivalent Thermal model, Mathematical Thermal Equivalent Circuit, Coupling of Electrical and
Thermal Components, Snubber circuits, Reverse Recovery Transients, Supply and Load side transients, Voltage
protection by Selenium Diodes and Metaloxide Varistors, Current protection, Fusing, Fault current with AC
source, Fault current with DC source, Electromagnetic Interference, sources of EMI, Minimizing EMI
Generation, EMI shielding, EMI standards (Text book 1: 17.2, 17.3, 17.4, 17.5, 17.6, 17.7, 17.8, 17.9).
Course outcome (Course Skill Set)
At the end of the course, the student will be able to :
1. Explain different types of industrial power devices such as MOSFET, BJT, IGBT etc, there
structure, and its operating characteristics.
2. Design and analyse the power electronic circuits such as switch mode regulators, inverters,
controlled rectifiers and ac voltage controllers.
3. Explain various types of MEMs devices used for sensing pressure, temperature, current,
voltage, humidity, vibration etc..
4. Familiarize with soft core processors such as ASIC and FPGA.
5. Familiarize with computer hardware, software, architecture, instruction set, memory
organization, multiprocessor architecture.
6. Apply protective methods for devices various industrial power devices based on thermal
requirements and develop protective methods for the circuits against various electrical
parameters.

@#12102023
13.09.2023

Assessment Details (both CIE and SEE)

Continuous Internal Evaluation:

 There are 25 marks for the CIE's Assignment component and 25 for the Internal Assessment Test
component.
 Each test shall be conducted for 25 marks. The first test will be administered after 40-50% of the
coverage of the syllabus, and the second test will be administered after 85-90% of the coverage
of the syllabus. The average of the two tests shall be scaled down to 25 marks
 Any two assignment methods mentioned in the 22OB2.4, if an assignment is project-based then
only one assignment for the course shall be planned. The schedule for assignments shall be
planned properly by the course teacher. The teacher should not conduct two assignments at the
end of the semester if two assignments are planned. Each assignment shall be conducted for 25
marks. (If two assignments are conducted then the sum of the two assignments shall be scaled
down to 25 marks)
 The final CIE marks of the course out of 50 will be the sum of the scale-down marks of tests and
assignment/s marks.
Internal Assessment Test question paper is designed to attain the different levels of Bloom’s taxonomy
as per the outcome defined for the course.

Suggested Learning Resources:

Books
1. Power Electronics: Devices, Circuits, and Applications, Muhammad H. Rashid, Pearson, 4th International
edition.
2. Fundamentals of Industrial Electronics , Bogdan M. Wilamowski, J. David Irwin, CRC Press, 2011,
3. Thomas E. Kissell, Industrial Electronics: Applications for Programmable Controllers, Instrumentation and
Process Control, and Electrical Machines and Motor Controls, 3rd edition, 2003, Prentice Hall.
4. Ned Mohan, T.M. Undeland and W.P. Robbins, “Power Electronics: Converters, Applications and Design”,
Wiley India Ltd, 2008.

Web links and Video Lectures (e-Resources):

 https://archive.nptel.ac.in/courses/108/102/108102145/
 https://nptel.ac.in/courses/117105082
 https://www.youtube.com/channel/UCKg8GNii0Q-ieXE56AXosGg/featured
 https://www.ieee-ies.org/

Activity Based Learning (Suggested Activities in Class)/ Practical Based learning

 Quiz and Seminars

@#12102023
13.09.2023

Operating system Semester 4

Course Code BEC405C CIE Marks 50
Teaching Hours/Week (L:T:P: S) 3:0:0:0 SEE Marks 50
Total Hours of Pedagogy 40 Total Marks 100
Credits 03 Exam Hours 3
Examination type (SEE) Theory
Course objectives:
 Understand the services provided by an operating system.
 Explain how processes are synchronized and scheduled.
 Understand the different approaches of memory management and virtual memory
management,
 Describe the structure and organisation of the file system.
 Understand inter process communication and dead lock situations.

Teaching-Learning Process (General Instructions)

These are sample Strategies, which teachers can use to accelerate the attainment of the various course
outcomes.
1. Lecturer method(L) need not to be only traditional lecture method, but alternative
effective teaching methods could be adopted to attain the outcomes.
2. Use of Video/Animation to explain functioning of various concepts.
3. Encourage collaborative (Group Learning) Learning in the class.
4. Ask at least three HOT (Higher order Thinking) questions in the class, which promotes
critical thinking.
5. Adopt Problem Based Learning (PBL), which fosters students’ Analytical skills, develop
design thinking skills such as the ability to design, evaluate, generalize, and analyze
information rather than simply recall it.
6. Introduce Topics in manifold representations.
7. Show the different ways to solve the same problem and encourage the students to come
up with their own creative ways to solve them.
8. Discuss how every concept can be applied to the real world - and when that's possible, it
helps improve the students' understanding.

Module-1
Introduction to Operating System: OS, goals of an OS, Computational structures, resource allocation
techniques, efficiency, system performance and user convenience, classes operating system, batch
processing, multiprogramming, time sharing system, real time and distributed operating systems.
(Topics from sections 1.2,1.3,2.2 to 2.8 of text 1).
Module-2
Process Management: OS view of processes, PCB, Fundamental state, Transitions of a process, Threads,
Kernel and User level Threads, Non-Preemptive Scheduling-FCFS and SRN, Preemptive Scheduling- RR and
LCN, Scheduling in Unix and Scheduling Linux .
(Topics from sections 3.3,3.3.1,3.4,3.4.1,3.4.2, Selected scheduling topics from 4.2 and 4.3,4.6,4.7 of
Text 1 )
Module-3

@#12102023
13.09.2023

Memory Management: Contiguous Memory Allocation, Non-contiguous Memory Allocation,

Paging, Segmentation with Paging, Virtual Memory Management, Demand Paging, VM Handler,
FIFO, LRU Page replacement policies, Virtual memory in Unix and Linux.
(Topics from Sections 5.5 to 5.9, 6.1 to 6.3 except optimal policy and 6.3.1, 6.7, 6.8 of Text
1).
Module-4
File systems: File systems and IOCS, File Operation, File Organization, Directory Structure, File Protection,
Interface between File system and IOCS, Allocation of disk space, Implementing file access.
(Topics from section 7.1 to 7.8 of Text).

Module-5
Message passing and deadlocks: Overview of Message Passing, Implementing message passing, Mailboxes,
Deadlocks, Deadlocks in resource allocation, Handling deadlocks, Deadlocks detection algorithm, Deadlocks
Prevention.
(Topics from sections 10.1 to 10.3, 11.1 to 11.5 of Text).
Course outcome (Course Skill Set)
At the end of the course, the student will be able to :
1. Explain the goals, structure, operation and types of operating system.
2. Apply scheduling techniques to find performance factors.
3. Explain organization of file system and IOCS.
4. Apply suitable techniques for contiguous and non contiguous memory allocation.
5. Describe message passing, deadlock detection and prevention methods.

@#12102023
13.09.2023

Assessment Details (both CIE and SEE)

Continuous Internal Evaluation:

 There are 25 marks for the CIE's Assignment component and 25 for the Internal Assessment
Test component.
 Each test shall be conducted for 25 marks. The first test will be administered after 40-50% of
the coverage of the syllabus, and the second test will be administered after 85-90% of the
coverage of the syllabus. The average of the two tests shall be scaled down to 25 marks
 Any two assignment methods mentioned in the 22OB2.4, if an assignment is project-based then
only one assignment for the course shall be planned. The schedule for assignments shall be
planned properly by the course teacher. The teacher should not conduct two assignments at the
end of the semester if two assignments are planned. Each assignment shall be conducted for 25
marks. (If two assignments are conducted then the sum of the two assignments shall be scaled
down to 25 marks)
 The final CIE marks of the course out of 50 will be the sum of the scale-down marks of tests and
assignment/s marks.
Internal Assessment Test question paper is designed to attain the different levels of Bloom’s taxonomy
as per the outcome defined for the course.

Suggested Learning Resources:

Books
1. Operating system – A concept based Approach, by Dhamdhere, TMH, 2nd edition.

Web links and Video Lectures (e-Resources):

 https://archive.nptel.ac.in/courses/106/105/106105214/
 https://onlinecourses.nptel.ac.in/noc20_cs04/preview
 https://onlinecourses.nptel.ac.in/noc21_cs72/preview
 https://nptel.ac.in/courses/106106144
 https://nptel.ac.in/courses/106102132
 https://nptel.ac.in/courses/106106168
 https://archive.nptel.ac.in/courses/106/102/106102132/.

@#12102023
13.09.2023

Activity Based Learning (Suggested Activities in Class)/ Practical Based learning

 Real world problem solving using group discussion.
 Role play for process scheduling.
 Present animation for deadlock.
 Real world example of memory management concepts.

@#12102023
13.09.2023

Control Systems Semester 4

Course Code BEC405D CIE Marks 50
Teaching Hours/Week (L:T:P: S) 3:0:0 SEE Marks 50
Total Hours of Pedagogy 40 Total Marks 100
Credits 03 Exam Hours 3
Examination type (SEE) Theory
Course objectives:
This course will enable students to:
• Understand the basic features, configurations and application of control systems.
• Understand various terminologies and definitions for the control systems.
• Learn how to find a mathematical model of electrical, mechanical and electro- mechanical
systems.
• Knowhowtofindtimeresponsefromthetransferfunction.
• FindthetransferfunctionviaMasons'rule.
• Analyze the stability of a system from the transfer function.
Teaching-Learning Process (General Instructions)
These are sample Strategies, which teacher can use to accelerate the attainment of the various
course outcomes.
 Lecture method (L) does not mean only traditional lecture method, but different type of
teaching methods may be adopted to develop the outcomes.
 Encourage collaborative (Group) Learning in the class.
 Ask at least three HOTS (Higher order Thinking) questions in the class, which promotes
critical thinking.
 Adopt Problem Based Learning (PBL), which fosters students Analytical skills, develop
thinking skills such as the ability to evaluate, generalize, and analyze information rather
than simply recall it.
 Topics will be introduced in a multiple representation.
 Show the different ways to solve the same problem and encourage the students to come up
with their own creative ways to solve them.
 Discuss how every concept can be applied to the real world-and when that's possible, it
helps improve the students' understanding.
 Adopt Flipped class technique by sharing the materials/ Sample Videos prior to the class
and have discussions on the topic in the succeeding classes.

Module-1
Introduction to Control Systems: Types of Control Systems, Effect of Feedback Systems,
Differential equation of Physical Systems -Mechanical Systems, Electrical Systems, Electro
mechanical systems, Analogous Systems.

Module-2
Block diagrams and signal flow graphs: Transfer functions, Block diagram algebra and
Signal Flow graphs.
Module-3

@#12102023
13.09.2023

Time Response of feedback control systems: Standard test signals, Unitstep response of First
and Second order Systems. Time response specifications,Time response specifications of
second order systems, steady state errors and error constants. Introduction to PI, PD and PID
Controllers (excluding design).

Module-4
Stability analysis: Concepts of stability, Necessary conditions for Stability, Routh stability
criterion, Relative stability analysis: more on the Routh stability criterion.
Introduction to Root-Locus Techniques, The root locus concepts, Construction of
root loci.
Frequency domainanalysisandstability: Correlation between timeand frequency
response, Bode Plots, Experimental determination of transfer function.

Module-5
Introduction to Polar Plots, (Inverse Polar Plots excluded) Mathematical preliminaries,
Nyquist Stability criterion,(Systems with transportation lag excluded)
Introduction to lead, lag and lead- lag compensating networks (excluding design).
Introductionto State variable analysis: Concepts of state, state variable and state models for
electrical systems, Solution of state equations.

Course outcome (Course Skill Set)

At the end of the course, the student will be able to :

1. Developthemathematicalmodelofmechanicalandelectrical systems.
2. Developtransferfunctionfora givencontrolsystemusingblock diagram reduction
techniques and signal flow graph method.
3. Determine thetimedomain specificationsforfirstandsecondorder systems.
4. Determine the stability of a system in the time domain using Routh- Hurwitz
criterion and Root-locus technique.
5. Determine the stability of a system in the frequency domain using Nyquist and bode
plots.

@#12102023
13.09.2023

Assessment Details (both CIE and SEE)

Continuous Internal Evaluation:

 There are 25 marks for the CIE's Assignment component and 25 for the Internal Assessment
Test component.
 Each test shall be conducted for 25 marks. The first test will be administered after 40-50% of
the coverage of the syllabus, and the second test will be administered after 85-90% of the
coverage of the syllabus. The average of the two tests shall be scaled down to 25 marks
 Any two assignment methods mentioned in the 22OB2.4, if an assignment is project-based
then only one assignment for the course shall be planned. The schedule for assignments shall
be planned properly by the course teacher. The teacher should not conduct two assignments at
the end of the semester if two assignments are planned. Each assignment shall be conducted
for 25 marks. (If two assignments are conducted then the sum of the two assignments shall be
scaled down to 25 marks)
 The final CIE marks of the course out of 50 will be the sum of the scale-down marks of tests
and assignment/s marks.
Internal Assessment Test question paper is designed to attain the different levels of Bloom’s
taxonomy as per the outcome defined for the course.

2. There will be 2 questions from each module. Each of the two questions under a module (with
Suggested Learning Resources:
Book
1. J. Nagarath and M. Gopal, "Control Systems Engineering", New Age International(P)
Limited, Publishers, Fifth edition- 2005, ISBN:81- 224-2008-7.
ReferenceBooks:
th
1. "Modern Control Engineering", K.Ogata, Pearson Education Asia/PHI, 4 Edition, 2002.
ISBN978-81 -203-4010- 7.
th
2. "Automatic Control Systems", Benjamin C. Kuo, John Wiley India Pvt. Ltd., 8 Edition,
2008.
3. "Feedback and Control System," Joseph J Distefano III et.al., Schaum's Outlines, TMH,
nd
2 Edition 2007.

@#12102023
13.09.2023

Web links and Video Lectures (e-Resources):

 .

Activity Based Learning (Suggested Activities in Class)/ Practical Based learning



@#12102023
13.09.2023

Embedded C Basics Semester 4

Course Code BEC456A CIE Marks 50
Teaching Hours/Week (L:T:P: S) 0:0:2:0 SEE Marks 50
Credits 01 Total Marks 100
Exam Hours 2
Examination type (SEE) Theory/practical/Viva-Voce /Term-work/Others

Course objectives: This course will enable students to:

 Understand the basic programming of Microprocessor and microcontroller.

 Develop the microcontroller-based programs for various application in simulation environment
 Program a microcontroller to control an external hardware using suitable I/O ports.

Sl.NO Experiments
Conduct the following experiments by writing C Program using Keil microvision simulator (any 8051
microcontroller can be chosen as the target).
1 Write a 8051C program to multiply two 16 bit binary numbers.

2 Write a 8051 C program to find the sum of first 10 integer numbers.

3 Write a 8051 C program to find factorial of a given number.

4 Write a 8051 C program to add an array of 16bit numbers and store the 32 bit result in internal RAM

5 Write a 8051C program to find the square of a number (1to10)using look-up table.

6 Write a 8051 C program to find the largest/smallest number in an array of 32 numbers

7 Writea8051 C program to arrange a series of 32bit numbers in ascending/descending order

8 Write a 8051 C program to count the number of ones and zeros in two consecutive memory locations.

9 Write a 8051C program to scan a series of 32bit numbers to find how many are negative.

10 Writea8051 C program to display “HelloWorld” message (either in simulation mode or interface an LCD
display).
11 Write a 8051C program to generate the waveforms: square, triangle and ramp, using DAQ.

12 Write a 8051 C program to run a stepper motor in clock wise and counter clockwise direction with a given
step angle.
Course outcomes (Course Skill Set):
At the end of the course the student will be able to:
1. Write C programs in 8051for solving simple problems that manipulate input data using different instructions.
2. Develop testing and experimental procedures on 8051Microcontroller, analyze their operation under different
cases.
3. Develop programs for 8051Microcontroller to implement real world problems.
4. Develop microcontroller applications using external hardware interface.

@#12102023
13.09.2023

Assessment Details (both CIE and SEE)

The weightage of Continuous Internal Evaluation (CIE) is 50% and for Semester End Exam (SEE) is 50%. The
minimum passing mark for the CIE is 40% of the maximum marks (20 marks out of 50) and for the SEE minimum
passing mark is 35% of the maximum marks (18 out of 50 marks). A student shall be deemed to have satisfied the
academic requirements and earned the credits allotted to each subject/ course if the student secures a minimum of
40% (40 marks out of 100) in the sum total of the CIE (Continuous Internal Evaluation) and SEE (Semester End
Examination) taken together.
Continuous Internal Evaluation (CIE):
CIE marks for the practical course are 50 Marks.
The split-up of CIE marks for record/ journal and test are in the ratio 60:40.
 Each experiment is to be evaluated for conduction with an observation sheet and record write-up. Rubrics for
the evaluation of the journal/write-up for hardware/software experiments are designed by the faculty who is
handling the laboratory session and are made known to students at the beginning of the practical session.
 Record should contain all the specified experiments in the syllabus and each experiment write-up will be
evaluated for 10 marks.
 Total marks scored by the students are scaled down to 30 marks (60% of maximum marks).
 Weightage to be given for neatness and submission of record/write-up on time.
 Department shall conduct a test of 100 marks after the completion of all the experiments listed in the
syllabus.
 In a test, test write-up, conduction of experiment, acceptable result, and procedural knowledge will carry a
weightage of 60% and the rest 40% for viva-voce.
 The suitable rubrics can be designed to evaluate each student’s performance and learning ability.
 The marks scored shall be scaled down to 20 marks (40% of the maximum marks).
The Sum of scaled-down marks scored in the report write-up/journal and marks of a test is the total CIE marks
scored by the student.
Semester End Evaluation (SEE):
 SEE marks for the practical course are 50 Marks.
 SEE shall be conducted jointly by the two examiners of the same institute, examiners are appointed
by the Head of the Institute.
 The examination schedule and names of examiners are informed to the university before the conduction of
the examination. These practical examinations are to be conducted between the schedule mentioned in the
academic calendar of the University.
 All laboratory experiments are to be included for practical examination.
 (Rubrics) Breakup of marks and the instructions printed on the cover page of the answer script to be
strictly adhered to by the examiners. OR based on the course requirement evaluation rubrics shall be
decided jointly by examiners.
 Students can pick one question (experiment) from the questions lot prepared by the examiners jointly.
 Evaluation of test write-up/ conduction procedure and result/viva will be conducted jointly by examiners.
 General rubrics suggested for SEE are mentioned here, writeup-20%, Conduction procedure and result in -60%,
Viva-voce 20% of maximum marks. SEE for practical shall be evaluated for 100 marks and scored marks shall
be scaled down to 50 marks (however, based on course type, rubrics shall be decided by the examiners)
 Change of experiment is allowed only once and 15% of Marks allotted to the procedure part are to be made
zero.
The minimum duration of SEE is 02 hours

Suggested Learning Resources:

“The8051Microcontroller:Hardware,SoftwareandApplications”,VUdayashankaraandMSMallikarjunaSwamy,
McGrawHillEducation,1stedition,2017.

@#12102023
13.09.2023

PCB Design Semester 4

Course Code BEC456B CIE Marks 50
Teaching Hours/Week (L:T:P: S) 1:0:0:0 SEE Marks 50
Total Hours of Pedagogy Total Marks 100
Credits 01 Exam Hours 1
Examination type (SEE) Theory
Course objectives:
 Study about layout planning, art work and design of PCB
 To understand the PCB production process
 Discuss the role of Modern trends and automatic design of PCB
Teaching-Learning Process (General Instructions)
These are sample Strategies, which teachers can use to accelerate the attainment of the various
course outcomes.
1. Lecture method (L) does not mean only the traditional lecture method, but a different type of
teaching method may be adopted to develop the outcomes
2. Show Video/animation films to explain the functioning of various
3. Encourage collaborative (Group) Learning in the class to promote critical thinking
4. Topics for seminars on several MEMS related topics and their applications
5. Encourage the students to take up mini projects and main projects
6. Discuss how every concept can be applied to the real world - and when that's possible, it helps
improve the students' understanding.
Module-1
Design of Printed Circuit Boards:Layout Planning: Introduction, General Consideration,
PCB Sizes, Layout Approaches, Documentation, Layout, General Rules and Parameters:
Introduction, Resistance, Capacitance, Inductance of PCB conductors, Conductor Spacing,
Component Placing and Mounting, Cooling Requirements and Package Density, Layout
Check, Art work.
Module-2
Technology of PCB: Film Master Production: Introduction, Emulsion Parameters, Film
Emulsions, Dimensional Stability of Film Masters, Reprographic Cameras, Darkroom, Film
Processing, Film Registration, Properties of Copper Clad Laminates:Introduction,
Manufacture of Copper Clad Laminates, Properties and Types of Laminates, Specifications and
Test Methods, Board cleaning before Pattern Transfer: Manual and Machine Cleaning
Processes.
Module-3
Photoprinting: Basic Processes for Double Sided PCBs, Photoresists, Wet Film Resists,
Coating Processes, Exposure and further Processing of Wet Film Resists, Dry Film Resists.
Screen Printing: Screen Fabrics, Screen and Frame Preparation, Pattern Transfer onto the
screen, Reclamation of the Screen Fabrics, Printing, Trouble shooting

Module-4
Plating: Introduction, Immersion Plating, Electroless Plating, Electroplating, Plating Quality
Control, Etching, Etching Machines, Etchant Systems, Minimising Pollution, Mechanical
Machining operations. Multilayer Boards: Introduction, Design and Test Considerations,

@#12102023
13.09.2023

Multilayer Construction, Equipment, Laminating Process and further processing.

Module-5
PCB Technology Trends: Fine line conductors with Ultra-Thin Copper Foil, Multilayer and
Multiwire Boards, Flexible Printed Circuit Boards. Automation and Computers in PCB
Design: Automated Artwork Draughting, Computer Aided Design, Design Automation.

Course outcome (Course Skill Set)

At the end of the course, the student will be able to :

1. Define the detailed circuit diagram and prerequisite before the actual PCB layout.
2. Understand the process of PCB production and Material selection
3. Understand the PCB fabrication by transferring the conductor pattern on base material
4. Know about the Plating techniques, Etching process and multilayer PCB board construction
5. Understand about new streams in PCB technology and modern facilities for PCB design

@#12102023
13.09.2023

Assessment Details (both CIE and SEE)

Continuous Internal Evaluation:

 There are 25 marks for the CIE's Assignment component and 25 for the Internal Assessment
Test component.
 Each test shall be conducted for 25 marks. The first test will be administered after 40-50% of
the coverage of the syllabus, and the second test will be administered after 85-90% of the
coverage of the syllabus. The average of the two tests shall be scaled down to 25 marks
 Any two assignment methods mentioned in the 22OB2.4, if an assignment is project-based
then only one assignment for the course shall be planned. The schedule for assignments shall
be planned properly by the course teacher. The teacher should not conduct two assignments at
the end of the semester if two assignments are planned. Each assignment shall be conducted
for 25 marks. (If two assignments are conducted then the sum of the two assignments shall be
scaled down to 25 marks)
 The final CIE marks of the course out of 50 will be the sum of the scale-down marks of tests
and assignment/s marks.
Internal Assessment Test question paper is designed to attain the different levels of Bloom’s
taxonomy as per the outcome defined for the course.

2. There will be 2 questions from each module. Each of the two questions under a module (with
Suggested Learning Resources:
Books
1. Printed Circuit Boards-Design & Technology by Walter C Bosshart, Tata Mc Graw-Hill
Pvt.Ltd, 2010

2. Printed Circuit Boards-Design, Fabrication, Assembly and Testing by Dr.R.S. Khandapur,

Mc Graw-Hill Education, 2017

Web links and Video Lectures (e-Resources):

@#12102023
13.09.2023

 PCB designing software YouTube links

 NPTEL courses and videos

Activity Based Learning (Suggested Activities in Class)/ Practical Based learning

 PCB making for simple electronic circuit and testing
 Quizzes and seminar

@#12102023
13.09.2023

DAQ using Lab VIEW Semester 4

Course Code BEC456C CIE Marks 50
Teaching Hours/Week (L:T:P: S) 0:0:2:0 SEE Marks 50
Credits 01 Total Marks 100
Exam Hours 2
Examination type (SEE) Theory/Practical/Viva-Voce /Term-work/Others

Course objectives: This course will enable students to:

 Process the knowledge of loop constructs.

 Fundamentals of graphical programming and use Lab VIEW modules
 Implement ‘Timing’ functions.
 Input algebraic formulas via ‘Formula Nodes’ and ‘Expression Nodes’.
Sl.NO Experiments
1 Data acquisition using LabVIEW for temperature measurement with thermocouple.

2 Data acquisition using LabVIEW for temperature measurement with AD590.

3 Data acquisition using LabVIEW for temperature measurement with RTD.

4 Data acquisition using LabVIEW for temperature measurement with Thermistor.

5 Creation of a CRO using LabVIEW and measurement of frequency and amplitude from external source.

6 Create function generator using LabVIEW and display the amplitude and frequency on CRO (externally
connected)
7 Demonstrate amplitude modulation considering modulating and carrierwave from external source.

8 Interface LEDs to DAQ output and implement counter.

9 Data acquisition using LabVIEW for load/strain measurement using suitable transducers.

10 Demonstrate binary to greycode converter (&viceversa) using DAQ card.

11 Data acquisition using LabVIEW for distance/humidity measurement using suitable transducers.

12 Reading audio input with Microphones and output using DAQ card.

Course outcomes (Course Skill Set):

At the end of the course the student will be able to:
1. Build temperature indicating instruments using LabVIEW(NIDAQ)
2. Interface peripheral devices/instruments to LabVIEW
3. Build LabVIEW modules to sense and process audio inputs
4. Apply programming structures, data types, and the analysis and signal processing algorithms in LabVIEW

@#12102023
13.09.2023

Assessment Details (both CIE and SEE)

The weightage of Continuous Internal Evaluation (CIE) is 50% and for Semester End Exam (SEE) is 50%. The
minimum passing mark for the CIE is 40% of the maximum marks (20 marks out of 50) and for the SEE minimum
passing mark is 35% of the maximum marks (18 out of 50 marks). A student shall be deemed to have satisfied the
academic requirements and earned the credits allotted to each subject/ course if the student secures a minimum of
40% (40 marks out of 100) in the sum total of the CIE (Continuous Internal Evaluation) and SEE (Semester End
Examination) taken together.
Continuous Internal Evaluation (CIE):
CIE marks for the practical course are 50 Marks.
The split-up of CIE marks for record/ journal and test are in the ratio 60:40.
 Each experiment is to be evaluated for conduction with an observation sheet and record write-up. Rubrics for
the evaluation of the journal/write-up for hardware/software experiments are designed by the faculty who is
handling the laboratory session and are made known to students at the beginning of the practical session.
 Record should contain all the specified experiments in the syllabus and each experiment write-up will be
evaluated for 10 marks.
 Total marks scored by the students are scaled down to 30 marks (60% of maximum marks).
 Weightage to be given for neatness and submission of record/write-up on time.
 Department shall conduct a test of 100 marks after the completion of all the experiments listed in the
syllabus.
 In a test, test write-up, conduction of experiment, acceptable result, and procedural knowledge will carry a
weightage of 60% and the rest 40% for viva-voce.
 The suitable rubrics can be designed to evaluate each student’s performance and learning ability.
 The marks scored shall be scaled down to 20 marks (40% of the maximum marks).
The Sum of scaled-down marks scored in the report write-up/journal and marks of a test is the total CIE marks
scored by the student.
Semester End Evaluation (SEE):
 SEE marks for the practical course are 50 Marks.
 SEE shall be conducted jointly by the two examiners of the same institute, examiners are appointed
by the Head of the Institute.
 The examination schedule and names of examiners are informed to the university before the conduction of
the examination. These practical examinations are to be conducted between the schedule mentioned in the
academic calendar of the University.
 All laboratory experiments are to be included for practical examination.
 (Rubrics) Breakup of marks and the instructions printed on the cover page of the answer script to be
strictly adhered to by the examiners. OR based on the course requirement evaluation rubrics shall be
decided jointly by examiners.
 Students can pick one question (experiment) from the questions lot prepared by the examiners jointly.
 Evaluation of test write-up/ conduction procedure and result/viva will be conducted jointly by examiners.
 General rubrics suggested for SEE are mentioned here, writeup-20%, Conduction procedure and result in -60%,
Viva-voce 20% of maximum marks. SEE for practical shall be evaluated for 100 marks and scored marks shall
be scaled down to 50 marks (however, based on course type, rubrics shall be decided by the examiners)
Change of experiment is allowed only once and 15% of Marks allotted to the procedure part are to be made zero.

The minimum duration of SEE is 02 hours

Suggested Learning Resources:

1. Virtual Instrumentation using LABVIEW, Jovitha Jerome, PHI,2011
2. Virtual Instrumentation using LABVIEW, Sanjay Gupta, Joseph John, TMH, McGrawHill,SecondEdition,2011.

@#12102023
13.09.2023

Risk Management in IoT Implementation Semester IV

Course Code BEC456D CIE Marks 50
Teaching Hours/Week (L: T:P: S) 1:0:0:0 SEE Marks 50
Total Hours of Pedagogy 14 Total Marks 100
Credits 01 Exam Hours 1
Examination type (SEE) Theory/practical
Course objectives:
 Understand the fundamental concepts and principles of the Internet of Things (IoT) and its
relevance in various industries. Identify and assess potential risks and challenges associated with
implementing IoT projects.
 Develop effective risk management strategies and mitigation plans specific to IoT
implementations. Implement security controls and best practices to ensure the confidentiality,
integrity, and availability of IoT systems.
 Comply with relevant regulations and standards to address data privacy, security, and ethical
considerations in IoT implementations.
Teaching-Learning Process (General Instructions)
These are sample Strategies, which teachers can use to accelerate the attainment of the various
course outcomes.
 Active Learning: Encourage students to actively engage in the learning process through
hands-on activities, group discussions, case studies, and problem-solving exercises.
 Real-World Examples and Case Studies: Provide real-world examples and case studies
related to IoT implementations and risk management.
 Collaborative Learning: Foster collaborative learning environments where students can
work together in groups or teams to analyse and solve IoT-related challenges.
 Simulations and Hands-on Experiments: Incorporate simulations or hands-on experiments
that replicate IoT scenarios and risk management challenges.
 Formative Assessments and Feedback: Implement regular formative assessments
throughout the course to gauge students' progress and understanding of the course
outcomes.
Module-1
Introduction to IoT and Risk Management
Overview of the Internet of Things (IoT) and its applications; Understanding the importance of
risk management in IoT implementation; Key components of risk management in IoT; Common
risks and challenges in IoT implementation; Case studies and examples of successful and failed
IoT implementations.
Module-2
Identifying and Assessing Risks in IoT
Identification of potential risks in IoT implementation; Risk assessment methodologies and
techniques for IoT projects; Threat modelling and risk analysis in IoT systems; Assessing the
impact and likelihood of identified risks; Prioritization of risks based on their significance.

Module-3

@#12102023 1
13.09.2023

Mitigation Strategies for IoT Risks

Developing a risk mitigation plan for IoT projects; Security controls and best practices for IoT
devices and networks; Data privacy and protection measures in IoT systems; Implementing
secure communication protocols in IoT; Securing IoT gateways and cloud platforms.

Module-4
Monitoring and Response to IoT Risks
Real-time monitoring of IoT devices and networks; Intrusion detection and prevention in IoT
systems; Incident response planning for IoT security breaches; Continuous monitoring and
vulnerability management in IoT; Data backup and disaster recovery strategies for IoT systems.
Module-5
Compliance and Regulatory Considerations
Overview of relevant regulations and standards for IoT implementation; Compliance
requirements for data privacy and security in IoT; Impact of industry-specific regulations on IoT
projects; Role of audits and assessments in ensuring compliance; Ethical considerations and
responsible use of IoT technologies.
Course outcome (Course Skill Set)

At the end of the course the student will be able to:

 Students will be able to explain the core concepts and applications of the Internet of Things
and its impact on industries and society. Students will be able to identify and assess risks
and challenges in IoT implementations, applying appropriate methodologies and
techniques.
 Students will be able to develop comprehensive risk management strategies and
mitigation plans tailored to specific IoT projects. Students will be able to implement
security controls and best practices to protect IoT devices, networks, and data from
potential threats and vulnerabilities.
 Students will be able to analyse and comply with relevant regulations, standards, and
ethical considerations to ensure responsible and secure IoT implementations.

@#12102023 2
13.09.2023

Assessment Details (both CIE and SEE)

Continuous internal Examination (CIE)

 For the Assignment component of the CIE, there are 25 marks and for the Internal Assessment
Test component, there are 25 marks.
 The first test will be administered after 40-50% of the syllabus has been covered, and the
second test will be administered after 85-90% of the syllabus has been covered
 Any two assignment methods mentioned in the 22OB2.4, if an assignment is project-based
then only one assignment for the course shall be planned. The teacher should not conduct
two assignments at the end of the semester if two assignments are planned.
 For the course, CIE marks will be based on a scaled-down sum of two tests and other methods
of assessment.
Internal Assessment Test question paper is designed to attain the different levels of Bloom’s
taxonomy as per the outcome defined for the course.

Semester End Examinations (SEE)

SEE paper shall be set for 50 questions, each of the 01 marks. The pattern of the question paper
is MCQ (multiple choice questions). The time allotted for SEE is 01 hour. The student has to secure
a minimum of 35% of the maximum marks meant for SEE.
OR
MCQ (Multiple Choice Questions) are preferred for 01 credit courses, however, if course content
demands the general question paper pattern that followed for 03 credit course, then
1. The question paper will have ten questions. Each question is set for 10 marks.
2. There will be 2 questions from each module. Each of the two questions under a module may
or may not have the sub-questions (with maximum sub-questions of 02, with marks
distributions 5+5, 4+6, 3+7).
3. The students have to answer 5 full questions, selecting one full question from each module.

Suggested Learning Resources:

1. MindMatrix.io
2. "Practical IoT Security: A Guide to Building Secure Connected Systems" by Brian Russell, Drew
Van Duren, and John R. Scharlau
3. "Internet of Things: Principles and Paradigms" by Rajkumar Buyya, Amir Vahid Dastjerdi, and
Sriram Venugopal
4. "IoT Fundamentals: Networking Technologies, Protocols, and Use Cases for the Internet of
Things" by David Hanes, Gonzalo Salgueiro, and Patrick Grossetete

@#12102023 3
13.09.2023

5. "Managing Risk and Security in the Internet of Things: Frameworks and Best Practices" by Tim
Lister, Brian Russell, and Tom Olzak
6. "The Internet of Risky Things: Trusting the Devices That Surround Us" by Sean Smith and Abel
Sanchez

Web links and Video Lectures (e-Resources):

 makes.mindmatrix.io
Activity Based Learning (Suggested Activities in Class)/ Practical Based learning
 Risk Assessment and Mitigation Plan Development: Divide students into small groups and
assign them different IoT implementation scenarios.
 Threat Modelling Exercise: Provide students with a sample IoT system architecture. In
pairs or individually, students should conduct a threat modelling exercise, identifying
potential threats and vulnerabilities in the system.
 IoT Security Audit and Compliance Assessment: Ask students to conduct a security audit
and compliance assessment of a hypothetical IoT deployment. Provide them with a
checklist of relevant security controls, regulatory requirements, and industry standards.
 IoT Risk Simulation Game: Develop a simulation game where students take on different
roles in an IoT implementation team, such as project manager, security analyst, or
compliance officer.
 Case Studies and Problem-Solving Exercises: Assign real-world case studies or problem-
solving exercises related to IoT risk management. Students should analyse the given
scenarios, identify risks, propose mitigation strategies, and present their solutions.

@#12102023 4

Electric Circuit Analysis PDF
79% (14)
Electric Circuit Analysis PDF
435 pages
Exercises Fourier Series PDF
100% (1)
Exercises Fourier Series PDF
3 pages
Ecesch
No ratings yet
Ecesch
4 pages
22 Scheme Syllabus i to Vi Semester
No ratings yet
22 Scheme Syllabus i to Vi Semester
271 pages
Ecesch
No ratings yet
Ecesch
5 pages
ecesch
No ratings yet
ecesch
12 pages
Mecsch
No ratings yet
Mecsch
12 pages
Csesch
No ratings yet
Csesch
15 pages
eesch
No ratings yet
eesch
12 pages
CSE-DS
No ratings yet
CSE-DS
14 pages
tcsch
No ratings yet
tcsch
9 pages
Civ Syllabus
No ratings yet
Civ Syllabus
225 pages
Eesch
No ratings yet
Eesch
12 pages
Civschsyll 21 Scheme Civil
No ratings yet
Civschsyll 21 Scheme Civil
240 pages
Civil Sceme
No ratings yet
Civil Sceme
12 pages
Issch
No ratings yet
Issch
15 pages
smmsch (3)
No ratings yet
smmsch (3)
15 pages
Eisyllabus 20222
No ratings yet
Eisyllabus 20222
14 pages
Roboschud
No ratings yet
Roboschud
12 pages
CSE-AIML
No ratings yet
CSE-AIML
15 pages
Isesch
No ratings yet
Isesch
9 pages
ISE-21 Scheme and Syllabus
No ratings yet
ISE-21 Scheme and Syllabus
174 pages
58 Eesch
No ratings yet
58 Eesch
10 pages
civsch (2)
No ratings yet
civsch (2)
4 pages
Robosch 2022
No ratings yet
Robosch 2022
4 pages
CSDSCH
No ratings yet
CSDSCH
9 pages
Civsch
No ratings yet
Civsch
12 pages
VIT BE CS Syllabus
No ratings yet
VIT BE CS Syllabus
179 pages
Vtu Cs Syllabus
No ratings yet
Vtu Cs Syllabus
12 pages
P Group Syllabus For 1st Sem CS ML DS September 2023
No ratings yet
P Group Syllabus For 1st Sem CS ML DS September 2023
34 pages
Teaching Hours /week Examination: National Service Scheme (NSS) Physical Education (PE) (Sports and Athletics)
No ratings yet
Teaching Hours /week Examination: National Service Scheme (NSS) Physical Education (PE) (Sports and Athletics)
10 pages
Computer Science Engineering Scheme Syllabus 2021
No ratings yet
Computer Science Engineering Scheme Syllabus 2021
177 pages
34eisch
No ratings yet
34eisch
5 pages
Aids SCH
No ratings yet
Aids SCH
9 pages
Csesch
No ratings yet
Csesch
12 pages
Cssyll
No ratings yet
Cssyll
43 pages
1ece 2022batch
No ratings yet
1ece 2022batch
37 pages
Aidssch
No ratings yet
Aidssch
4 pages
agrisch
No ratings yet
agrisch
12 pages
Syllabus 2021
No ratings yet
Syllabus 2021
106 pages
Scheme of Studies
100% (1)
Scheme of Studies
12 pages
ecschsyll-1
No ratings yet
ecschsyll-1
30 pages
Ecschsyll 21 Scheme
No ratings yet
Ecschsyll 21 Scheme
174 pages
Aimlsch
No ratings yet
Aimlsch
9 pages
21 Scheme Civschsyll
No ratings yet
21 Scheme Civschsyll
224 pages
Biomedsch
No ratings yet
Biomedsch
9 pages
Elecsch
No ratings yet
Elecsch
12 pages
Mechsch
No ratings yet
Mechsch
11 pages
Csesch
No ratings yet
Csesch
12 pages
Csesch 3
No ratings yet
Csesch 3
12 pages
2021 Scheme & Syllabus (Engg) Civschsyll
No ratings yet
2021 Scheme & Syllabus (Engg) Civschsyll
56 pages
Isesch Removed
No ratings yet
Isesch Removed
4 pages
5 Ecesch
No ratings yet
5 Ecesch
11 pages
FM_BME403_Scheme of Teaching and Examinations2022
No ratings yet
FM_BME403_Scheme of Teaching and Examinations2022
2 pages
58eissch
No ratings yet
58eissch
10 pages
2021 Scheme
No ratings yet
2021 Scheme
3 pages
Mecsch
No ratings yet
Mecsch
12 pages
Aeosch
No ratings yet
Aeosch
9 pages
Mechsch
No ratings yet
Mechsch
11 pages
7th Sem Syllabus
No ratings yet
7th Sem Syllabus
17 pages
STEM, Grade 4
From Everand
STEM, Grade 4
Natalie Rompella
5/5 (1)
STEM, Grade 3
From Everand
STEM, Grade 3
Elise Craver
4/5 (1)
Kannur University Syllabus
No ratings yet
Kannur University Syllabus
93 pages
Jntuk 2-1 and 2-2 ECE Syllabus R10
No ratings yet
Jntuk 2-1 and 2-2 ECE Syllabus R10
30 pages
Ch11 14 PDF
No ratings yet
Ch11 14 PDF
77 pages
Fourier Series: Advanced Engineering Mathematics MATH 133
No ratings yet
Fourier Series: Advanced Engineering Mathematics MATH 133
11 pages
MA2211 Transforms and Partial Differential Equations Lectrue Notes PDF
100% (1)
MA2211 Transforms and Partial Differential Equations Lectrue Notes PDF
145 pages
Engineering Mathematics
No ratings yet
Engineering Mathematics
1 page
Complete Partial Differential Equations Analytical Methods and Applications Textbooks in Mathematics 1st Edition Victor Henner PDF For All Chapters
100% (2)
Complete Partial Differential Equations Analytical Methods and Applications Textbooks in Mathematics 1st Edition Victor Henner PDF For All Chapters
62 pages
MDU Question Papers, Sample Papers, Results, Contests Everthing For Free !! Register Now
No ratings yet
MDU Question Papers, Sample Papers, Results, Contests Everthing For Free !! Register Now
65 pages
Fourier Series' & Its Application'
No ratings yet
Fourier Series' & Its Application'
18 pages
FINAL SYLLABUS III SEM 2 Zee
No ratings yet
FINAL SYLLABUS III SEM 2 Zee
26 pages
University College London Department of Physics and Astronomy
No ratings yet
University College London Department of Physics and Astronomy
1 page
Unit I Partial Differential Equations 12
No ratings yet
Unit I Partial Differential Equations 12
6 pages
BTech (SVEC-10) Syllabus (EEE)
No ratings yet
BTech (SVEC-10) Syllabus (EEE)
214 pages
Signals and Systems 04 CTFS
No ratings yet
Signals and Systems 04 CTFS
31 pages
1.1 Introduction To Fourier Series: A+t B+T T
No ratings yet
1.1 Introduction To Fourier Series: A+t B+T T
38 pages
ME 4th Sem Lesson Plans Even 2018 19
No ratings yet
ME 4th Sem Lesson Plans Even 2018 19
67 pages
APM346 Summary 12 2020
No ratings yet
APM346 Summary 12 2020
14 pages
UG Syllabus 2021-NEP 2021 (160 Credit)
No ratings yet
UG Syllabus 2021-NEP 2021 (160 Credit)
96 pages
Advanced Electric Circuits Ele214
No ratings yet
Advanced Electric Circuits Ele214
7 pages
Water Rudin
No ratings yet
Water Rudin
7 pages
Errors
50% (2)
Errors
106 pages
BS-M101 Merged
No ratings yet
BS-M101 Merged
11 pages
ECE - 2022 Batch 3rd Sem - Syllabus and Scheme - Old Subject Codes
No ratings yet
ECE - 2022 Batch 3rd Sem - Syllabus and Scheme - Old Subject Codes
47 pages
95006
No ratings yet
95006
65 pages
ELEN3026A - Lecture 2 - Fourier Transform - Lecture Slides
No ratings yet
ELEN3026A - Lecture 2 - Fourier Transform - Lecture Slides
61 pages
The Fourier Transform
No ratings yet
The Fourier Transform
20 pages
Fourier Transform: Syllabus
No ratings yet
Fourier Transform: Syllabus
8 pages
Gujarat Technological University
No ratings yet
Gujarat Technological University
2 pages