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COA Model Paper -1 B.tech 2nd Year (1)

This document is a model paper for the B. Tech Computer Organisation and Architecture course for the academic year 2024-25. It outlines the course outcomes, sections of questions to be attempted, and various topics including processor organization, memory types, arithmetic operations, control unit design, and I/O communication. The paper consists of multiple sections with questions requiring brief answers, detailed explanations, and problem-solving related to computer architecture concepts.

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17 views2 pages

COA Model Paper -1 B.tech 2nd Year (1)

This document is a model paper for the B. Tech Computer Organisation and Architecture course for the academic year 2024-25. It outlines the course outcomes, sections of questions to be attempted, and various topics including processor organization, memory types, arithmetic operations, control unit design, and I/O communication. The paper consists of multiple sections with questions requiring brief answers, detailed explanations, and problem-solving related to computer architecture concepts.

Uploaded by

apoorvasujal0
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
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Download as PDF, TXT or read online on Scribd
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Subject Code: BCS 302

Roll No:

B. TECH
(SEM -III) MODEL PAPER -1 2024-25
COMPUTER ORGANISATION AND ARCHITECTURE
Time: 3 Hours Total Marks: 70
Course Outcome
CO1 Study of the basic structure and operation of a digital computer system.
CO2 Analysis of the design of arithmetic & logic unit and understanding of the fixed point
and floating-point arithmetic operations.
CO3 Implementation of control unit techniques and the concept of Pipelining.
CO4 Understanding the hierarchical memory system, cache memories and virtual
memory.
CO5 Understanding the different ways of communicating with I/O devices and standard
I/O interfaces.

Note: Attempt all Sections. If require any missing data; then choose suitably.
SECTION-A
1. Attempt all the following questions in brief. Marks (7x2=14)
Q. No. Question CO
Q1(a) What do you mean by processor organization? CO1
Q1(b) What are the different types of buses used in computer architecture? CO1
Q1(c) Explain Memory and its types. CO4
Q1(d) What are the different phases of an instruction cycle? CO3
Q1(e) List down the functions performed by a Input/Output Unit. CO5
Q1(f) Difference between 2D and 2.5D Memory Organization. CO4
Q1(g) Explain Micro operations. CO3

SECTION-B
2. Attempt any three of the following questions. Marks (3x7=21)
Q. No. Question CO
Q2(a) Show the systematic multiplication process of (20)×(-19) using booths CO2
algorithm.
Q2(b) What do you mean by Addressing Mode? Explain different types of CO1
Addressing Modes.
Q2(c) Explain RAM and ROM Chips with suitable diagram. CO4
Q2(d) Discuss the design of Input Output Interface. CO5
Q2(e) Difference between Hardwired and Microprgrammed Control Unit. CO3

SECTION-C
3. Attempt any one of the following questions. Marks (1x7=07)
Q. No. Question CO
Q3(a) Represent the following decimal number in IEEE Standard for floating CO2
point formats in a single precision method 32 bit representation method
(i) (-307.1875)
(ii) (65.175)
Q3(b) Design and explain 4 bit Carry look ahead adder. CO2

4. Attempt any one of the following questions. Marks (1x7=07)


Q. No. Question CO
Q4(a) What are Interrupts?How are they handle? CO5
Q4(b) What do you mean by asynchronous data transfer? CO5
5. Attempt any one of the following questions. Marks (1x7=07)
Q. No. Question CO
Q5(a) What is pipelining ? What are the different stages of pipelining? CO4
Q5(b) Explain the direct mapping technique. Consider a digital computer has a CO4
memory unit of 64k* 16 and cache memory of I k words. The cache uses
direct mapping with 4 block size of four words.
(i) How many bits are there in the tag. block and word fields ofthe
address format?
(ii) How man blocks can the cache accommodate?

6. Attempt any one of the following questions. Marks (1x7=07)


Q. No. Question CO
Q6(a) What do you mean by processor organization? råin various types of CO1
processor anization with suitable example.
Q6(b) Differentiate between Memory stack and Register stack. CO1

7. Attempt any one of the following questions. Marks (1x7=07)


Q. No. Question CO
Q7(a) Discuss the Memory Hierarchy in computer system with regard to Speed, CO4
Size and Cost.
Q7(b) Explain the various modes of data transfer and discuss direct memory CO5
access in detail.

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