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Tutorial 3

The document contains tutorial questions related to MOSFET circuits at DC, focusing on calculating voltages and currents in various configurations. It includes problems involving NMOS and PMOS transistors, with specific parameters and conditions for saturation and current sourcing. The questions require finding specific voltages and drain currents based on given input values and circuit configurations.

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0% found this document useful (0 votes)
8 views

Tutorial 3

The document contains tutorial questions related to MOSFET circuits at DC, focusing on calculating voltages and currents in various configurations. It includes problems involving NMOS and PMOS transistors, with specific parameters and conditions for saturation and current sourcing. The questions require finding specific voltages and drain currents based on given input values and circuit configurations.

Uploaded by

ishapramod1234
Copyright
© © All Rights Reserved
Available Formats
Download as PDF, TXT or read online on Scribd
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BIRLA INSTITUTE OF TECHNOLOGY & SCIENCE, PILANI K K BIRLA GOA CAMPUS

Microelectronics Circuits (ECE/EEE/INSTR F244) Tutorial on MOSFET circuits at DC

Question 1 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
All the transistors in the circuits shown in figure below have the same values of |Vt |, kn′ , W/L, and λ. Moreover,
λ is negligibly small. All operate in saturation at ID =I and |VGS |=|VDS |=1 V. Find the voltages V1 , V2 , V3 , and
V4 . If |Vt |=0.5 V and I = 0.1 mA, how large a resistor can be inserted in series with each drain while maintaining
saturation? If the current source I requires at least 0.5 V between its terminals to operate properly, what is the
largest resistor that can be placed in series with each MOSFET source while ensuring saturated-mode operation
of each transistor at ID =I? In the latter limiting situation, what do V1 , V2 , V3 , and V4 become?

+2.5 +1 +1

Q2
I

V1 V2

Q1
I

-1.5
(b)
(a)

+2.5 +1.5

Q4
I

V4
V3

Q3 I

-1.5
(c) (d)

ECE/EEE/INSTR F244 Page 1 of 2


ECE/EEE/INSTR F244 Page 2 of 2

Question 2 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
The NMOS and PMOS transistors in the circuit of figure below are matched with kn′ (Wn /Ln )=kp′ (Wp /Lp )=1
mA/V2 and Vtn = -Vtp = 1 V. Assuming λ=0 for both devices, find the drain currents iDN and iDP and the voltage
vO for vI =0 V, +2.5 V, and -2.5 V.

+2.5 V

QN
iDN
vI vo
iDP

QP 10 KΩ

-2.5 V

Question 3 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
The NMOS and PMOS transistors in the circuit of figure below are matched with kn′ (Wn /Ln )=kp′ (Wp /Lp )=1
mA/V2 and Vtn = -Vtp = 1 V. Assuming λ=0 for both devices, find the drain currents iDN and iDP and the voltage
vO for vI =0 V, +2.5 V, and -2.5 V.

+2.5 V

QP

iDP
vI vO
iDN

QN 10 kΩ

−2.5 V

ECE/EEE/INSTR F244 Page 2 of 2

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