QUESTION BANK

M.Sc. ELECTRONICS AND COMMUNICATION/ Digital Electronics,

Microprocessor and Microcontroller/PAPER: CCELC202
SEMESTER II
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Very Short Answer Type Questions

1. What are the three laws of Boolean Algebra?
2. Write the Boolean expression for De Morgan’s theorem.
3. Write an expression for an arbitrary standard Sum-of-Products for three variables A, B and
C.
4. Write an expression for an arbitrary standard Product-of-Sums for three variables A, B and
C.
5. What are ‘Invalid Codes’ in BCD?
6. What is Karnaugh map?
7. What is the importance of a PAIR in a Karnaugh map?
8. What is the importance of a QUAD in a Karnaugh map?
9. What is the importance of an OCTET in a Karnaugh map?
10. Draw a two variable Karnaugh map and label each cell of it in accordance with the binary
value.
11. Draw a three variable Karnaugh map and label each cell of it in accordance with the
binary value.
12. Draw a four variable Karnaugh map and label each cell of it in accordance with the binary
value.
13. Add the following BCD: 1001 and 0100.
14. Obtain OR gate using NAND gate.
15. Obtain AND gate using NOR gate.
16. What is ECL?
17. What is TTL?
18. The minimum number of selection inputs required for selecting one out of thirty-two inputs
is _________.
19. In a BCD adder _________ is added in case the sum is not a valid BCD number.
20. A 4-variable logic expression can be realized using single _________ multiplexer.
21. A decoder with 64 output lines has _________ data inputs.
22. Subtractors are designed using _________ ICs.
23. Why are shift registers considered basic memory devices?
24. Name two functions of a shift register.
25. State four differences between combinational circuits and sequential circuits.
26. What is meant by synchronous counter?
27. What is meant by asynchronous counter?
28. What is a ripple counter?
29. Determine the maximum number of binary states that a counter can have if it is constructed
with 3, 4, 5 and 6 flip-flops?
30. What is gated R-S latch?
31. What is decimal to BCD encoder?
32. What is a demultiplexer?
33. What is a multiplexer?
34. What are comparators?
35. What are identity checkers?
36. What is race condition?
37. What is a multiplexer tree?
38. What is multitasking?
39. What is an interrupt?

Short Answer Type Questions

1. What are the different rules of Boolean Algebra?
2. Discuss De Morgan’s Theorems. Show the Gate equivalencies and the corresponding truth
tables.
3. Determine the binary values for which the following standard SOP expression
is equal to 1:
𝐴𝐵𝐶𝐷 + 𝐴𝐵̅ 𝐶̅ 𝐷 + 𝐴̅𝐵̅ 𝐶̅ 𝐷
̅
4. Determine the binary values for which the following standard POS expression
is equal to 0:
(𝐴 + 𝐵 + 𝐶 + 𝐷)(𝐴 + 𝐵̅ + 𝐶̅ + 𝐷)(𝐴̅ + 𝐵̅ + 𝐶̅ + 𝐷 ̅)
5. Convert the following Boolean expression into standard POS form:
(𝐴 + 𝐵̅ + 𝐶)(𝐵̅ + 𝐶 + 𝐷 ̅ )(𝐴 + 𝐵̅ + 𝐶̅ + 𝐷
̅)
6. Convert the following SOP into an equivalent POS expression:
𝐴̅𝐵̅ 𝐶̅ + 𝐴̅𝐵𝐶̅ + 𝐴̅𝐵𝐶 + 𝐴𝐵̅ 𝐶 + 𝐴𝐵𝐶
7. Discuss the Universal Property of NAND gate.
8. Discuss the Universal Property of NOR gate.
9. Determine the truth table from the following standard POS expression:
(𝐴 + 𝐵 + 𝐶)(𝐴 + 𝐵̅ + 𝐶)(𝐴 + 𝐵̅ + 𝐶̅ )(𝐴̅ + 𝐵 + 𝐶̅ )(𝐴̅ + 𝐵̅ + 𝐶)
10. Convert the following Boolean expression into standard SOP form:
a. 𝐴𝐵̅ 𝐶 + 𝐴̅𝐵̅ + 𝐴𝐵𝐶̅ 𝐷
11. What do you mean by ‘Overlapping Group’ in Karnaugh map? Explain with one example.
12. What do understand by ‘Redundant Groups’ in Karnaugh map? Explain with an example.
13. What do you mean by Noise Margins. Explain with the help of voltage levels.
14. What is Emitter-coupled Logic (ECL)? Explain how high speed is achieved in it. Give the
specifications for an ECL circuit.
15. Show that a full adder can be constructed from three half adders.
16. Draw the circuit diagram of a full subtractor using XOR and NAND gates.
17. Draw a full adder circuit using only NAND gates.
18. How can you make a half subtractor using half adders?
19. How can you make a half adder using half subtractor?
20. A half adder is implemented with XOR and AND gate. A full adder is implemented with
two half adders and one OR gate. The propagation delay of an XOR gate is twice that of an
AND /OR gate. The propagation delay of an AND / OR gate is 1.2 µsec. A four bit ripple carry
binary adder is implemented by using full adders. The total propagation time of this 4 bit binary
adder in µsec is _________.
21. Consider a 4 to 1 line multiplexer with two select lines S1 and S0. The minimal SOP form
for the Boolean expression for the output F of the MUX is ___________________ ?

22. Suppose only one MUX and only one inverter are allowed to be used to implement any
Boolean function of n variables. What is the minimum size of the MUX needed?
a. 2n to 1 line
b. 2n-1 to 1 line
c. 2n+1 to 1 line
d. 2n-2 to 1 line

23. Design a 2-bit comparator using gates.

24. Design a 4-digit BCD adder using 7483 adders.
25. Consider the sequential circuit shown in the figure where both flip flops used are positive
edge triggered D flip flops. The number of states in the state transmission diagram of this circuit
that have a transition back to the same state on some value of ‘in’ is ________.

26. When the output Y in the circuit below is ‘1’ it implies that
a. data has changed from 0 to 1
b. data has changed from 1 to 0
c. data has changed in either direction
d. data has not changed

27. What is the function of address bus?

28. What is the function of control bus?
29. What is the function of instruction register (IR)?
30. What is the function of program counter (PC)?
31. What is the function of flag register ?
32. Name the general purpose registers?

Long Answer Type Questions

1. Explain different Laws and rules of Boolean Algebra.
2. Apply De Morgan’s Theorems to each of the followings:
̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅
a. (𝐴 + 𝐵 + 𝐶)𝐷
̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅
b. 𝐴𝐵𝐶 + 𝐷𝐸𝐹
c. ̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅
(𝐴̅ + 𝐵) + 𝐶𝐷
d. ̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅
(𝐴̅̅̅̅̅̅̅̅
+ 𝐵 ) + 𝐶̅
3. Using the Boolean Algebra techniques, Simplify the followings:
a. 𝐴𝐵 + 𝐴(𝐵 + 𝐶) + 𝐵(𝐵 + 𝐶)
b. [𝐴𝐵̅ (𝐶 + 𝐵𝐷) + 𝐴̅̅̅̅ 𝐵]𝐶
c. 𝐴𝐵𝐶 + 𝐴𝐵 𝐶 + 𝐴𝐵 𝐶̅ + 𝐴𝐵̅ 𝐶 + 𝐴𝐵𝐶
̅ ̅ ̅ ̅ ̅
d. ̅̅̅̅̅̅̅̅̅̅̅
𝐴𝐵 + 𝐴𝐶 + 𝐴̅𝐵̅ 𝐶
4. What are Karnaugh Maps? Draw separately two variable, three variable and four variable
Karnaugh maps and label each cell according to its binary value.
5. What are Karnaugh Maps? Explain Pair, Quad and Octet with examples and show how
they are useful in logic simplification.
6. What is Don’t Care condition in Karnaugh Map? Explain with a practical example.
7. What is BCD? Perform the following BCD addition:
a. 1001+0100
b. 1001+1001
c. 00010110+00010101
d. 01100111+01010011
8. What are logic gates? Discus the various Basic gates, Universal gates and Special gates
along with their truth table and logic implementation.
9. What are different Logic families? Discuss Transistor-Transistor Logic (TTL)
characteristics.
10. Draw and describe the three input Transistor-Transistor Logic (TTL) NAND gate.
11. What do you mean by Emitter Coupled Logic (ECL)? Describe a basic ECL circuit for
two-input NOR gate.
12. Write short notes on:
a. Transistor-Transistor Logic, TTL
b. Emitter Coupled Logic, ECL
13. Sketch the circuit of R-S latch using NAND gates and explain its operation with the help
of timing diagram and the truth table.
14. Describe a positive edge triggered R-S flip flop.
15. With the help of truth table and circuit diagram briefly describe the trigger operation in a
J-K flip flop.
16. Draw the block diagram if a three-stage synchronous binary counter. Explain its
functioning and draw the timing diagram.
17. What are the functions of a shift register? Explain how a flip flop can be used as a storage
element.
18. What are the different ways of shifting data through shift registers? Explain.
19. Implement a fine bit serial in serial out shift register using D flip flops. Assuming the flip
flop to be initially cleared (all zeroes), show the output states for a particular data input and
clock waveform.
20. Show that a full adder can be constructed using two half adders and an OR gate.
21. Design a full adder using 8 : 1 line multiplexer ICs.
22. Design a BCD to gray code converter using
a. 8 : 1 line multiplexers
b. dual 4:1 line multiplexers and some gates
23. Realise the following functions of four variables using (a) 8 : 1 line multiplexers (b) 16:1
line multiplexers
a. f1 = ∑m (0, 3, 5, 6, 9, 10, 12, 15)
b. f2 = ∑m (0, 1, 2, 3, 11, 12, 14, 15)
24. Design a 40 : 1 line multiplexer using 8 : 1 line multiplexers.
25. Design a 1 : 40 line multiplexer using BCD to decimal decoders.
26. Design a one-digit BCD to binary converter using 74184.
27. Design a 4-bit binary up / down ripple counter with a control for up / down counting.
28. Explain the operation of 4 stage JOHNSON counter in detail.
29. Demonstrate the operation of a ring counter using IC 7495A.
30. Explain in detail the operation of IC 74147 as a decimal priority encoder.
31. What are multiplexers? Explain in detail the functioning of a 16 line to 1 line multiplexer
(IC74150). What do you understand by MUX tree?
32. Explain giving truth table the operation of a 1 line to 16 line demultiplexer (IC 74154).
33. Draw the simplified block diagram of the central processing unit of a microprocessor and
explain its various parts.
34. What is meant by addressing mode? Describe the various addressing modes of 8085.
35. What is an instruction set? Explain 1-byte, 2-byte and 3-bypte instruction sets with suitable
examples.
36. Explain the operation of a direct memory access (DMA).
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