Flexible Circuit Design Guide

Fourth Edition

Printed Circuit Technology Business Unit

110 Lowell Road, CS 68, Hudson, New Hampshire 03051
Tel: (603) 889-6191 • Fax: (603) 882-4457

© 1999 Teledyne Electronic Technologies

OEMM November 1999
Printed in USA
Teledyne Electronic Technologies
Leading the interconnection field since 1963.
Teledyne Electronic Technologies (TET), formerly by contributing to a multitude of military and
Teledyne Electro-Mechanisms, has been a leader in commercial applications. In addition to the standard
the field of interconnection technology since its circuits we have produced for many years, TET is
incorporation in 1963. At that time we designed and continuing to develop new and better products in the
manufactured innovative single layer flexible flexible circuit and multilayer rigid-flex
circuits and unique multilayer rigid-flex harnesses marketplace.
to support the NASA Saturn V program.
Teledyne is committed to assisting our customers
Throughout the years our design engineers and from design development right through prototypes
manufacturing personnel have worked together and production. This commitment includes a fully
perfecting solutions to staffed engineering
customer design challenges department utilizing the
from the simplest single layer latest CAD/CAM/CIM
applications to the most systems for circuit design,
complex interconnection document creation, artwork
systems. TET is proud to generation, and drill/rout
hold numerous process program creation. Our
patents related to flexible product engineers specialize
circuit manufacturing. in optimizing available
tooling systems to help
Today we continue to be in control costs.
the forefront of the industry

Teledyne Electronic Technologies

Printed Circuit Technology Business Unit
Printed Circuit Technology Business Unit 110 Lowell Road, CS 68
110 Lowell Road, CS 68
Hudson, New Hampshire 03051
Hudson, New Hampshire 03051
Tel: (603) 889-6191
Tel: (603) 889-6191
Fax: (603) 882-4457
Fax: (603) 882-4457
Email: [email protected]
Email: [email protected]
 Table of Contents

Table of Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .3

Design Guide Purpose and Use . . . . . . . . . . . . . . . . . . . . . . . . . . . .6

Purpose of this Design Guide — Designing for Manufacture . . . . . . . . 7
What the designer needs to know . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7

Flexible Circuits . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .9
What Is a Flexible Circuit? . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
The Benefits of Flexible Circuits and How To Evaluate Them . . . . . . . 12
Major Types of Flexible Circuits . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Single-Sided Flexible Circuits . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Access Methods . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Single Access Uncovered . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Single Access Covered. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Double Access Covered . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Double-Sided Flexible Circuits . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Multi-layer Flexible Circuitry . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Rigid-Flex Circuitry. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
REGAL® Flex . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
REGAL® Flex 1 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
REGAL® Flex 5 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Multi-Chip Modules (MCM) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22

Materials. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .24
Conductive Materials . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
Surface Treatments . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
Foil Grades . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
Other Metals Used in Printed Wiring Boards . . . . . . . . . . . . . . . . . . 27
Flexible Dielectric Materials . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
Uses of Dielectric Films . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28
Adhesives . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28
Thermoset Flexible Adhesives . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28
Modified Acrylic Adhesive . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28
Epoxy Adhesives . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
Reinforced Adhesive Materials . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30
Pre-Impregnated Epoxy Glass . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30
Pre-Impregnated Polyimide Glass . . . . . . . . . . . . . . . . . . . . . . . . . 30
Adhesiveless Materials . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30
Soldermask . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30
Flexible Soldermasks . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32

3
 Electrical Design . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .33
Conductor Thickness and Width . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34
Conductor Spacing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36
Temperature Rise vs. Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36
Shielding. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37
Dielectric Properties. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37
Characteristic Impedance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37
Calculations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39
High Frequency Lines. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39
Micro-Strip . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39
Stripline . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40
Notes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40
Distributed Capacitance. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40

Mechanical Design . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .43

Folding and Bending . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 45
Continuous Flexing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 45
Bend Radii. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 45
Flex Section Length . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 46
To Calculate Flex Length For 90° Bend . . . . . . . . . . . . . . . . . . . . . . . . . 46
To Calculate Flex Length For 180° Bend . . . . . . . . . . . . . . . . . . . . . . . . 47
Fold Areas . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 48
Tear Stops . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 48
Terminal Baring . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 49
Circuit Periphery . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 49
Shock and Vibration Considerations . . . . . . . . . . . . . . . . . . . . . . . . . . . 49
Rigid Reinforcement . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50
Tolerances . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50
Plated-Through Holes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 51
Non-Plated-Through Holes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 52
Surface Mount Components . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 52
Multi-Chip Modules (MCM) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 52
General Design. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 52
Materials . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 52
Thermal Considerations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 53
Simplified Thermal Analysis . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 54
Board Layout . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 55
Component or Die Placement . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 56
Wire Bonding to MCM-L Substrates. . . . . . . . . . . . . . . . . . . . . . . . . . 57

Artwork Design . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .58

Automated Artwork . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 60
Supplied Artwork . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 60
General Artwork Design Rules . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 60
Conductor Widths . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 60
Conductor Spacing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 60
Conductor Routing. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 61
4
 Terminal Construction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 62
Annular Ring. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 62
Termination Pad Design for Non-Plated-Through Holes.. . . . . . . . . 63
Nomenclature Artwork and Component Designation . . . . . . . . . . . 63

Design Checklists . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .64

Electrical Design Checklist . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 65
Mechanical Design Checklist . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 65
Fold Areas. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 65
Circuit Profile . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 65
Stiffeners and Reinforcements . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 65
Tolerances . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 65
Environmental . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 66
Artwork Design Checklist . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 66
Conductors . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 66
Shielding. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 66
Terminal Pads. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 66

Glossary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .67

Industry Specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .78

5
© 1999/2000 Teledyne Electronic Technologies

1 Design Guide
Purpose and Use
 © 1999/2000 Teledyne Electronic Technologies

Design Guide Purpose and Use

Purpose of this Design Guide — designer must fully understand the electrical properties
Designing for Manufacture of the system, such as current maximums, voltages,
types of signals (video, digital, RF, etc.), shielding con-
This Design Guide is provided to assist you in designing siderations, impedance characteristics, and capacitance
the most cost-effective flexible circuits for your elec- limitations. It is essential to define the circuit compo-
tronic packaging needs. It is our belief that designers nents selected, including connectors. To assist the
who are aware of the processes used in the manufacture manufacturer, the location of all components should be
of flexible printed circuits will be rewarded by a circuit included. Also necessary is a detailed wire listing, net
design that will effectively make use of all the advan- list and schematic. To allow the manufacturer the great-
tages that these types of electronic interconnects have to est amount of flexibility, only terminal areas, rather than
offer. specific pin-to-pin conductor runs, should be specified.
This Design Guide is meant to be a reference for the This provides the manufacturer the necessary freedom
electrical, mechanical, and artwork considerations to keep the circuit crossover points to a minimum, and
which must be addressed when designing a flexible cir- reduce the total number of circuit layers necessary.
cuit. As needed, the materials and processes used in Please refer to the section of this guide titled Electrical
their manufacture are described in detail so that Design for assistance in meeting the electrical concerns
informed tradeoffs and design decisions can be made. of your design. If you choose to have Teledyne’s experi-
By following the guidelines presented here, your design enced staff of electromechanical designers provide a
will be both cost-effective and producible. When used as finished design, it will be necessary to provide the elec-
a design reference, this Design Guide is not meant to trical parameters listed above to assure an electrically
override any existing military specifications or commer- sound design.
cial preferred design practices, but supports them both. After the electrical parameters are defined, the overall
The information contained herein is based on Teledyne physical requirements of the system must be deter-
Electronic Technologies’ extensive experience as a mined. As a minimum, the designer should be provided
designer and manufacturer of quality flexible and rigid- with dimensioned prints of the unit and appropriate
flex circuitry. cross-sectional views. Dimensioned prints should be
As you prepare to embark on a flexible circuit design clear and detailed to avoid costly tooling errors. On all
program, Teledyne Electronic Technologies’ design and prototype designs for fit evaluation only, Teledyne’s
engineering staff is on call to assist you. Please contact product engineers will minimize tooling costs by taking
us with any questions regarding your electronic packag- the necessary steps.
ing needs. The design of a flexible circuit interconnection system is
facilitated by using an actual unit or an accurate mock-
What the designer needs to know up, or by using three dimensional software programs
There are many parameters that must be determined such as AutoCad or Pro-E™, rather than relying solely
before beginning an electromechanical design incorpo- on dimensioned prints. By using a box, a series of Mylar
rating flexible or multi-layer flexible circuitry. The or paper “dolls” can be made to determine mechanical

Figure 1-1. “Mylar doll” cutout

7
© 1999/2000 Teledyne Electronic Technologies

Design Guide Purpose and Use

approaches and general configurations. The unit or long enough to allow access to the inside of the unit but
mock-up should have all the required hardware installed should not interfere with any other components when
to make the design complete and prevent physical inter- installed. Refer to Figure 1-2.
ference. Refer to Figure 1-1. The flex harness must be The final consideration is the environmental conditions
designed to fit the general assembly sequence of its unit, to which the system will be subjected. Thermal rises,
so the cables do not cover any components that may atmospheric conditions, humidity, vibration, and han-
require service or replacement. Cables should not be dling are all environmental factors that can influence
routed over an area where a component must be design criteria. Adequate strain relief and sealing must
installed after the assembly is completed. If the flexible be provided for moisture and vibration applications. If
section of the unit will be designed to flex when the box the unit is subjected to constant thermal cycling, special
is opened, then an adequate “service loop” should be consideration must be used when choosing insulating
incorporated in the design. This service loop should be and bonding materials.

Enclosure

Connectors

Service Loop

Connectors
Flexible Circuit

Figure 1-2. A service loop should be used when opening the package results in circuit flexing.

8
© 1999/2000 Teledyne Electronic Technologies

2 Flexible Circuits
© 1999/2000 Teledyne Electronic Technologies

Flexible Circuits

Chapter Terms
Annular Ring: That portion of a conductive material Flexible Printed Wiring: A patterned arrangement of
completely surrounding a hole. printed wiring and components that utilizes a flexible
Barrel Cracks: Cracks that appear in the electro-plat- base material with, or without a flexible cover lay. See
ing inside a plated through hole due to mechanical and Flexible Printed Circuit.
thermal stresses. Glass Transition Temperature (Tg): The temperature
Basestock: The insulating material upon which a con- at which an amorphous polymer, or the amorphous
ductive pattern may be formed. regions in a partially-crystalline polymer, changes from
being in a hard and relatively brittle condition, to being
Base Material: See Basestock. in a viscous or rubbery condition.
Blister: Delamination in the form a localized swelling Hold-Down Tabs: Conductive tabs extending from the
and separation between any of the layers of a laminate outside of an annular ring or other termination pad used
base material, or between base material and conductive to help secure the pad to the substrate.
foil or protective coating.
Interfacial Area: The boundary between the flexible
Coefficient of Thermal Expansion (CTE): The linear and rigid sections of a rigid-flex circuit assembly.
dimensional change of a material per unit change in
temperature. Modified Acrylic Adhesive: An adhesive material com-
monly used in multi-layer flexible circuits.
Covercoat, Cover Lay or Cover Layer: The layer of
insulating material that is applied over a conductive pat- Multilayer Printed Board: The general term for a
tern on the outer surface of a printed circuit. Used for printed board that consists of rigid or flexible insulation
electrical insulation and environmental sealing. materials and three or more alternate printed wiring and/
or printed circuit layers that have been bonded together
Delamination: A separation between plies within a base and electrically interconnected.
material, between a base material and a conductive foil,
or any other planar separation within a multi-layer Multilayer Printed Circuit Board Assembly: An
printed board. See also Blister. assembly that uses a multi-layer printed circuit board for
component mounting and interconnecting purposes.
Dielectric: A material with a high resistance to the flow
of electrical current. Plated-Through Holes: A hole with plating on its walls
that makes an electrical connection between conductive
DIP/Dual-in-Line Package: An IC package having patterns on internal layers, external layers, or both, of a
pins that protrude through the substrate on which it is printed board.
mounted. Electrical connection is usually made by sol-
dering to the reverse side of the substrate to which the Polyimide: A dielectric film material commonly used
device is mounted. for flexible circuit fabrication as an insulating layer.
Double-Sided Printed Board: A printed board with a Resin Recession: The presence of voids between the
conductive pattern on both of its sides. parallel of a plated-through hole and the wall of the hole
as seen in microsections of plated-through holes that
Electro-deposited (Copper): The deposition of a con- have been exposed to high temperatures.
ductive material (copper) from a plating solution by the
application of electrical current. Rigid-Flex Printed Board: A printed board with both
rigid and flexible base materials.
Epoxy Prepreg: A glass impregnated epoxy adhesive
material used to bond multiple layers, with high Single-Sided Printed Board: A printed board with a
mechanical stability in all axes. conductive pattern on one of its sides.
Etching: The chemical, or chemical and electrolytic, SMD/Surface Mount Device: Any active or passive
removal of unwanted portions of conductive or resistive component packaged such that electrical and mechani-
material. cal contact is achieved on the top surface only of the
substrate on which it is mounted.
Flexible Printed Circuit: A patterned arrangement of
printed circuitry and components that utilizes a flexible Terminal Pad: A portion of a conductive pattern that is
base material with, or without a flexible cover lay. See usually used for making electrical connections, for com-
Flexible Printed Wiring. ponent attachment, or both.

10
© 1999/2000 Teledyne Electronic Technologies

Flexible Circuits

Through-Hole Technology: Techniques used to con- Vias: A plated-through hole that is used as an interlayer
nect electrical components to a conductive pattern by connection, but in which there is no intention to insert a
the use of component holes. component lead or other reinforcing material.
Vertical Pins: A type of termination which connects
two conductor runs in a solder assembly where the runs
are in two different layers.

11
© 1999/2000 Teledyne Electronic Technologies

Flexible Circuits

What Is a Flexible Circuit? ble circuitry and rigid-flex circuits have a higher degree
of reliability because of the decreased need for intercon-
In its simplest form, a flexible circuit is a pattern of con- nection hardware normally used in conventional elec-
ductors printed on a flexible dielectric (insulating) film. tronic packaging. Flexible circuit packaging reduces the
The technology to print electronic circuits on flexible chance of human error in installation and permits highly
materials was developed in the 1950’s in response to the repeatable production assembly.
Space Program’s need to save weight and space. The
relatively simple single-sided and double-sided circuits
from that time have evolved into multi-layer circuits and
The Benefits of Flexible Circuits and
combination rigid-flexible circuit assemblies which pro- How To Evaluate Them
vide total electronic packaging solutions. Applications In addition to the savings in assembly time, weight,
for flexible circuits today span the full scope of the elec- space and cost, the flex conductor’s flat form provides
tronics marketplace — from military and aerospace, to about 50% more surface area than a round wire of
telecommunications and computers; from industrial equivalent cross-section. This provides greater heat dis-
controls and process equipment, to automotive instru- sipation and a higher current carrying capacity. Smaller
mentation; from consumer goods to toys. The expanding conductor widths using lighter weight materials and
application for this technology fuels its evolution as a very thin insulating materials can be used to carry the
cornerstone in the quest for better electronic packaging. same current to further aid in weight and volume reduc-
Adhesive tions. The overall reduction in weight and volume
expected can be up to 70% as compared to a similar
design using conventional round wiring harness meth-
Lamination Rolled Annealed
Copper ods.
Subtractive Despite the advantages, not every packaging problem
Etching can be economically solved by the use of flexible cir-
Dielectric
Film Substrate cuitry. There are several factors that must be examined
to be sure that this type of packaging would be the most
cost-effective and still meet all mechanical, electrical,
and thermal parameters. If cost is a major concern, then
the total installed cost of the competing interconnect
Adhesive, Acrylic
system must be considered against using flexible cir-
Copper Foil/Conductor cuitry in the electronic interconnect system. A correctly
Insulation, Polyimide
designed flexible or multi-layer flexible circuit can
reduce not only weight and volume, but also the amount
Figure 2-1. Basic flexible circuit construction. of connectors and other independent connection
devices. The combined costs of the procurement, stor-
Flexible circuitry can be designed to achieve maximum age and assembly of all these independent pieces must
savings in assembly time, weight, space and cost. Flexi- factor into any cost evaluation.

Figure 2-2. Comparison of “before” and “after” designs. Figure 2-3. Quality engineered appearance example.

12
© 1999/2000 Teledyne Electronic Technologies

Flexible Circuits

Overall circuit complexity and the total number of cir- encapsulating the conductors to provide electrical insu-
cuits that will be required must also be considered. If a lation and protection from the environment. The design
circuit design is relatively simple, if total volume is low, of a layer of circuitry for a single layer can be as simple
and if space is available, conventional interconnect as a solid copper plane with only one solderable connec-
methods would likely be the most cost-effective. How- tion, to a multitude of conductors and terminal pads
ever, if the circuit is more complex, consisting of many spread over a sheet as large as 24 X 30 inches (610 X
signals or requiring specific electrical or mechanical 762 mm). Multiple single layers can be used together to
requirements, then flexible circuitry would be the better make a complex assembly that consists of interconnects
design choice. using either pins, connectors or other electrical compo-
nents. Single-sided circuits can be supplied in different
Major Types of Flexible Circuits ways to meet specific application needs. Refer to Figure
2-4.
Flexible circuits can be designed and manufactured to
meet a wide variety of interconnect requirements. From
the simplest single-sided circuit, to multi-layer circuits
with 40 layers or more, each is constructed using the
same materials and techniques. Their materials and con-
struction are described below.

Single-Sided Flexible Circuits

Single-sided flexible material with or without shield(s)
or stiffener(s) (one conductor layer)
Adhesive, Acrylic
The single layer flexible circuit is the simplest and easi-
Copper Foil/Conductor
est to manufacture and is used primarily for point-to-
point wiring. A wide choice of conductor thickness, Insulation, Polyimide
widths and shapes, as well as connector attachments and
termination pads are available. It is usually constructed Figure 2-4. Single-sided circuit construction.
of a single layer of copper foil laminated to a flexible
There are three basic types of single-sided flexible cir-
substrate insulating dielectric film. Another layer of
cuits, presented in order of increasing cost – single
flexible dielectric film, known as the covercoat, is lami-
access uncovered, single access covered, and double
nated to the imaged and etched copper substrate,
access covered. Each is described as follows.

THE BASICS
BASIC FLEX CIRCUIT MATERIALS
There are a number of materials used in the manufacture of material using an adhesive film. The copper foil is typically
flexible circuits. Please refer to the Materials Section for coated with a photo-sensitive layer which results in the
detailed information regarding these materials. This is basic desired pattern of conductors and termination pads after
information on the material types used to aid in an under- exposure and etching processes.
standing of this section on the types and construction of Dielectric or Insulator Film — Dielectric or insulating
flexible circuits. films are used to provide the base on which the copper foil
There are three fundamental types of materials used in fab- conductor layer(s) are attached. The most common dielec-
ricating flexible circuits — conductor, dielectric or insulator tric film material is polyimide.
film, and adhesive. Each is described below. Adhesives — Adhesive films provide the material to bond
Conductors — Copper foil is the conductor material of the copper foil to the base film. An adhesive film layer is
choice with the electrical and physical properties necessary sandwiched between the copper foil and dielectric base
to withstand both the manufacturing processes and the envi- film, and the multi-layer “sandwich” is laminated using
ronments in which flexible circuits are typically used. The heat and pressure.
copper foil is bonded to a base dielectric or insulator film

13
© 1999/2000 Teledyne Electronic Technologies

Flexible Circuits

Access Methods Single Access Covered

Access to a pattern is accomplished in one of two ways, Circuits made using this method are the same as the sin-
depending on whether access to one or both sides of a gle access uncovered, except for a flexible dielectric
pattern is required. Each method is described as follows. film laminated to encapsulate the conductors for both
To gain access to one side of a pattern, holes are pre- electrical insulation and protection from the environ-
drilled in the base dielectric film or covercoat prior to ment. The pre-drilled holes are aligned to the terminal
laminating the copper foil. The artwork pattern must be pads prior to covercoat lamination to provide access to
accurately positioned to match the location of the pre- the pads. Refer to Figure 2-7.
drilled holes from the copper side. Since the operator Double Access Covered
cannot see the pre-drilled holes through the copper, this This type of single layer circuit, known also as reverse
alignment must be accomplished using alignment pins. bared, is the most expensive of the three single-sided
The circuit is then covercoated using a pre-drilled cover- assembly techniques. It allows access to a circuit from
coat in the same manner as a single access covered cir- both sides, while also providing the environmental pro-
cuit. Refer to Figure 2-5. tection of insulating material on both sides of the copper
Registration Pin conductors. Refer to Figure 2-8.
Access to both sides of a single layer flexible circuit is
Artwork achieved by milling the covercoat material from the
Copper base material with a laser after the covercoat is applied.
Base Film This process will yield near-perfect registration to the
pad, but is tedious and time consuming. Both of these
Figure 2-5.Access Methods methods increase the circuit cost because of increased
labor and decreased yields. Refer to Figure 2-5.
Single Access Uncovered
There are several folding techniques that can be
This type of single layer flexible circuit is the most inex- employed to reduce or eliminate the need for reverse
pensive. It consists of a base dielectric film and copper baring of the solder pads. Each reduces or eliminates the
foil that is imaged and etched. Because there is no pro- need for reverse baring of the solder pads by physically
tective covercoat laminated to the etched pattern, the moving the bottom access to the top plane. These meth-
expense of the covercoat and processing is eliminated. ods are shown in Figure 2-9 and should be considered
This type of circuitry is normally used in applications prior to designing a circuit requiring reverse baring.
where the circuit will not be exposed to an adverse envi-
ronment or to harsh mechanical abuse. Typical applica-
tions are telephones, toys and other consumer goods
which are typically small, enclosed items. Refer to Fig-
ure 2-6.

Pre-drilled Access Hole

Insulation, Polyimide
Copper Foil/Conductor
Copper Foil/Conductor
Insulation, Polyimide and Acrylic Adhesive Insulation, Polyimide and Acrylic Adhesive

Figure 2-6. Single access uncovered circuit construction. Figure 2-7. Single access covered circuit construction.

14
© 1999/2000 Teledyne Electronic Technologies

Flexible Circuits

a) Pre-drilled hole access b) Laser ablation

Copper Foil/Conductor
Copper Foil/Conductor Insulation, Polyimide and Acrylic Adhesive
Insulation, Polyimide and Acrylic Adhesive

Figure 2-8. Double access covered circuit construction; a) pre-drilled hole access; b) laser ablation.

Double-Sided Flexible Circuits lizes conductors on both sides of the dielectric substrate
for more efficient packaging. The conductors can be
Double-sided flexible material, with or without shield(s)
connected electrically by using plated-through hole
or stiffener(s) (two conductor layers); with plated-
technology. A flexible insulating dielectric is used to
through holes
encapsulate the etched pattern to provide electrical insu-
A double-sided flexible circuit allows for more complex lation and protection from the environment. This cover-
point-to-point wiring using almost the same space as a coat material must have the terminal location hole
single-sided flex circuit. Double-sided circuits consist of drilled prior to lamination to allow access to the termi-
a flexible base dielectric material with copper foil lami- nal pads. Refer to Figure 2-10.
nated to both surfaces. This allows for a design that uti-

Pre-drilled hole
in covercoat Plating forms “tube”, electrically
connecting conductor layers.

Plated-through Hole
(Detail)

Adhesive, Acrylic

Copper Foil/Conductor

Insulation, Polyimide

Conductive Plating

Figure 2-9. Techniques used to reduce need for reverse Figure 2-10. Double-sided flexible circuit construction.
baring of solder pads.

15
© 1999/2000 Teledyne Electronic Technologies

Flexible Circuits

When the circuit is designed to use plated-through conductor configurations and terminations. They can be
holes, hold-down tabs on the terminal pads are not nec- designed with as few as four layers, or to 24 or more
essary, since the plating provides support to the pad layers. Each of these types is discussed separately to
area. This means that a higher density design can be show their particular benefits and constraints.
achieved in the termination area without violating any Multi-layer flexible circuits consist of multiple single-
conductor-to-pad spacing requirement. Unsupported or or double-sided flexible circuits laminated together to
non-plated pads require hold-down tabs to provide the form an integral component. They can be bonded over
necessary mechanical support. their entire surface or bonded only in selective regions
Multi-layer Flexible Circuitry to allow increased flexibility, as shown in Figure 2-11.
Multi-layer flexible material, with or without shield(s) When fully bonded, multi-layer circuits become
or stiffener(s) (more than two conductor layers); with increasingly less flexible as the number of conductive
plated-through holes layers increases. Full bonding is recommended only
with four or fewer layers. When more layers are
Multi-layer circuits allow very high density packaging required, the bonding adhesive should be removed in
using complex point-to-point wiring. They can integrate sections designed to bend or form.
systems requiring multiple interconnections into one
unit, thereby reducing assembly time, cutting weight A variety of insulating materials is available for inner-
and volume, and increasing reliability. Typical applica- layer substrate and covercoating of the flexible layer.
tions for these types of circuits are those that must have The most commonly used is polyimide film, which is
shielded conductors, where impedance control is neces- available in thicknesses ranging from 0.001" to 0.005"
sary, or where several layers of circuitry must access (25µm to 125µm), with modified acrylic adhesive thick-
different areas. Because all holes can be drilled and nesses ranging from 0.001" to 0.003" (25µm to 75 µm).
plated-through, a designer can access several internal Other thicknesses are available at extra cost, but should
pads or circuit layers on each connector pin without be considered only for special requirements.
having to use multiple soldering operations. Refer to The most common copper weights used in multi-layer
Figure 2-11. flex circuits are 1 oz. (35µm) and 2 oz. (70µm); Tele-
Multi-layer flexible circuits can be designed to meet dyne has produced circuits using 6 oz. (210µm) copper.
most of the electrical, mechanical and environmental Since flexibility decreases as the copper weight
conditions found in both military and commercial appli- increases, designs should specify the thinnest copper
cations. These technologies provide a wide choice of possible without compromising electrical requirements.
The various methods of processing multi-layer flexible
Plated-through Hole circuits each have their advantages and disadvantages.
In fully bonded circuits for example, double adhesive-
coated insulating material, usually polyimide film, can
be used to bond layers together, which eliminates the
Four-layer
need for covercoating individual layers, cutting both
Circuit material and labor cost. But, as previously noted, the
number of layers that can be laminated together and still
maintain flexibility is limited. To achieve flexibility with
higher layer counts, selected areas are left unbonded.
Those areas which are bonded, however, must do so
Copper Foil/Conductor Plated-through Hole where the layers are already covercoated using a modi-
(Detail) fied acrylic adhesive. This is a significant source of
Insulation, Polyimide
mechanical failure because the bond strength between a
(Adhesive not shown for clarity) processed polyimide film covercoat and acrylic adhesive
is marginal and subject to delamination. In addition, the
acrylic adhesive is thermally unstable in regards to low
Tg, and high CTE. When used in a board requiring
plated-through hole processing, this introduces a variety
Conductive Plating of problems ranging from barrel cracks to resin reces-
sion. These problems compound as circuit thickness
Figure 2-11. Multi-layer circuit construction.

16
© 1999/2000 Teledyne Electronic Technologies

Flexible Circuits

increases due to the added acrylic adhesive. To ensure as four layers, or to 24 or more layers. Refer to Figure
thermal stability, materials are used which possess very 2-12.
high glass transition temperatures (Tg) and low coeffi- A rigid-flex circuit consists of multiple flexible wiring
cient of thermal expansion (CTE). Please refer to the layers, selectively bonded together using an adhesive. A
discussion of REGAL® Flex later in this section for the cap layer of rigid core, copper clad laminate is bonded
best procedure for designing a thermally stable multi- to the top and bottom of the circuit to further add stabil-
layer flexible circuit. ity to the bonded areas. It is in these bonded areas that
the circuit board will be drilled and plated-through to
Rigid-Flex Circuitry provide the necessary Z-axis interconnects between the
Multi-layer, rigid and flexible material combinations flexible wiring layers. Components are mounted on
(more than two conductor layers); with plated-through rigid sections. Figure 2-12 shows the traditional con-
holes struction used for most applications.
Rigid-Flex circuits, like multi-layer circuits, allow very As shown in Figure 2-13, the flexible printed wiring
high density packaging using complex point-to-point (inner) layers consist of a flexible base dielectric with
wiring, can integrate systems requiring multiple inter- rolled annealed copper bonded on one or both sides.
connections into one unit, and can provide significant Because of its grain structure, rolled annealed copper is
reductions in assembly time, weight, and volume, while more flexible than electro-deposited copper. After this
increasing reliability. Typical applications for rigid-flex substrate is imaged and etched using conventional pro-
circuits are the same as for multi-layer circuits. Unlike cessing equipment, a cover layer dielectric is applied to
multi-layer circuitry, rigid-flex circuits can have both encapsulate the copper traces. This covercoat electri-
surface-mount and through-hole components mounted cally insulates the conductors and shields them from the
in rigidized areas without risking damage from flexing. environment.
Again, like multi-layer circuits, rigid-flex circuits can be Rigid-flex assemblies can only be manufactured using
designed to meet most of the electrical, mechanical and this process and these materials in limited quantities.
environmental conditions found in both military and The flexible dielectric materials used in their manufac-
commercial applications, providing a wide choice of ture have properties that make these materials unsuitable
conductor configurations and terminations, with as few for multi-layer processing. First, the acrylic adhesive
Rigid
Section
Rigid Cap Material Flex
Section

Double-sided
Innerlayer* Rigid
Section
Flex
Rigid Section
Section

Double-sided
Innerlayer*
*(adhesive not
shown for
clarity)

Rigid Cap
Material

Bond Film Adhesive Copper Foil/Conductor

Copper Foil/Conductor Insulation, Polyimide and Acrylic Adhesive

Insulation, Polyimide and Acrylic Adhesive

RigidCap Material

Figure 2-12. Traditional rigid-flex circuit construction. Figure 2-13. Traditional rigid-flex innerlayer construction.

17
Flexible Circuits

Material

Acrylic
Adhesive
Epoxy
Prepreg
Polyimide
Film
Polyimide
Prepreg
High Tg
Epoxy
Prepreg

m
l
© 1999/2000 Teledyne Electronic Technologies

Material Characteristics

Moisture
Absorption
(% by
Weight)

2.2

1.33

0.7

1.75
CTE
Z Axis
(ppm/
°C)

425

85

48

55

70

for both moisture absorption and CTE.

Tg
(°C)

40

130

390

210

170

Table 2-1. Shows comparative data for several materials

has a high moisture absorption characteristic of approxi-

mately 4% by weight. The polyimide film also absorbs
moisture, but at a lower rate of approximately 3% by
weight. Moisture absorption affects the multiple layers
in two ways. The basestock itself is unstable in the X
and Y axis because of the growth and shrinkage of the
material due to the moisture content, leading to a layer-
to-layer registration problem during lamination on high
density circuit boards. Moisture also affects the quality
of the circuit board by outgassing during extreme ther-
mal rises, such as soldering. Outgassing of moisture
causes delamination, resin recession and “blow outs” in
the plated-through holes. Moisture can be driven out of
the material by proper pre-baking of the circuit prior to
any temperature excursions.
Another property of the acrylic adhesive that makes it
unsuitable for use in multi-layer boards is its high coef-
ficient of thermal expansion (CTE) above its glass tran-
sition temperature (Tg) — the CTE of acrylic is
approximately 425 ppm/°C as compared to 70 to 85
ppm/°C for most epoxy prepreg materials. This high
CTE means that the material has a high Z-axis expan-
sion rate. During thermal rises the acrylic adhesive
expands at a higher rate than the other materials used in
the construction. Defects such as barrel cracks, outer
layer pad lift, and delamination can result from the ther-
mal instability of the acrylic adhesive.

18
To achieve increased reliability and higher layer counts,
the amount of acrylic adhesive must be limited or
eliminated in the rigidized areas. This can be accom-
plished by processing the innerlayer basestock on a
polyimide/acrylic base and then using a selective cover-
coating method whereby the polyimide/acrylic adhesive
material is laminated in the flex area only. The conduc-
tor traces in the board area are covercoated using an
epoxy prepreg. Refer to Figure 2-14.

Rigid
Section
Flex
Section
Rigid
Section

Copper Foil/Conductor

Insulation, Polyimide and Acrylic Adhesive

Kapton/Acrylic Covercoat

Prepreg Covercoat
Kapton is a registered trademark of
E.I. DuPont de Nemours & Company

Figure 2-14. Hybrid rigid-flex inner layer.

To provide electrical insulation reliability, the manufac-

turer must engineer into the tooling scheme an overlap
of these separate dielectrics to prevent shorting between
subsequent layers and to ensure environmental sealing.
By using prepreg bond films to bond all the layers
together, the amount of acrylic adhesive is further
reduced. This technique allows the use of polyimide/
acrylic materials to be minimized in the rigid areas of
the circuit board. The major drawback to this construc-
tion is the X- and Y-axis instability of the base material,
which leads to problems with layer-to-layer registration
during final lamination.
© 1999/2000 Teledyne Electronic Technologies

Flexible Circuits

Types of Flexible Circuits REGAL® Flex

Teledyne Electronic Technologies has successfully
Common developed a process that completely eliminates all poly-
Type Layer Composition
Name imide films and acrylic adhesives in the hardboard areas
1 Single- of a rigid-flex circuit. This patented manufacturing pro-
TOP
sided cess, known as REGAL® Flex, produces a rigid-flex
BOTTOM assembly that is thermally stable and offers ultra-high
density.
2 Double- TOP
sided, REGAL® Flex 1
plated
through BOTTOM
The REGAL® Flex process substitutes the polyimide/
holes acrylic base materials normally bonded to the selected
copper, with an epoxy prepreg material to create a single
3 Multi- TOP or double-sided clad base laminate. Coverlays of poly-
layer, imide/acrylic materials are then registered and lami-
flexible 3 layers nated at flexible areas only, after image and etch
plated min. to operations are complete. These circuit layers can now be
12 layers
through max. stacked for multi-layer circuit lamination using epoxy
holes prepreg bond plies, registered in place at the rigidized
BOTTOM sections of the circuit. Refer to Figure 2-15.
4 Rigid- This process results in a more stable x, y and z-axis cir-
Rigid Flexible Rigid
flex, cuit for component assembly at the rigidized sections by
multi- eliminating the higher moisture content materials from
layer these areas. The flex area is slightly less flexible due to
with the prepreg usage on the base stock. However, final flex-
plated ibility exceeds flex-to-install requirements and provides
through for a lower cost lamination process.
holes The resulting covercoated layers are then selectively
bonded using a pre-windowed epoxy prepreg bond film
to allow for rigidizing selective areas for subsequent
5 Multi- through-hole processing. The methods used to produce
layer, no this type of rigid-flex board are the same as those used
plated to manufacture an all polyimide film/acrylic construc-
though tion board. The major difference is the materials used
hole when processing.
3 layers minimum Both of these manufacturing techniques can be used on
applications that require the flexible section to bend dur-
Rigid Laminate ing installation, normally not more than 90°. Circuit
boards manufactured using these techniques have
Copper Foil/Conductor
exceeded the military specification for a flex-to-install
Insulation, Polyimide and Acrylic Adhesive application of 25 or more flexing cycles.
Prepreg Bond Film

Prepreg Covercoat
REGAL® Flex 5
When flexibility requirements of the application require
Table 2-2. a bend radius equal to or greater than industry standards
(refer to the Mechanical Design Section) for higher
layer count rigid flex applications, REGAL® 5 pro-
cessed laminates are recognized industry-wide as the
ideal construction method. REGAL® 5 laminates pro-

19

Œ
‰© 1999/2000 Teledyne Electronic Technologies

Flexible Circuits

Rigid
Section

Rigid
Flex
Section

Section
Rigid Cap
Material
(copper on
one side)

Rigid Cap
Material
(copper on
one side)
Rigid
Section

a) Single-sided, Covercoated
Innerlayer
Rigid
Section

Flex
Section
Flex
Section

c) Multi-layer Circuit

layer; b) double-sided covercoated innerlayer; c) multi-layer circuit.

vide a more homogeneous laminate in both the rigid and

flexible areas. Teledyne accomplishes this be manufac-
turing dual core material innerlayers, which result in no
polyimide or acrylic materials in the rigidized areas of
the board, while assuring this material remains in the
flexible areas to provide maximum flexibility. Refer to
Figure 2-16.
These dual core material layers are selectively bonded
together using the same manufacturing processes used
to build the other rigid-flex constructions previously
outlined. By utilizing this manufacturing technique, an
ultra-high density, highly reliable, and thermally stable
rigid-flex circuit can be designed and built in large
quantities.
As with the REGAL® 1 construction technique,
REGAL® 5 rigid-flex can be manufactured with single-
sided or double-sided innerlayers. Single-sided inner-
layers offer increased flexibility for certain applications,
and the ability of having an odd number of flexible inner
layers. REGAL® 5 double-sided innerlayers provide the
option of having the increased flexibility of all thin-film
flex materials in the flexible section, along with the
option of two conductive layers bonded to a shared

20
Rigid
Section

Figure 2-15. REGAL® Flex 1 construction; a) single-sided covercoated inner-

b) Double-sided, Covercoated
Innerlayer

Copper Foil/Conductor

Kapton/Acrylic Covercoat

Prepreg Bond Film

Prepreg Base Stock

Prepreg Covercoat
0.050" (1.25mm)
typical on
single or
double-sided
inner layers

Kapton is a registered trademark of

E.I. DuPont de Nemours & Company

dielectric. This technique will enhance the performance

of designs incorporating controlled impedance or other
transmission line electrical properties that require multi-
ple innerlayers with shielding.
There are some distinct advantages to the REGAL® Flex
processing method when compared to other rigid-flex
construction techniques:
• In particular the thermal stability of REGAL®
Flex circuit boards; acrylic adhesives have a glass
transition temperature (Tg) of 40°C and a CTE of
400-600 ppm/°C. The Z-axis expansion of a rigid-
flex using acrylic adhesive materials above Tg
increases as the number of layers increases. The
materials in a REGAL® Flex board have very spe-
cific thermal properties — the epoxy prepregs
used have a Tg of 170°C and a coefficient of ther-
mal expansion (CTE) of 70 ppm per degree C in
the Z axis. The use of these materials yields a cir-
cuit board capable of passing a 290°C solder float
for 10 seconds without exhibiting delamination or
barrel cracks in the plated-through holes. This is
due to the reduction in the Z-axis expansion rate of
the laminated board. These advantages come at a
© 1999/2000 Teledyne Electronic Technologies

Flexible Circuits

cost increase between REGAL® 1 and REGAL® 5 the thermal stability of the REGAL® Flex materials, the
due to the increased processing complexity. board has the potential ability to withstand multiple
Conventional rigid-flex materials use a non-reinforced wave solder operations without concern for creating
polyimide film as the base material. Since this material failures.
is dimensionally unstable during the manufacturing pro- REGAL® Flex innerlayers are constructed of a rein-
cess, larger pad diameters on internal layers are required forced epoxy and fiberglass material that is woven to
to compensate for the growth or shrinkage of the materi- enhance X- and Y-axis stability. Because of the
als during processing. The increased pad diameters are improved X- and Y-axis stability of the materials used
needed so that after final lamination the manufacturer when processing the innerlayers, multi-layer rigid-flex
will have a greater chance of drilling down into the circuits designed for REGAL® Flex can achieve denser
innerlayer pad at the drilling stage. It can be expected packaging. Smaller internal pads can be used along with
that a rigid-flex circuit incorporating an acrylic adhesive tighter hole-to-hole spacing, which permits increased
construction will exhibit high losses at the assembly density and lower layer count.
stage due to delamination and barrel cracks. Because of

Rigid
Section
Flex
Section
Rigid
Section

Rigid
Section
Flex
a) Single-sided, Covercoated Section
Innerlayer Rigid
Section 0.050" (1.25mm)
typical on
single or
double-sided
inner layers

Polyimide
Acrylic
Covercoat
Rigid b) Double-sided, Covercoated
Section Innerlayer
Flex
Rigid Cap Section
Material

REGAL 5 D/S Copper Foil/Conductor

Innerlayer
Kapton/Acrylic Center Film
Prepreg Polyimide
Bondfilms Kapton/Acrylic Covercoat
Acrylic
Covercoat
REGAL 5 S/S Prepreg Bond Film
Innerlayer
Prepreg Base Stock
Rigid Cap Prepreg Covercoat
Material
c) Rigid-flex Circuit Kapton is a registered trademark of
E.I. DuPont de Nemours & Company

Figure 2-16. REGAL® 5 construction; a) single-sided covercoated inner-

layer; b) double-sided covercoated innerlayer; c) rigid-flex circuit.

21
© 1999/2000 Teledyne Electronic Technologies

Flexible Circuits

Figure 2-17. Examples of MCM-LF products.

Multi-Chip Modules (MCM) The benefits of Multi-Chip Modules are:

• Increased system speed
Multi-Chip Modules (MCMs) can be defined as struc-
• Reduced overall size
tures consisting of two or more integrated circuit chips
• Ability to handle chips with large numbers of
that are electrically connected to a common circuit base
I/O’s
and interconnected by conductors within that base.
• Reduced number of external connections
There are three basic types of technologies that are used
to manufacture MCM structures. The differences Of the three types of MCM, laminate-based Multi-Chip
between the competing technologies are the dielectric Modules (MCM-L) offer the end-user the lowest cost,
materials and the processes used to manufacture the especially for higher volume applications. Lower costs
structures. The three types are as follows: are achievable because of lower raw material and pro-
cessing costs, and through the use of large format array
MCM-C – modules constructed on ceramic substrates
processing. Other benefits of MCM-L technology
using thick film (screen printing) technologies to form
include two-sided assembly for both Chip-on-Board and
the conductor patterns.
surface mount components, large area substrates, and
MCM-D – modules whose interconnects are formed by the reduction of connectors through the use of rigid flex
thin film deposition of metals onto deposited dielectrics. substrates.
MCM-L – modules using advanced forms of printed One shortcoming of MCM-L technology has been
wiring board technologies to form copper conductors on achieving high interconnect density using conventional
laminate based dielectrics. Refer to Figure 2-18. manufacturing techniques. High density MCM-L’s may

Regal 1 SMT Device

Rigid Section

Flex
Section
Flex Bare IC Die
Section

Base Stock Prepreg

Copper Foil/Conductor

Kapton/Acrylic Covercoat

Prepreg Covercoat
Kapton is a registered trademark of
Figure 2-18. MCM-L construction. E.I. DuPont de Nemours & Company

22
© 1999/2000 Teledyne Electronic Technologies

Flexible Circuits

require additional design and engineering effort to Another area of concern is the relatively larger coeffi-
obtain the interconnect density and performance cient of thermal expansion (CTE) of the substrates. The
required. To achieve the desired density, the design may thermal mis-match between the substrate and the die
incorporate smaller diameter drilled holes, blind and/or limits the size of the die that can be reliably bonded
buried vias, and finer conductor widths and spacings. directly to a laminate substrate. The mis-match can be
Many manufacturers are looking toward improved pro- somewhat mitigated by the use of epoxy underfill
cessing techniques and equipment to increase density. beneath the die, or by using thermally matched sub-
Processes such as micro-vias (vias less than 0.006" strates. Performance enhancements may also come from
(150µm) in diameter) that are formed using advanced the use of thinner dielectric materials, low loss dielec-
techniques such as laser drilling or plasma etching, and trics and better thermal management techniques.
fine line imaging and etching will increase the circuit
density without compromising yields.

Product Example

23
© 1999/2000 Teledyne Electronic Technologies

3 Materials
© 1999/2000 Teledyne Electronic Technologies

Materials

Chapter Terms
Adhesiveless Laminates: A copper-clad laminate com- TM 2.4.29 specifies a minimum number of 25 cycles
posite of polyimide film bonded to copper foil. using a 0.125"(3.175mm) diameter mandrel.
Basestock or Base Material: The insulating material LPISM: Liquid photo-imageable soldermask.
upon which a conductive pattern may be formed. The Reinforced Adhesive: An adhesive material whose
basestock may be rigid or flexible, or both. It may be a mechanical strength is improved by the addition of glass
dielectric or insulated metal sheet. fibers.
Covercoat, Cover Lay or Cover Layer: The layer of Soldermask: A resist that provides protection from the
insulating material that is applied over a conductive pat- action of solder.
tern on the outer surface of a printed circuit. Used for
electrical insulation and environmental sealing. Tenting: The covering of holes in a printed board and
the surrounding conductive pattern with a resist that is
Electro-deposited (Copper): The deposition of a con- usually a dry film.
ductive material (copper) from a plating solution by the
application of electrical current. Thermoset Adhesive: An adhesive material that under-
goes a chemical reaction when exposed to elevated tem-
Flexible Soldermask: A soldermask that when cured peratures that leads to it having a relatively infusable or
over flexile circuits will not separate, fracture, or delam- crosslinked state that cannot be softened or reshaped by
inate from that surface of the base material, conductors, subsequent heating.
and lands of the coated flexible wiring. IPC-TM-650,

25
© 1999/2000 Teledyne Electronic Technologies

Materials

Conductive Materials Surface Treatments

Thin copper foil is the most readily available and The surfaces of both copper types are normally treated
economical conductive material for flexible circuitry. by chemical oxidation to increase adhesion, to reduce
Copper foil is available in two types, each with different resist undercutting by etchants, and to reduce bond deg-
properties. radation by plating chemicals. Electro-deposited copper
is more easily treated and less expensive to treat than
The first type of copper foil is electro-deposited foil,
rolled copper. A thin layer of zinc applied to the copper
which can be laminated to a dielectric to form base-
foil’s surface will increase bond strength and reduce
stock. Some of the advantages of this type of copper foil
corrosion. Other proprietary, stain-proofing treatments
are:
are also used.
• economical
• rougher base bonding surface which enhances
bonding Foil Grades
• vertical grain structure, which enhances fine line Copper foils come in a variety of quality and property
etching grades. To avoid excessive foil defects, only the highest
The second type is rolled copper foil, normally available printed circuit quality electro-deposited copper should
fully annealed, but also supplied as low temperature be used for flexible circuits. Both annealed and non-
annealed. Rolled annealed copper foil is the type com- annealed electro-deposited copper foil are available. A
monly used by flexible circuit manufacturers because of special high ductility grade of electro-deposited copper
its flexing characteristics. Some of the advantages of called high tensile elongation (HTE) is available which
this foil are: possesses the physical property of increased elongation.
• horizontal grain structure better suited for flexing Rolled copper is available in a special low temperature
applications annealed (LTA) grade which is easier to handle and
• can be supplied with a bond enhancer to aid in harder than ordinary soft rolled copper. LTA foil is
adhesion annealed during lamination to a dielectric substrate.
• can be supplied with bond enhancer on both sides The properties of electro-deposited and rolled, annealed
of the foil to reduce processing steps and handling copper are compared in Table 3-2.
• can be double treated, which adds oxide treatment
to the surface of the copper to greatly increase
bond strength PROPERTIES OF COPPER FOILS (1 OZ.)
Both foil types are readily available in various weights/ ELECTRO-
thicknesses. Table 3-1 shows the more common thick- DEPOSITED ROLLED,
ness and their equivalent weights for a one square foot PROPERTY (High ductility) ANNEALED
of copper foil of a given thickness. These foils are the
easiest to handle and the most economical to process. Purity 99.8% 99.9%
They are readily available as straight foil, or can be pre- Resistivity 16Ω g/cm2 15.2Ω g/cm2
laminated to a base dielectric material. (at 20° C)
Tensile 40kpsi 20kpsi
strength @
COPPER FOIL THICKNESS AND WEIGHT
23°C
COMPARISON
Tensile 20kpsi 14kpsi
Weight Thickness strength
1/2 @180°C
ounce 0.0007" 17µm
Ductility 3% 10%
1 ounce 0.0014" 35µm
elongation2
2 ounce 0.0028" 70µm
Standard 1/8 - 20 oz. 1/2 - 6 oz.
3 ounce 0.0042" 105µm weights
Table 3-1. Table 3-2.

26
 © 1999/2000 Teledyne Electronic Technologies

Materials

Other Metals Used in Printed Wiring Boards alloys, such as Inconel®, provide high electrical resis-
tance for flexible heating elements.
Aluminum is used for electrical shielding or to replace
copper in low cost circuits. It cannot be soldered or
welded with conventional equipment. Flexible Dielectric Materials
Nickel, because of its hardness and ease of welding, is The design and use of flexible circuitry has been made
used to join components to substrates which cannot possible by the availability of numerous flexible thin
withstand ordinary solder temperatures. Both electro- film dielectric materials. Each of these materials has
plated and rolled nickel are available. properties which dictate where they are best used. When
Gold provides excellent corrosion resistance. Since it is choosing a dielectric insulating film, there are many fac-
extremely soft and very expensive, it is used sparingly, tors that should be considered, including operating envi-
often as a plating. ronment, mechanical constraints of the material,
electrical characteristics, and cost.
Silver, with the highest conductivity of all metals, is fre-
quently used as a contact material. Some materials have qualities which make them well
suited for the operating conditions of the final assembly,
Copper Alloys: Phosphor bronze and beryllium copper but they may not have the necessary chemical, mechani-
foil provide circuitry with integral leaf springs and cor- cal or thermal properties necessary to withstand a manu-
rosion resistant contacts where precious metal plating is facturing environment. To ensure that the correct
not required. material can be used for a particular application, overall
Ferrous Alloys: Soft ferromagnetic foils are used for environmental and manufacturing conditions to which
magnetic shielding. Stainless steel foil is used for resis- the assembly will be subjected must be carefully
tance heaters and circuits requiring high strength and analyzed.
corrosion resistance. Tables 3-4 and 3-5 list the characteristics of some high
Nickel Alloys: Copper-nickel alloys, such as Monel®, temperature thin film dielectrics. These films tolerate high
are used for corrosion resistance. Nickel-chromium

PROPERTIES OF VARIOUS CONDUCTIVE METALS

MATERIAL
THERMAL RESISTIVITY
ELECTRICAL RESISTANCE THERMAL EXPANSION COMPARED
FOIL at 20° C DENSITY CONDUCTIVITY COEFFICIENT TO COPPER*

Ohms mil micro lb. per btu/hour/sq. ppm/ °F

per ft. ohms – sq. cubic ft./°F/ft.
cm/cm inch
Aluminum 17 2.8 .097 118 13.0 1.635
Copper 10.4 1.7 .324 223 9.0 1.000
Gold 14.7 2.4 .698 170 7.8 1.41
Iron 60 10.1 .284 35 6.5 5.68
Lead 132 22.0 .410 20 16.3 12.69
Nickel 51 8.5 .322 35 7.0 5.77
Silver 9.8 1.6 .379 240 10.2 0.942
Tin 70 11.6 .264 35 14.9 6.73
*To compare resistance of material to that of copper of equal size.
Table 3-3.

27
© 1999/2000 Teledyne Electronic Technologies

Materials

CHARACTERISTICS OF THIN FILM DIELECTRICS

UNIT OF POLYIMIDE FEP POLYESTER
CHARACTERISTIC MEASURE FILM FILM FILM

Dielectric Strength V/Mil-1 Mil 4500 5000 7000

Dielectric Constant 1 kHz 3.4 2.1 3.1
Dissipation Factor 1 kHz .0016 .0003 .005
Tensile Strength PSI 20000 4000 25000
Elongation % 70 300 100
Water Absorption % By Weight 3 < .01 .8
Operating Temperature °C 150 204 149
Absolute Max Temperature °C 300 274 149
Low Temp. Embrittlement °C -55 -85 -50
Melt Point °C 816 280 248
Weather Resistance MIL-STD-2026 Excellent Excellent Fair
Fungus Resistance MIL-E-5272 Non-Nutrient Non-Nutrient Non-Nutrient
Chemical Resistance N/A Excellent Excellent Excellent
Table 3-4.
volume assembly techniques, such as wave soldering, and Adhesives
multiple soldering operations without degradation.
There are several types of adhesives from which to
select, each with its own unique properties. The two
Uses of Dielectric Films
main categories are thermoset flexible and reinforced
When used on a flexible circuit, insulating dielectric adhesives. Within these categories are several choices.
films can function as a base film or a covercoat film. The selection of the proper adhesive and thickness to
The base dielectric film is used to support and protect bond the conductive copper and dielectric is considered
the copper foil during the manufacturing process. It can to be one of the most critical choices in flexible and
also provide electrical protection (insulation) and envi- rigid-flex circuitry design.
ronmental protection to the circuit. Different thicknesses
of dielectric films may also be used to control imped- Thermoset Flexible Adhesives
ance. The copper foil is bonded to the base dielectric Thermoset adhesives are used to bond flexible dielectric
prior to the imaging operation. The dielectric film there- film to copper foil and to bond multiple layers together
fore acts as an etch resist on the backside of the sheet on to form multi-layer flexible circuits. Two types of flexi-
single layer flexible circuits. On double-layer applica- ble thermoset adhesives — modified acrylic and epoxy
tions, the base dielectric is sandwiched between two — are available for processing flexible circuitry. They
copper foils. This provides support and prevents etching have different characteristics and are chosen for the spe-
on the backside of the copper foils. cific application requirements.
The covercoat dielectric is thermally bonded to the base
dielectric after the conductive pattern has been etched. Modified Acrylic Adhesive
The covercoat serves to protect the copper conductors
from moisture, contamination and damage. Acrylic adhesives have been available for use in flexible
circuitry manufacturing since the early 1970’s. They

28
 © 1999/2000 Teledyne Electronic Technologies

Materials

offer excellent adhesion to both the polyimide films and ing prior to soldering. In multi-layer processing, how-
copper. ever, adhesives are buried beneath several layers of other
Typical bond strengths to treated rolled annealed copper materials, requiring longer baking cycles to remove all
are: the moisture.
• 8-15 lbs./inch at room temperature Second, acrylic adhesives have a relatively low glass
• 8-15 lbs./inch after solder float transition temperature (Tg), 40°C, and a coefficient of
• 7-14 lbs./inch after solder immersion thermal expansion (CTE) of 400-600 ppm, higher than
Other characteristics of acrylic adhesives are: other bonding materials. When several layers of acrylic
• thermal stability to resist multiple exposure to adhesive are used in a circuit board, such as in multi-
molten solder and hot oil reflow layer flex and rigid-flex, these characteristics lead to
• will pass UL tests for flammability at VO rating defects. Z-axis movement of these materials can cause
• chemical resistance to withstand exposure to a delamination and barrel cracks in plated-through holes.
wide variety of chemicals and solvents used in Please refer to the REGAL® Flex discussion in
processing Chapter 2 of this Design Guide to see how Teledyne has
• controlled flow of cover sheets and bond films addressed these shortcomings.
• easy processing
• batch-to-batch consistency Epoxy Adhesives
• excellent thermal resistance in heated environ-
ments Prior to discovery of the superior flow characteristics,
• repairability in the most demanding of environ- bond strength and temperature resistance of acrylic
ments adhesives, modified epoxy materials were the material
of choice for single-sided and double-sided flexible cir-
Modified acrylic adhesives do have some properties that cuits. In multi-layer and rigid-flex circuits, however,
adversely affect multi-layer circuit processing. First, epoxies are increasingly used because of their superior
their moisture absorption rate is approximately 4% by Z-axis expansion characteristics and lower moisture
weight. Moisture can be successfully removed by bak-

FEATURE COMPARISON OF COMMON FILM MATERIALS

Property Polyimide (Kapton) FEP Polyester

Tensile Strength Very high Low Extremely high

Manufacturing Limita- Few to none Adhesion Sensitive to process-
tions problems, low ing chemicals and sol-
tensile strength dering temperatures
Flammability Non-flammable Melts High
Moisture Absorption Highest Lower Lowest
Dimensional Stability Unstable Unstable Stable
Flexible Yes Poorly Yes
Bondable Yes Yes Yes
Relative Cost Moderate Expensive Inexpensive
Typical Use Most widely used Excellent dielec- Consumer-oriented
insulation tric
Kapton is a registered trademark of E.I. DuPont de Nemours & Company
Table 3-5.

29
© 1999/2000 Teledyne Electronic Technologies

Materials

absorption rate. Some of these epoxies also offer Pre-Impregnated Polyimide Glass
improved flexibility compared to acrylic based systems. Prepreg that is manufactured using a polyimide resin
Bond strengths to treated rolled annealed copper are: system can further enhance the thermal stability of
• 10-15 lbs./inch at room temperature plated-through holes in rigid-flex circuits. Polyimide
• 8-12 lbs./inch after solder float prepregs have even better thermal characteristics than
• 8-12 lbs./inch after temperature cycling epoxy glass prepregs, with a Tg of about 200°C, and a
Other characteristics of epoxy based adhesives are: Z-axis CTE of approximately 100 ppm/°C at tempera-
• thermal stability to resist multiple soldering opera- tures above Tg. Their primary drawbacks are that they
tions are more expensive, and have a shorter shelf life.
• chemical resistance to withstand multiple expo-
sures to processing chemicals and cleaning sol- Adhesiveless Materials
vents
Another construction technique available for the manu-
• controlled flow
facture of rigid-flex circuits involves the use of adhesive-
• batch-to-batch processing
less polyimide materials. The adhesiveless materials are
• will pass UL tests for flammability at V1 or V0
made by flowing a tightly controlled thickness of hot
rating
Kapton between two layers of copper, with the Kapton
• moisture absorption rate as low as 1.5% by weight
acting as the bonding agent between the two copper lay-
ers, thus eliminating the layers of adhesive materials
Reinforced Adhesive Materials described elsewhere. These materials simplify the con-
Reinforced adhesives are made from glass bundles that struction of the final multi-layer circuit and reduce its
are impregnated with either an epoxy resin or, in some overall thickness and weight. They possess a much lower
cases, a polyimide resin. The materials are referred to as coefficient of expansion than the adhesive materials.
Pre-Impregnated Epoxy Glass, and Pre-Impregnated However, adhesiveless materials cost significantly more
Polyimide Glass, respectively. These materials can be than other construction materials, and their shrinkage
used in rigid-flex circuits as a bond film between layers, can be more difficult to predict. Also, impedance control
as a covercoat material, or as a base dielectric. Selected can be more challenging because of the non-homoge-
use of the materials allows for greater Z-axis expansion nous material stack up in the rigid areas.
control. When used as a base dielectric, as in Teledyne’s Depending upon the application, though, an adhesiveless
REGAL® Flex brand of rigid-flex, the flex layers have construction can be a viable option for producing rigid-
greater X- and Y-axis stability, resulting in better layer- flex circuits.
to-layer registration.
Pre-Impregnated Epoxy Glass Soldermask
Pre-impregnated epoxy glass, also known as “prepreg”, Soldermask can be used in the rigidized areas of rigid-
can be used in rigid-flex applications as a bonding film, flex circuits, using techniques and materials similar to
a covercoat or a base film, depending on the final appli- those used on rigid boards.
cation. Use of prepreg greatly reduces Z-axis expansion
rates of a finished multi-layer circuit. Prepreg has a long The choice of soldermasks is determined by the applica-
record of proven reliability in the processing of rigid- tion. Certain masks are preferred where wear resistance
style printed circuit boards. is important or where it is used as a dielectric. Others
are better suited for SMT processes or as an environ-
Some of the characteristics of prepreg that warrant its mental moisture barrier. The use of these coatings, and
use in rigid-flex are its higher Tg and lower CTE. The any special preparation or cleaning required prior to
Tg of epoxy prepreg can range from 130°C to 170°C, their application, should be reviewed for compatibility
with the Z-axis CTE at temperatures above Tg being with other parts and materials used in the printed circuit
approximately 115 ppm/°C. Substituting prepreg for board construction. These masks can be selected to meet
acrylic adhesive (with a CTE of 400-600 ppm/°C), commercial specifications (IPC-SM-840).
improves Z-axis stability significantly. Please refer to
REGAL® Flex in Section 2 of this Design Guide for The conductive pattern to be coated can be prepared in
more information on the use of prepreg on rigid-flexible one of two ways. The circuitry under the solder mask
circuits. can either be solder (tin/lead) coated or left as bare
copper. Of the two choices, soldermask over bare cop-

30
© 1999/2000 Teledyne Electronic Technologies

Materials

per (SMOBC) is preferred for two reasons. First, it conform very well in dense patterns which could lead to
results in a better bond; second, solder under solder- cracking and peeling.
mask could reflow during soldering causing electrical Liquid photo imageable (LPI) soldermasks are coated
failures from solder bridging the conductors. SMOBC onto the surface by using either a curtain coating pro-
should be specified on the master drawing. cess, screening process, or spraying. LPI soldermasks
There are two types of soldermask that can be applied to bond very well to all features of the board because the
the rigidized sections of a rigid-flex circuit. The solder- liquid flows to cover all of the circuitry. The soldermask
mask can be supplied as a dry film, which is roll lami- is applied and partially cured, then imaging artwork is
nated onto the circuit, or alternatively as liquid photo used to polymerized and fully cure the mask in the
imageable material (LPI), which is coated onto the cir- desired areas. The unwanted mask is then stripped away.
cuit board. The dry film soldermask is supplied in rolls The major drawback of this soldermask technique is the
to the vendor and is hot roll-laminated onto the outer inability to tent over via holes. After the soldermask has
layers of the circuit. Imaging artwork is then used to been applied and cured, all exposed copper surfaces can
expose the areas that are to remain by polarizing the film be solder hot-air leveled to facilitate subsequent compo-
under bright light. The unwanted film is then rinsed nent soldering.
away. With this dry film technique it is possible to attain Teledyne recommends that via holes either be com-
tenting of vias. Some of the concerns regarding dry film pletely open or completely tented with soldermask.
soldermask include ionic contamination, flatness of the Partially open vias can entrap processing fluids, either
dry film, and, due to its relative thickness, problems from fabrication or assembly operations, which can lead
with bonding over very dense conductor patterns and to reduced yields or premature field failures.
difficulties with fine pitch soldering. The film does not

Rigid
Section
Rigid
Section Flex
Flex Section
Rigid Cap Material Section
(copper on one side)

REGAL 5
Innerlayers

Rigid Cap
Material
(copper on
one side)
a) Regal 5 Rigid-flex Multilayer B) Adhesiveless Rigid-flex Multilayer

Copper Foil/Conductor Prepreg Bond Film

Kapton/Acrylic Covercoat Prepreg Covercoat

Kapton is a registered trademark of
E.I. DuPont de Nemours & Company

Figure 3-1. REGAL® 5 versus adhesiveless rigid-flex construction.

31
 © 1999/2000 Teledyne Electronic Technologies

Materials

Flexible Soldermasks described above, with the most prevalent being liquid
photo imageable. The use of flexible soldermask may
Soldermasks are available that not only provide electri- replace a traditional polyimide film covercoat for a
cal and environmental protection but also are flexible lower cost with slightly lower performance.
enough to be used as a covercoat on a flex circuit. These
soldermasks are applied using the same techniques

Product Example

32
© 1999/2000 Teledyne Electronic Technologies

4 Electrical Design
© 1999/2000 Teledyne Electronic Technologies

Electrical Design

Flexible circuitry is a custom-designed interconnection Since the conductors in a flexible circuit are both thin
packaging device. Therefore, electrical requirements and flat, they provide about 50% more surface area than
such as capacitance and impedance can be controlled. a round wire of equivalent cross section. This allows for
This section will discuss the decisions and trade-offs to more efficient dissipation of heat. Therefore, a flexible
be made during the design phase to meet all of the elec- conductor can carry more current at a reduced size when
trical, as well as mechanical, parameters of the circuit. compared to round conductors; it may be possible to up-
rate the AWG requirements by one or two gage sizes.
Conductor Thickness and Width To determine the conductor width necessary for a given
current or resistance, a conductor nomograph can be
Copper foil is the material of choice for the majority of
used. The nomograph in Figure 4-1 shows the current
flexible circuits. When designing a flexible circuit, the
carrying capacity for a given conductor width and thick-
minimum conductor thickness and width should be
ness which will yield a 10°C temperature rise at 20°C
determined on the basis of current carrying capacity and
ambient. The temperature rise of 10°C is the standard
the maximum permissible conductor temperature rise.
used in flexible circuit boards.
Equivalent American wire gage
14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34
1.00
p

p
am

.90 am
p
am

p
20

.80 16
am
18

.70 14
p
am

1⁄2
es

12

–o
.60
rv

un
cu

p T

ce
.50 am
nt

co
10
re

am

pp
ur

0
9.

er
lc

.40 p W

(.0
1–

am
ua

01
ou

0
Eq

8.

35
nc

")
e

.30 p
co
2–

am p
pp
ou

.7 0 am p
er
nc

5
6. am
(.0
3–

e
co

01
ou

0
.20 6.
35
pp
Conductor width‚ W (inches)

nc

p
4–

")

am
er
e
ou
5–

co

(.0

0
nc

5.
ou

pp

02
.0

6–

.15
20

nc

er

7"
ou

co

p
(.0

)
e
co

pp
nc
8–

am
co

04
pp

er
ou

0
pp

4.
10

0"
co
er

nc

er r

)
–

pp
ou

.100
e
co
nc

pp

.090 p
e
co

am
er

.080
pp

0
As 3.
er

.070 pe
ct
Co rat p
.060 io am
n
are uc d α= 5
n t o w 2.
.050 he o t r s th idth
low nce c feas with ickn p
thi urve ible α of ess = 5
p

am
am

s li to
ne s are ma less
p

.040 2
am
12

. no nuf tha
p

ts n
am
10

ho actur 5 p
p

wn e‚
am

am
0

.030
9.

be
p

- 1.5
am
0
8.

p
am

.025
7.0

p
6.

am

.020
0

p
5.

am

Wi
re
0

.015 cu
p
4.

rre
am

n t ra
p
0

tin
am
3.

g
5
2.

2.5 3.0 4.0 5.0 6.0 8.0 10.0 15 20 30 40 50 60 80 100 150 200 300 400
Conductor resistance (milliohms/foot or ohms/1000 feet)

Figure 4-1. Conductor Resistance Nomograph.

34
© 1999/2000 Teledyne Electronic Technologies

Electrical Design

THE BASICS
NOMOGRAPH USE EXAMPLES
1) Find the AWG round wire size with the equivalent b) Project that intersection horizontally to the width scale
resistance rating of a 2 oz. X 0.030" conductor: and read 0.31".
AWG 30
4) Find other combinations of width and thickness for
conductors capable of carrying 10A without exceeding a
10°C temperature rise.
0.030"
10A

2-o
width

un
ce
A
B
C
From 0.030" on the width scale, project horizontally to D
E

width
the 2 oz. curve. 6-ounce
A—0.31"
Project vertically to the AWG baseline and read 30 as the 5-ounce
B—0.25"
4-ounce
closest AWG wire size. C—0.21"
3-ounce
D—0.185" 2-ounce
E—0.165"
2) Find the AWG wire size that can carry a current equal
to a 2 oz. X 0.030" conductor. a) Note the intersection on the 10A constant current curve
AWG 27 28
with 3, 4, 5 and 6 oz.
b) Project each horizontally to the width scale and read
0.25", 0.21", 0.185" and 0.165".

2.5A 5) Find the flat conductor size for handling 4A at a maxi-

2.0A mum drop of 0.125V/ft.
0.030" 1.5A
width

4-o
3-o ce
2-o ce
2-o

un
un
un
un

ce
ce

Wire Current
Rating 0.098"

0.065"
From the 0.030" on the width scale, project horizontally
to the 2 oz. line. The intersection occurs at the 2A con- 0.049"
stant current curve.
width

Follow that curve down to the intersection with the Wire

Current Rating line. Project that intersection vertically to Resistance 31mOhm/ft
the AWG baseline and read 28 as the closest AWG wire
size. a) Calculate the required resistance per foot from R = E/I
= 0.125/4 = 0.031 Ohm/ft = 31 mOhm/ft.
3) Find the width of a 2 oz. flat conductor that can safely b) Locate this resistance on the baseline and project it
carry 10A without exceeding a 10°C temperature rise. vertically to intersect the 2, 3 and 4 oz. lines.
10A c) Project these intersections horizontally to the width
0.31"
scale and read 0.098", 0.065" and 0.049".
2-o

d) If selecting the conductor on the basis of the lowest

width

un

temperature rise, choose the 2 oz. X 0.098" size; it has

ce

about 100% more surface area than the 4 oz. conductor

and about 33% more surface area than the 3 oz. conduc-
tor.
a) Locate the intersection of the 2 oz. line with the 10A
constant current curve.

35
© 1999/2000 Teledyne Electronic Technologies

Electrical Design

Conductor Spacing CONDUCTOR SPACING

CONSIDERATIONS
The clearance between two conductors on individual
layers, or from a conductor to the edge of an assembly, COVER-
is determined, in part, by the voltage requirements of the LAYERED UNCOATED UNCOATED
conductors. Figure 4-1 shows the minimum spacing BOARDS BOARDS BOARDS
requirements for various voltage ratings. It should be ANY < 10K FT. > 10K FT.
noted that these are minimums and that the artwork VOLTAGE LEVEL Altitude Altitude
must be designed with these requirements in mind. The
use of a covercoat insulation material will enhance the 0-50 0.005" 0.025" 0.025"
electrical performance for clearance requirements, as
51-100 0.005" 0.025" 0.060"
there will be no ionization of the air surrounding the
conductors resulting in flashover. Often, the spacing on 101-150 0.016" 0.025" 0.125"
a flexible circuit is chosen more by manufacturing con-
siderations than by electrical performance requirements, 151-250 0.016" 0.050" 0.125"
since the operating voltages for most flexible circuit 251-500 0.030" 0.100" 0.250"
designs are relatively low. In addition, the insulating
materials used can withstand 300 V/mil or more. > 500 0.00012" 0.0002" 0.001"
per volt per volt per volt
Temperature Rise vs. Current Table 4-1.
The chart shown in Figure 4-2 has been prepared to esti-
mate temperature rises above ambient versus current for Permissible temperature rise is defined as the difference
various cross-sectional areas of etched copper conduc- between the maximum safe operating temperature of the
tors. A 20% derating for unknown variations should be laminate, and the maximum ambient temperature in the
included. An additional 15% derating is suggested for location where the panel will be used. For single con-
conductor thicknesses of 0.0042 inch (3 oz/ft2) or more. ductor applications the chart may be used directly for
determining conductor widths, conductor thickness,
35.0 1 2
3
30.0 4
25.0 5
20.0 6
Current in amperes

15.0 7
12.0
10.0
8.0
6.0 1 – 100˚
4.0 2 – 75˚
3.0 3 – 60˚
2.0 4 – 45˚
1.0 5 – 30˚
.50 6 – 20˚
.125 7 – 10˚
0
0
.001
.005
.010
Conductor width in inches

.020
.030
.050
.070 (3 o
z/ft2
.100 ) .0 0
(2 o 42"
z/ft2
.150 ) .0
028 Figure 4-2. Chart to be
" used to determine current
.200 ( 1/ (1
.250 2 oz
oz/
ft2
capacity and sizes of
/ft ) .0 etched copper conductors
.300 2) 014
.350 .0 " for various temperature
07
.400 " rises above ambient.
0 1 5 10 30 50 70 100 150 200 300 400 500 700
Cross section in square mils

36
 © 1999/2000 Teledyne Electronic Technologies

Electrical Design

cross-sectional area, and current-carrying capacity for When full shielding is required, it can be accomplished
various temperature rises. For groups of similar parallel by using either thin copper foil, or a screened-on silver
conductors, if closely spaced, the temperature rise may epoxy compound, along with guard conductors for a full
be found by using an equivalent cross-section and an circumferential shield. Thin copper foil is the most cost-
equivalent current. The equivalent cross-section is equal effective method while still maintaining flexibility;
to the sum of cross-sections of the parallel conductors. when used, it is necessary to use a cross-etch pattern to
The equivalent current is the sum of the currents in the provide improved flexibility and bond strength to the
conductors. The effect of heating caused by the attach- base dielectric. The thin foil can also be tied into guard
ment of power dissipating components is not included. conductors via plated-through holes for full circumfer-
ential shielding.
Shielding
Dielectric Properties
Many applications for flexible circuitry require shield-
ing of certain conductors to prevent cross-talk or for There are a variety of thin film dielectric materials that
other electrical considerations. Certain shielding are available for use in flexible circuitry. These materials
requirements can be avoided by carefully laying out the have differing dielectric properties which may signifi-
artwork. Care should be taken to locate sensitive con- cantly effect the electrical design. Table 4-2 lists the
ductors away from radiating lines to avoid cross-talk, dielectric values for some of the high-temperature thin
with less critical conductors in between, if necessary. film dielectrics. These values should be used in calcula-
Grounded guard connectors can also be placed next to tions requiring dielectric constant or strength values.
the sensitive conductors to help isolate them from Where combinations of dielectrics are used, their dielec-
interference. tric constants based on the percentage of each material
can be calculated from the following formula:
A
DK = ------------------
EFFECTIVE
B D
----- + -----
C E
Solid copper Whereas:
shield
Plated through hole A = Overall thickness of both materials
connects top and
bottom shield with
guard conductors.
B = Overall thickness of 1st material
C = Dielectric constant of 1st material
Guard D = Overall thickness of 2nd material
conductors
E = Dielectric constant of 2nd material

Characteristic Impedance
Cross-hatch
pattern copper Most often associated with a transmission line, charac-
shield
teristic impedance is the single most important electrical
property used to determine the performance of a high-
speed circuit. A transmission line is defined as one sig-
nal-carrying circuit composed of conductors and dielec-
tric insulating material, with highly controlled physical
and electrical parameters, used to carry high frequency
or narrow pulse-type signals.
There are two general configurations of transmission
lines which can be used during the design to better
Covercoat achieve controlled impedance in a flexible circuit. The
Copper Foil/Conductor
first type is the micro-strip configuration, in which the
conductor is located above a single ground plane. The
Dielectric Insulating Film/Base
second type is the stripline configuration, in which the
Figure 4-3. Shielding Techniques.

37
© 1999/2000 Teledyne Electronic Technologies

Electrical Design

DIELECTRIC STRENGTH AND CONSTANT constant of the insulating material. If the impedance
(Zo) is controlled, then any mismatch or signal reflec-
STRENGTH CONSTANT tion which results from the passage of fast pulses
MATERIAL V/0.001" (25µm) 1 MHz through an impedance discontinuity will be avoided.
Teledyne’s design engineers have developed sophisti-
Polyimide 4,500 3.8
cated software programs that calculate the impedance
Film w/
value for specific design criteria. The programs can be
Acrylic Adh.
manipulated to solve for either the design requirements
Adhesiveless 6,000 3.2 (e.g. conductor width, shield spacing, etc.) or the material
Polyimide selection required to meet a desired impedance value.
Film The chart in Figure 4-4 shows the relationship between
Acrylic 1,900 4.0 impedance and the distance required between ground
Adhesive planes along with the appropriate conductor width. If
the desired characteristic impedance value of the circuit
Epoxy Glass 1,131 4.3 is known, then the distance between ground planes
Prepreg (dielectric thickness) and conductor width can be found
relatively quickly. In this chart, the curves plot the
Polyimide 1,330 4.3 impedance in relationship to the dielectric constant of
Glass Prepreg the insulating material by using the expression:
Teflon Film 5,000 2.1
〈 εr〉 Z o
Table 4-2. An example of using this chart follows:
conductor is centrally located between two ground A circuit design requires a characteristic impedance
planes. In either construction technique the characteris- value of 50Ω minimum. The dielectric insulating mate-
tic impedance is dependent on the conductor width and rial is polyimide film coated with acrylic adhesive (εr =
thickness, the dielectric thickness, and the dielectric 3.3 @ 1 MHz).

.100

.080
20
=

30
Zo

εr r
40
=
Zo

ε r
=

.050
60
Zo

ε
=

.040
80
Conductor width (w) inches

Zo

εr
0
=

10
Zo

εr r
0

.030
=

12
Zo

ε r
0
=

14
Zo

ε r
=

.020
Zo

.010

Shield
w
.006
Center t b
Conductor
Shield
t = .0027(2oz. copper)
Figure 4-4. Charac-
teristic Impedance
.010 .020 .040 .060 .100 .30 (Zo) normalized
Distance between ground planes (b) inches curves.

38
 © 1999/2000 Teledyne Electronic Technologies

Electrical Design

220 80
t/b = .025
W
.020 t b 70
200
.015
.010
180 60
.005
.0
160 50

Zo‚Ohms
t/b = 0
140 .005 40

εr
.010
120 .015 30

.020
100 .025 20

80 10
0.1 0.2 0.3 0.4 0.5 0.6 0.8 1.0 2.0 3.0 4.0 5.0 6.0 8.0

Figure 4-5. Graph of Zo versus w/b for various values of t/b.

〈 εr〉 Z o = Normalized curve R = resistance per unit length of line

L = inductance per unit length of line
εr(polyimide film) = 3.3
G = conductance per unit length of line
Z o = 50 Ohms
ω = 2πf
3.3 = 1.82 C = capacitance per unit length of line
Then 1.82 x 50 = 91 (curve) If the line is lossless, the equation can be simplified to:
For a conductor width of L
Zo = ----
0.020", b = .046 C
0.010", b = .028 Micro-Strip
0.008", b = .021 The specific formula for a microstrip configuration is:
From the example shown, it becomes apparent that an h 377
increase in the conductor width has a corresponding Z o = ---- ----------
w εr
influence on the overall thickness of the circuit, which in
turn affects the flexibility. Similarly, selecting a material h = thickness of the dielectric
with a lower dielectric constant allows a reduced overall w = width of the conductor
thickness. εr = the effective dielectric constant of the insulating
material (considering the effect of air.)
Calculations
If the micro-strip line is also covercoated, the character-
High Frequency Lines istic impedance values obtained by using this formula
The general calculation for characteristic impedance for will be reduced by approximately 20 percent. This for-
any high frequency transmission line is: mula disregards the fringing effects and any leakage of a
micro-strip transmission line. To accurately account for
R + jωL these factors the following formula is recommended:
Zo = ---------------------
G + jωC
h 377
where Z o = ---- -----------------------------------------------------------------------------------------------------
w εr ⋅ { 1 + ( 2h ⁄ ( πω ) ) [ 1 + ln ( ( πω ) ⁄ h ) ] }
Zo = impedance, Ω

39
© 1999/2000 Teledyne Electronic Technologies

Electrical Design

Stripline Surrounding
Dielectric
The characteristic impedance of a stripline configuration (usually air)
Width Spacing
can be calculated using the following equation: w s Conductors

Z o = ( 60 ⁄ ( εr ) ) [ ln ( 4b ⁄ d o ) ]
Insulation
Dielectric Thickness
where do, the effective wire diameter for a square con- Cp
figuration, is 0.567w + 0.67t.
Fringe Capacitance
Cf Parallel Plate Capacitance
Because this equation is cumbersome, the family of Field Lines
Field Lines
curves shown in Figure 4-5 has proven to be very useful
Figure 4-7. Distributed capacitance between conductors
in determining stripline parameters. They are applicable is the sum of the parallel plate (Cp) and fringing (Cf)
to the multiple variations in dielectric thickness to con- capacitances.
ductor widths in a stripline configuration.
will first discuss the effects of fringing capacitance (Cf)
Notes on flexible circuit performance.
1. Impedance calculations should be considered as The fringing capacitance value in a flexible circuit is
rough estimates for constructions. The formulae actu- dependent on:
ally used take into consideration empirically deter- • the thickness and dielectric constant of the
mined factors which are process-specific. insulating material
2. Ground shields need to be in intimate contact with • the width and thickness of the conductors
signal flex legs to provide true impedance control. • the spacing between the conductors
Other factors that affect capacitance are the close prox-
imity of the signal to ground, and the frequency of the
signals. Since some portion of the fringing field extends
t
into the air outside the insulation, it is necessary to
establish a “median” value for the dielectric constant
which falls between that of the air and that of the insu-
w h lating material. This median value of the dielectric con-
stant would then be used in any calculations. The
capacitance values calculated using this approximation
will then serve as a guideline of what the actual distribu-
tive capacitance will be for a given circuit configuration.
b t Actual measurements are required to obtain accurate
capacitance values for high frequency circuits. This is
w
due, in part, to the effect of the above factors, and varia-
tion of dielectric constants of the materials with fre-
quency.
Copper Foil/Conductor
The results of a sample calculation are shown in Figure
Dielectric Insulating Film/Base
4-8. This graph shows the calculated capacitance
Figure 4-6. Printed wiring transmission line configurations. 1.0
Conductor width, w (inches)

0.5
0.4
Distributed Capacitance 0.3
0.2
Capacitance is the property of an electric non-conductor 0.1
that permits the storage of energy. In flexible circuitry 0"
09 0"
the capacitance between adjacent conductors consists of
0.05 0. 60" .03 5"
0.04 =
s 0 . 0
=
0 0 .01
0.03
both parallel-plate capacitance (Cp) and fringing capaci- 0.02 s= s s= w

tance (Cf). The distributed capacitance (Cd) is the sum 0.01

of Cp and Cf. Since the conductors are very thin, and 4 5 6 7 8 9 10 s
Capacitance (picofarads/foot)
thus have small areas exposed to each other, the parallel-
plate capacitance is generally negligible. Therefore, we Figure 4-8. Calculated capacitance between two adjacent
parallel conductors.

40
 © 1999/2000 Teledyne Electronic Technologies

Electrical Design

When using this calculation, the result will be approxi-

mately 4% low for W/S = 2 and approximately 10% low
for W/S = 1.
Spacing s
Insulation
For the above formulas:
with Dielectric w = width of conductor, ft.
Constant εr
Width
w s = dielectric separation between conductors, ft.
Figure 4-9. Capacitance between two conductors with CTotal = capacitance, pF/ft.
large surfaces is largely parallel-plate capacitance, Cp.
εr = dielectric constant of insulating film
between two adjacent parallel conductors insulated
Capacitance for flat etched conductors to surrounding
using 0.005" of polyester. To determine the distributed
metallic shields and/or ground planes is shown in Figure
capacitance for a flexible circuit using a different dielec-
tric material, simply multiply the value shown in this 4-10 for standard flexible wiring using FEP Teflon®
graph by the proper dielectric constant ratio for the insulation.
desired insulating film. For applications in which the To help reduce the effect of distributed capacitance on
conductors are completely enclosed by the insulation an etched conductor, it is necessary to add grounded
and have surfaces facing each other, it may be necessary guard conductors. These guard conductors will cause
to calculate the capacitance between the conductors. some of the fringe flux lines to terminate, and therefore,
This is especially true for designs involving high fre- will not contribute to the measured value. Examples can
quencies. An example of this type of configuration is be found in Figure 4-11. Measurements made between
shown in Figure 4-9. two conductors guarded by two grounded conductors
To find the capacitance for conductors with other insula- will show about a 20% reduction in capacitance as com-
tion materials, multiply the results found above by the pared to unguarded conductors. Capacitance between
ratio of constants shown in Table 4-3. two conductors can be even more dramatically reduced
(> 80%) when a grounded guard conductor is placed
RATIO OF DIELECTRIC CONSTANTS between them and a grounded conductor is placed on
either side.
Polyester 1.0
FEP Teflon 0.90
Polyimide 1.3

Table 4-3.

The formulas for these calculations are shown below in

the following relations:
w
For ---- < 1
s
3.68 εr
C Total = ------------------------ pF/ft.
4s
log 10 -----
w
When using this calculation, the result will be approxi-
mately 2% high for W/S < 1⁄2 and approximately 10%
high for W/S = 1.
w
For ---- > 1
s

C Total = 2.7 ---- εr ⋅ 1 + -------  1 + 2.303log 10 ----------- pF/ft.

w s 2πw
s πw  s 

41
© 1999/2000 Teledyne Electronic Technologies

Electrical Design

One Side
Shielded

b= 40"
b= .036"
b= 32"
"
"

"

16"

12"
28
24

20
b=2h+t

0.0

0.0
0.0
0.0

0.0

0.0

0.0
t h

0
b=

b=

b=

b=

b=
0.10

0.09

Conductor width‚ W(inch)

0.08

0.07

0.06

0.05

0.04

0.03

0.02

0.01
20 30 40 50 100 200
Conductor-to-shield capacitance (picofarads/foot)

Figure 4-10. Typical conductor-to-shield capacitance for 2-oz. copper

conductors insulated with FEP Teflon®.

“X” PF/FT

No “Guard” Conductors

0.8 “X” PF/FT

Peripheral “Guard” Conductors

0.12 “X” PF/FT

Interspersed Peripheral “Guard” Conductors

Figure 4-11. Conductor “guarding” by adjacent

grounded conductors.

42
© 1999/2000 Teledyne Electronic Technologies

5 Mechanical Design
© 1999/2000 Teledyne Electronic Technologies

Mechanical Design

Chapter Terms
Bookbinder Effect: A manufacturing technique in Hold Down Tabs: Conductive tabs extending from the
which the circuit layers are manufactured with progres- outside of an annular ring or other termination pad used
sive lengths in the flexible section. This allows the flexi- to help secure the pad to the substrate.
ble circuit to be tightly bent in limited space without Plated-Through Holes: A hole with plating on its walls
delamination. that makes an electrical connection between conductive
Conformal Coating: An insulating protective covering patterns on internal layers, external layers, or both, of a
that conforms to the configuration of the objects coated printed board.
when it is applied to a completed printed board assem- Polyimide: A dielectric film material commonly used
bly. for flexible circuit fabrication as an insulating layer.
Covercoat or Cover Lay: The layer of insulating mate- Terminal Pad: A portion of a conductive pattern that is
rial that is applied over a conductive pattern on the outer usually used for making electrical connections, for com-
surface of a printed circuit. Used for electrical insulation ponent attachment, or both.
and environmental sealing.
Unsupported Hole: A hole that does not required
Fiducial Mark: A printed board artwork feature (or fea- plating-through. Most often found in single- and dou-
tures) that is created in the same process as the printed ble-sided circuits.
board conductive pattern and that provides a common
measurable point for component mounting with respect Vias: A plated-through hole that is used as an interlayer
to a land pattern or land patterns. connection, but in which there is no intention to insert a
component lead or other reinforcing material.
Global Fiducials: Fiducial marks that are used to locate
the position of all of the land patterns on a printed
board.

44
 © 1999/2000 Teledyne Electronic Technologies

Mechanical Design

In addition to providing highly reliable and repeatable Bend Radii

electrical interconnection performance, flexible circuitry
Bend radii should always be kept as large as possible to
can significantly improve the electronic package by
prevent damage to the circuitry. Refer to Table 5-1. For
reducing both size and weight, and improving its
military applications the minimum allowable bend
appearance. This section covers the mechanical design
radius should be six (6) times the maximum overall
features that should be considered to fully utilize the
thickness for one and two conductor layer flexible
benefits of this technology.
products. An example of a one conductor layer flexible
product would be approximately 0.005" to 0.007"
Folding and Bending (125µm to 175µm) thick. Multiply the average thickness
One of the inherent characteristics of flexible circuitry is of 0.006" (150µm) by 6X and the minimum allowable
its ability to be flexed and bent during installation and bend radius would be from 0.030" to 0.042" (0.75mm to
use. To facilitate bending, care must be taken during the 1.06mm). A two conductor layer circuit would be
design stage to ensure proper material selection and approximately 0.012" to 0.0150" (300µm to 380µm), or
conductor placement. The formability of the flexible cir- a bend radius of 0.072" to 0.090" (1.82mm to 2.25mm).
cuit is dependent on both the insulating material used, A Type 3 multilayer circuit is a circuit with more than 2
and to a certain degree, on the thickness and the ductil- layers (usually products run from 3 to no more than 12
ity of the copper. layers) with plated through holes. These circuits have no
Terminal areas on a single-sided circuit can be designed rigid laminate to rigidize the connector patterns and
to allow for double access of the circuit by folding the have all the layers laminated together. This type of cir-
circuit. This method is more cost-effective than using a cuit would measure from 0.015" (380µm) to approxi-
double access (reverse bared) circuit or a double-sided mately 0.062" (1.57mm) thick. The minimum bend
circuit. The circuit can be formed using three methods radius of a Type 3 circuit is twenty-four (24) times the
— cold forming, thermoforming, or reinforced forming overall laminate thickness or 0.360" (914µm) to approx-
in which the copper weight and/or conductor widths are imately 1.5" (38.1mm) bend radius.
used to assist the circuit in maintaining a fold. The A Type 4 circuit or otherwise known as a Rigid Flex
folded portions of a circuit may be secured with either a Circuit could be designed with a minimum of 3 layers to
heat-activated adhesive, or a pressure-sensitive bonding an amount only limited by the manufactures capabili-
agent. When choosing any one of these three methods, it ties, usually about 25 to 30 layers. These circuits would
is advisable to use a small rod or wire mandrel to help be made up of single- or double-sided flex layers which
control the bend radius and to prevent the conductors would not be bonded together. This allows maximum
from becoming damaged during the forming operation.
Preheating the circuits to 65-125°C will also assist in BEND RADII
forming them.
Bend Radii
Continuous Flexing Circuit Type
Commercia Military

For any circuit that is required to operate in a continuous 1-Single-sided 1x 6x

flexing mode, it is important that the manufacturer be
2-Double-sided; plated 4x 6x
consulted regarding insulating material selection to through holes
ensure the unit will have the necessary mechanical and
electrical properties. The construction must allow the 3-Multi-layer, flexible; 24x 24x
copper to be in the neutral axis (centered between the plated through holes
dielectric materials). The design should also specify the 4-Single-sided; unbonded 5x 12x
use of the softer and more ductile rolled annealed cop- Double-sided, unbonded 7x 12x
pers, rather than electro-deposited, to prevent failures
caused by metal fatigue. Depending on the conductor 5-Multi-layer; no plated 12x 12x
layout, material selection, electrical conditions, the through holes
environment to which the circuit will be exposed, and 1Commercial - flex to install
the bending modes, flexible circuitry can provide over 2Military - no electrical or mechanical damage after 25 flex
500,000 flex cycles before failure. cycles

Table 5-1.

45
© 1999/2000 Teledyne Electronic Technologies

Mechanical Design

flexibility. This type of circuit it is recommended to use Flex Section Length

a bend radius of twelve (12) times the overall flexible
thickness cross-section. For multi-layer rigid-flex the designer must calculate the
overall length of the flexible section to assure that it will
TYPICAL MATERIAL THICKNESS be long enough to allow the circuit to fold into the
intended shape without putting unnecessary stress on
COPPER the materials. The formula used to calculate the flex
Weight Thickness length takes into account the bend radius required as
outlined in the previous section Bend Radii. Please refer
1/ ounce 0.0007" 17µm
2 to this section for direction on how to calculate the bend
1 ounce 0.0014" 35µm radii for your application.

2 ounce 0.0028" 70µm Rigid Board “A”

3 ounce 0.0042" 105µm

EPOXY PREPREGS
2πr
Thickness Xa Arc Length 4
Glass Style (after lamination) a = 0.350"
106 0.0015" ± 10% 35µm
Xb
1080 0.0028" ± 10% 70µm 0
Rigid Board “B”
DIELECTRIC MATERIALS b = 0.250"
0
Film Adhesive Laminate
Thickness Thickness Thickness Figure 5-1. Factors to consider when calculating flex
length for a 90° to 135° bend.

Polyimide Film as Base Laminate on

Single-Sided Circuitry or Innerlayer To Calculate Flex Length For 90°
Bend
1 mil adhesiveless 0.001" 25µm
The formula used to calculate flex length for a 90° bend
1 mil 1 mil/one side 0.002" 50µm (and up to 135°) is as follows:
2 mil 1 mil/one side 0.003" 75µm 2πr
F.L. = --------- + ( X a + X b )
4
Polyimide Film as Base Laminate on
Double-Sided Circuitry or Innerlayer where:

1 mil adhesiveless 0.001" 25µm

F.L. = Flex Length
2πr
1 mil 1 mil/two side 0.003" 75µm --------- = Arc Length
4
2 mil 1 mil/two side 0.004" 100µm
r = radius, which must be equal to 12 x t, where t = flex
Polyimide Film as Covercoat thickness
1 mil 1 mil/one side 0.002" 50µm X a = a-r and
2 mil 1 mil/one side 0.003" 75µm X b = b-r
1/ mil 1 mil/one side 0.0015" 35µm
2 The following is an example of this equation for the lay-
out shown in Figure 5-1. In this example:
1 mil 1 mil/one side 0.003" 75µm
a = 0.350"
2 mil 1 mil/one side 0.004" 100µm b = 0.250"
t = 0.010"
Table 5-2.

46
 © 1999/2000 Teledyne Electronic Technologies

Mechanical Design

First calculate for r: Also, the distance to any wall or obstruction in the flex
r = 12 x t where t = .010 area must be known so that the flex section will not be
r = 12 x .010 = 0.120" too long. Refer to Figure 5-2.
Next calculate Xa:
X a = a-r Container Wall

X a = .350 – .120 = 0.230 "

0.750"
Next calculate Xb:
Xb = b – r b = 0.500"
X b = .250 – .120 = 0.130 "
Note: Value for either a or b must always be larger than
value for r.
Figure 5-2. Constraints to consider for flex length for a
To calculate the flex length using the formula: 135° to 180° bend.

2πr The formula used to calculate flex length for bend

F.L. = --------- + ( X a + X b ) angles greater than 135° and up to 180°, is:
4
2πr
2πr ( .120 ) F.L. = ---------
F.L. = ------------------------ + ( .230 + .130 ) 2
4
In this equation r is the radius found when measuring
F.L. = 0.548" the desired distance between the boards (B dimension in
Rounded to the nearest 2 place decimal: Figure 5-2.
F.L. = 0.55" r=B÷2
Note: The overall flex length must always be larger than The minimum bend radius, based on the thickness of the
a2 + b2 = c2 and less than a + b. flexible section, must still be considered. The calcula-
In our example the flex length equaled 0.55". tion is:
Therefore: r = 12 x t
a2 + b 2 = c 2 Refer to the section of this chapter titled Bend Radii for
additional information on calculating minimum bend
.3502 + .2502 = c2 radii.
.1225 + .0625 = c2 = .185 To calculate the flex length for the circuit shown in Fig-
c = .185 = 0.430" ure 5-2 the following values would apply:
and B = 0.500" (distance between the boards)
a + b = .350 + .250 = 0.600" r=B÷2
Therefore: .500 ÷ 2 = 0.250"
a2 + b2 = c2 < F.L. < a + b The calculated flex length would then be:
0.430" < 0.550" < 0.600" 2πr
F.L. = ---------
2
To Calculate Flex Length For 180° 2π ( .250 )
F.L. = ---------------------- = 0.785 "
Bend 2
To calculate a correct fit and flex length for rigid-flex For extremely tight bends in a limited space, rigid-flex
circuits that will be bent 180° the physical constraints of manufacturers can produce circuits in which the circuit
the unit must be known prior to calculating flex length. layers are manufactured with progressive lengths in the
The distance between the boards when folded, which is flexible section allowing for a “bookbinder” type effect
the maximum bend radius, must be taken into account. when folded. This type of design requires compensation

47
© 1999/2000 Teledyne Electronic Technologies

Mechanical Design

during the design and manufacturing processes, result- For circuits in which bend strengthening is necessary or
ing in a premium price. where cold forming is required, it will be necessary to
increase the ratio of copper to flexible dielectric. Copper
Fold Areas strips of various lengths can be built into the circuit as
shown in Figure 5-4 to strengthen selective areas.
The areas on a flexible circuit that are to be bent or
folded must be designed in a way that accommodates Bend Area
this type of application. The conductors should always
be laid out perpendicular to the fold line as shown in
Figure 5-3. Plated-through holes, component holes, sur-
face mount terminal pads, and mounting holes must be
located a minimum of 0.100" (2.54mm) away from the
fold area.
Bend Area

Copper
Strips

Figure 5-4. Strengthened techniques.

Tear Stops
DESIRABLE
The addition of tear stops is strongly recommended
where sharp interior corners must be used. There are
Bend Area several ways to incorporate tear stops into the design of
flexible circuits. One way is to supply a copper dam on
the artwork that will reinforce an interior angle. Another
is to supply glass-cloth or polyimide stiffeners to all
inside radii. These stiffeners can be heat laminated to
the circuitry when the covercoat is bonded and they will
provide the additional notch strength required. Of the
NOT two methods, the glass-cloth or polyimide stiffener is
DESIRABLE preferred. This method provides the needed support to
Bend Area prevent a tear, whereas copper reinforcement only helps
stop a tear from propagating. The additional copper also
must be part of the etched pattern and could affect the
layout of the conductive pattern. In applications requir-
ing a slit, the design should incorporate a tear stop at the
end of the slit.

NOT
DESIRABLE

Figure 5-3. Conductors should always be designed at right

angles to the fold line.

Another consideration when designing a circuit for a

folding application is the relative relationship of the vol-
ume of copper to the flexible dielectric. A circuit with Figure 5-5. Tear stops.
excessive edge distance in the fold area can cause fold-
ing problems, due in part to the memory characteristic
of the flexible laminate. In these areas it is advisable that
the edge clearance be greater than 0.020" (500µm), but
should not exceed 0.100"(2.54mm).

48
 © 1999/2000 Teledyne Electronic Technologies

Mechanical Design

covercoat lamination to allow access to the termination

areas. Notice that the pads incorporate hold down tabs
which are encapsulated by the covercoat. These tabs
help prevent the pads from lifting from the base dielec-
tric during soldering operations. Without them, the
covercoat opening must be reduced for a 360° 0.010"
(250µm) overlap of the pad, reducing the solderable
area.
TEAR
STOP
The slot method is used to bare more than one termina-
tion pad per opening. Because of the increased tooling
cost to punch an irregular shape, this method should be
used only as a last resort or when there are high produc-
tion volumes. Laser isolation is an alternative for small
Figure 5-6. Tear stops at the end of slits are needed to volumes or irregular shapes.
protect the circuit.
With the strip method, multiple termination pads can be
bared at one time using a variety of manufacturing tech-
Terminal Baring niques. This method has found widespread acceptance in
commercial applications because of its cost-effectiveness.
There are a variety of methods available to remove the
covercoat insulating material above the terminal pads to
electrically expose them. These methods are normally Circuit Periphery
used on single layer and double layer circuits that The shape of a flexible circuit should be as simple as
employ covercoats. For multi-layer applications, the possible. Sharp internal corners should be avoided. All
most cost-effective way to gain pad exposure is to add a internal radii should be reinforced with tear stops. All
pads-only layer to the artwork. This additional layer corners should be chamfered or have a radius of at least
provides sufficient copper for through hole plating while 0.015" (375µm). Edge distance tolerances should be as
excluding the costly operations of adding predrilled loose as possible without affecting space requirements
covercoats to the multi-layer circuit. Because all copper for electrical insulation. Avoid tolerances tighter than
outside of the pad areas is etched away, there is no 0.010" (250µm).
plated copper on the conductors, resulting in greater
flexibility. Figure 5-7 shows three of the most common
terminal baring techniques used in flexible circuits.
Shock and Vibration Considerations
The individual baring method is preferred for military When a flexible circuit is to be subjected to a shock or
applications. Using this method, the covercoat insulat- vibration environment, special attention must be placed
ing material is either pre-drilled or pre-punched prior to on the components and their placement, as well as the
proper securing of the circuit itself. The components
that will be mounted on the board should be lightweight,
low profile components, with inherent strain relief.
Components having irregular shapes, especially those
having a large mass and a high center of gravity, should
be avoided. If these types of components must be used,

Individual Slot
Fasteners

Strain
Relief

Strip
Figure 5-7. Three methods for baring conductor terminals Figure 5-8. Strain bars, screws or clips can be used for
in flex circuits. circuit mounting.

49
© 1999/2000 Teledyne Electronic Technologies

Mechanical Design

they should be placed in a rigidized section of the circuit Epoxy

where proper fastening can be achieved. Proper atten- Flexible
tion must be paid to workmanship during assembly and Layers
handling to assure that the component leads are properly
Rigid
bent and not nicked. Components should always be Material
mounted in such a way as to minimize movement. For
axial leaded components weighing more than 0.25
ounce (7 grams) that are impractical to clamp, proper
mechanical strengthening can be accomplished by
encapsulating the leads using an epoxy based adhesive Figure 5-10. Terminal areas can be potted for strain relief
material. This method will provide mechanical support and environmental protection.
and will isolate the solder joints from the environment.
stiffness. Common reinforcement materials are 0.005"
To reduce the effects of shock and vibration on the cir-
(125µm) or thicker polyimide films and epoxy glass;
cuit itself, it is necessary to provide support to both the
less common materials are polyester film, sheet metal
rigidized and flexible sections. Mounting can be accom-
and phenolics. These stiffeners are normally bonded to
plished by providing mounting holes as part of the
the flexible circuit with an adhesive similar to that used
periphery of the circuit, as shown in Figure 5-9. Mount-
in the construction of the flexible circuit itself. Alterna-
ing hardware such as screws, strain bars or clips can be
tive adhesives such as heat-activated or pressure-sensi-
used in conjunction with these mounting holes for prop-
tive adhesives can be used depending on the particular
erly securing the flexible circuit.
application. With heat-activated adhesives, the curing
Internal regime must be carefully controlled. Once the stiffeners
Mounting are bonded to the flexible circuit, rework of the assem-
bly can become an issue.
Holes drilled in the stiffener material should be drilled a
minimum of 0.014" (350µm) larger in diameter that the
corresponding holes in the flexible circuit. This oversiz-
Mounting ing of the hole diameters will allow for any misregistra-
Holes tion of the stiffener to the pads on the circuitry. When an
Reinforcement
epoxy glass material is used as a stiffener, it is beneficial
to add a bead of strain relief to provide a radius between
the rigid material and the flexible circuit. This assists in
External the transition from the rigid to the flexible sections and
Mounting Copper
prevents damage during flexing operations.
Mounting

zzz
yyyy




,,,,
Hole Tolerances
There are many operations involved in the manufactur-
ing of flexible circuitry. Each operation may introduce
Dielectric some error. It is important that these tolerances be

Reinforcement Flexible Circuit

Figure 5-9. Mounting holes can be built in, internally or

externally, to secure circuits.

Rigid Reinforcement Epoxy Fillet

Single-sided and double-sided flexible circuits can be

stiffened in certain areas by the addition of a rigid rein-
forcement material. This provides areas for component Stiffener
mounting, as well as additional mechanical strength and Figure 5-11. Strain relief using an epoxy fillet.

50
 © 1999/2000 Teledyne Electronic Technologies

Mechanical Design

Plated-Through Holes
Plated-through holes provide Z-axis interconnects

|

z{
y


|,,
z{
y
between multiple layers. This is done by terminating
innerlayer etch runs with a pad, and then, after final lam-
ination, drilling a through hole in the circuit to allow
Stiffener for access to these pads from the outside layers. By plating
Pad Reinforcement a coating of conductive material (normally copper) in
the through-hole, electrical continuity is provided so
that components may be soldered to the surface of the
circuit and still interact with conductors that would oth-
Figure 5-12. Stiffener erwise be buried. This same method of interconnection
is used to link traces from front to back on a double-
considered during the design stage to ensure a circuit sided flex circuit; in this case the material is generally
design that is both producible and cost-effective. predrilled and through-hole plated, and the image is
The flexible laminate used in the processing of flexible then matched to the drilled holes.
circuitry is not highly stable, making it difficult to hold There are some guidelines that should be followed when
tight tolerances. The growth or shrinkage potential for designing plated-through holes.
some of these flexible laminates can be as high as 0.3% 1) The plated-through hole diameter should be 0.010"
depending on environmental conditions. Liberal toler- to 0.020" (250µm to 500µm) larger than the diameter of
ances should be accommodated whenever possible and the component lead that is to be inserted and soldered.
where the design allows.
a) For components that are to be manually inserted, it
Because of the physical instability of the materials used is recommended that the holes be 0.010" to 0.012"
in the flexible sections relative to the rigid sections, it is (250µm to 300µm) larger than the diameter of the
important to reference dimensions relative to rigid sec- component lead.
tions only. As shown in Figure 5-13, the dimension
b) For components that are to be machine inserted,
between the two “A” datum is nominally 4.00"; how-
the holes should be 0.015" to 0.020" (375µm to
ever, since the materials in the flexible section do flex,
500µm) larger than the diameter of the component
this dimension cannot be used as a reference with an
lead to allow for machine positioning tolerances.
associated tolerance. Instead, the dimensions should be
referenced to some datum located on the rigid section of These dimensions permit component lead insertion with
the assembly, such as the corner or edge, labeled as minimal interference and also provide the proper clear-
“AA” in the figure. The length of flex will allow ade- ance for sufficient soldering.
quate X, Y and Z axis movement for correct positioning 2) Plated-through holes should never be used for the
of the rigidized areas to the connector or other mounting mounting of eyelets, stand-off terminals, rivets, or other
device. Dimensioning should be limited to standard X devices that will place the hole in compression, which
and Y linear tolerances in these cases, with the tolerance will damage the plating in the hole barrel.
values appropriate to the design. 3) Care must be taken during innerlayer pad design to
provide enough land area on the pad for an annular ring
which will provide a good electrical connection to the
Rigid Section Flex Section Rigid Section
pad after drilling. Please refer to the Artwork Design
section of this Guide for additional information on pad
termination design.
4) For rigid-flex circuit designs, all plated-through holes
should be placed in areas where the hole or the compo-
2" 3" 2"
nent will not be subjected to any additional stress during
4.00 bending or flexing. Component holes should not be
A A placed any closer than 0.100" (2.54mm) to the rigid-to-
1.500 1.500 flex interfacial area. This will prevent any components
AA AA
from being placed in close proximity to the flex area.
Figure 5-13. Use of datum on rigid section. Vias holes can be placed as close as 0.050" (1.25mm) to

51
© 1999/2000 Teledyne Electronic Technologies

Mechanical Design

the rigid-to-flex interface, but 0.100" (2.54mm) from the circuit routing needed. The addition of circuit layers
interfacial area is preferred. rather than increasing the routing density on a signal
layer may often prove to be the appropriate tradeoff.
Non-Plated-Through Holes Assembly issues include not only the next level inter-
connect, but the board or substrate level as well. Dif-
Non-plated-through holes, also known as unsupported ferent layout approaches are used for gold wire bonding
holes, are used on single- and double-sided circuits for die directly to a substrate versus flip chip. Once again,
the mounting and soldering of components. The maxi- consultation with the fabricator will yield better results
mum diameter of an unsupported component hole in the long run.
should be not more than 0.020" (500µm) larger than the
To ensure that the design supports and accommodates
diameter of the component lead that is to be inserted,
any unique requirements that the assembly and test pro-
unless that lead is to be clinched. The hole diameter
cesses may impose, an understanding of those processes
should be a minimum of 0.008" to 0.010" (200µm to
is necessary. Fabricators will often use flying probe
250µm) larger than the diameter of the component lead
testers to test the bare board substrates. Most flying
to allow insertion with minimal interference. Proper pad
probe testers can test pitch densities as tight as 0.008"
design is important to be sure that there will be suffi-
(200µm) at the surface. However it may be wise to add
cient land area to facilitate soldering of the component.
test verification points in some locations to assist the test
Please refer to the section of this Guide titled Artwork
engineer. The board design may also require fiducials to
Design for additional information on pad termination
assist in the alignment and set up for wire bonding of
design for unsupported component holes.
bare die to the substrate. If encapsulation is required
Surface Mount Components over the die after bonding, be sure that there is an iden-
tified “keep out” area for vias around the device. If
Surface mount components should be located on the underfill will be used, be sure that the component
rigidized sections only on a rigid-flex board. The com- placement will allow for the application and cure of the
ponents edge should not be placed any closer than 0.100" material.
(2.54mm) from the rigid-to-flex interfacial area to prevent Surface flatness is much more critical for applications
any stresses to the component while flexing. Please refer using direct wire-bonds. The layout for copper weights
to the applicable IPC manuals for complete specifi- and material thickness must be balanced around the
cations governing the design of flexible and rigid-flex neutral axis or centerline of the board to prevent warp or
circuitry for use with surface mount devices. twist. The same is true for shield and signal layers. Care
should be taken to reduce the overall thickness of the
Multi-Chip Modules (MCM) laminate substrate to keep the aspect ratio at the plating
General Design process as low as possible. Aspect ratio is the com-
parison of the overall substrate thickness to the diameter
Fabrication of an MCM-L is very similar to the pro- of the hole prior to plating. Aspect ratios should not
cesses and operations that are used to produce standard exceed 6:1, otherwise product yield may decrease.
printed circuit boards. The design process is also very
similar to the steps used when designing a PC board. Materials
However, the design rules for feature sizes may change
to accommodate the circuit density requirement, so There are a number of organic materials available for
consult with the laminate fabricator regarding their use in printed circuit board fabrication which accom-
current capabilities prior to designing using these modate a variety of applications and requirements. The
advanced techniques. Electrical and thermal per- material choice will be based largely on the electrical
formance must be evaluated so board layout and com- and thermal requirements of the assembly. Epoxy glass,
ponent placement can be optimized for best results. or FR4, is the most commonly used material for fabri-
Environmental conditions, both during assembly and cating printed circuit boards. This material system
use, must be known so that the designer can choose exhibits good electrical and physical properties at a rela-
materials for highest reliability. Prudent use of blind, tively low cost. For applications where higher tem-
buried, or micro-vias can increase circuit density perature stability is desired, materials such as
without compromising producibility. Narrower line Bismaleimide triazine (BT resin) or polyimide resin
widths should be used where necessary to achieve the may be used for their high glass transition temperature

52
 © 1999/2000 Teledyne Electronic Technologies

Mechanical Design
.

DESIRED ELECTRICAL PROPERTIES MATERIAL PROPERTIES

Low dielectric constant 1.0 - 4.0 Dielectric CTE
Material Type
Constant ppm/°C
Homogenous dielectric Isotropic Properties
x/y z
Low dissipation factor ≤0.1% for desired
frequencies Silicon (SiC) 40 3.7

Table 5-3. Ceramic 7.2 8.1

Copper n/a 12
DESIRED PHYSICAL PROPERTIES
Epoxy Glass 4.5 15 60
Low moisture absorption <0.01%
Polyimide 3.6 55
Low rate of moisture <0.05%
Teflon Composites
absorption
Ceramic 3.0 17 24
High glass transition > 150 °C
temperature (Tg) Glass Filled 2.2 - 2.33 31 237
Low CTE (xy-plane) match Si (3.3 ppm/°C) Thermount 3.9 6-9 80/100

Low CTE (z-axis) match Cu (18ppm/°C)

Table 5-5.
High Cu adhesion ~ 6lbs/in

High modulus of elasticity reduce encapsulant Thermal Considerations

induced camber
Heat dissipation is a key player in the reliable operation
Table 5-4. of an MCM. As temperature increases, either during
assembly or operation, materials within a substrate
expand at different rates causing thermal stresses both
(Tg) properties. Table 5-3 and Table 5-4 show the within the substrate itself and at the junction between
desirable electrical and physical properties for MCM-L the substrate and the chips. It is therefore important at
substrate materials. the design stage to accommodate the thermal character-
The use of a low dielectric constant material will istics of the module by allowing for methods of cooling.
enhance signal speed, but less thermally stable materials There are three modes of heat transfer — conduction,
could lead to reliability concerns by virtue of CTE mis- convection, and radiation. Radiation cooling is the least
matches of die to the substrate material. It is important efficient; therefore, thermal management efforts at
to choose materials that will best meet the application design should focus on convection or conduction
with sacrificing critical performance. For example, the cooling.
CTE delta between silicon and glass-reinforced epoxy Poor thermal conductivity through an organic substrate
material is 11x10-5. With a temperature delta of 100°C, is a major disadvantage for laminate-based MCM’s. As
the result is an 0.011" (275µm) mismatch between the a result, thermal characterization of the laminate sub-
die and the substrate. Table 5-5 provides a comparison strate is an important part of the design process.
of dielectric constant for common substrate materials Modeling of multilayered printed circuit boards is both
relative to that of silicon. more critical and more complex considering the varied
Another important, and often overlooked, design materials found in a typical PCB. Software packages are
requirement is to balance the copper and dielectric available to perform thermal analysis based on the
thickness around the “neutral axis” or center of the sub- thermal conductivity of the materials used but they
strate. This is necessary to reduce the tendency of the require analyzing each material independently, a task
finished product to warp or deflect during assembly. If that is arduous and produces questionable results. One
soldermask or other type of overcoat is to be applied to method often practiced to model this complex heat
the board surface, it should be equally applied to both transfer problem is to lump the conductive properties of
sides to reduce the tendency of the encapsulant to the individual layers into a single, effective thermal con-
introduce camber. ductivity, Keff. Designers can then perform the thermal

53
© 1999/2000 Teledyne Electronic Technologies

Mechanical Design

characterization of the composite using this single value The proportionality constant is the thermal conductivity
to simplify the process. Table 5-6 lists the thermal dissi- of the material, k. For a chip mounted on a thin sheet of
pation values for various materials used in MCM’s. material, Dx is just the sheet thickness d, and the heat
Power device placement is a prime example of a generated is equal to the power dissipated, P. The tem-
potential heat source on a substrate. During operation perature difference DT across the sheet is simply:
these devices generate a higher heat profile than other ∆T = Pd/(kA)
components. Power devices, or other potential heat No information relative to the time it takes to develop
sources should be separated from each other to this temperature differential is included in the above, but
minimize localized temperature rises. To help identify for electronic systems design, only the perceived
areas of concern computer thermal modeling can be maximum temperatures are of concern. As long as the
used that would identify areas that may generate conductance has a single main direction, contributions
excessive heat. Thermal vias are used to channel heat of different layers may be added.
through the board to reduce localized hot spots. The vias
can either connect to an external heatsink or to large As a first assessment on the temperature difference to
innerlayer planes of copper that act as heat spreaders for develop across the substrate stack shown in Figure 5-14,
vias and lateral heat dissipation may be neglected, and
better transfer of heat through conductive cooling.
the area may be assumed to have the same size as that of
THERMAL CONDUCTIVITY OF the chip. The largest DT will arise from the chip with
VARIOUS MATERIALS the highest power density, P/A.
Assume the system we are analyzing has three chips
Material Type k (W/mK) with power densities as shown in Table 5-7.
Silicon (SiC) 270 POWER DENSITIES
Ceramic (Al2O3) 30
Power Chip Size Area P/A
Copper 386.0 Chip (W) (mil) (cm2) (W/cm2)
Epoxy Glass (FR4) 0.41 #1 0.65 211 0.287 2.26
Polyimide Film 2.87x10-4* #2 2.40 238 0.397 6.05
Teflon Composites #3 0.75 140 0.127 5.93
Ceramic Filler 0.50 Table 5-7.

Glass Filler 0.20 The highest value is exhibited by Chip #2; the smaller
Chip #3 has almost the same power density.
Thermount (epoxy) 0.187
The thermal conductances of the polymeric materials,
*Polyimide film value expressed cal/cm sec K units namely the polyimide and prepreg layers, are no larger
Table 5-6. than 0.19 W/mK. That results in a temperature differ-
ential of about 15°C per prepreg/polyimide layer, or a
total temperature difference of 180°C across the eight
Simplified Thermal Analysis (8) prepreg and four polyimide layers. See Figure 5-14.
Despite the alleviating factor that electrical copper vias
As an example of this simplified method, an analysis are going to reduce this difference, it cannot be assumed
can be performed for one dimensional heat flow from a that the maximum permissible temperature difference of
steady source of heat through a material with a constant 50°C might be maintained with this design.
thermal conductivity. Figure 5-14 shows the cross-sec-
tion of the multiple layers that make up the MCM used As a result of this estimate, thermal vias will be
in this example. Under these conditions, Fick’s first law introduced into the design, as shown in Figure 5-15. In
states that the thermal conductivity is given by: this example, the thermal vias are designed to have an
outer diameter of 0.008" (200µm), and a plating
∆Q/∆t = kA ∆T/∆x thickness of 0.001" (25µm). The copper cross section of
In other words, the heat flow is proportional to the tem- these vias is 0.0134 mm2 per via. A total of 16 vias are
perature gradient, DT/Dx, and the area of the heat flow, A.

54
 © 1999/2000 Teledyne Electronic Technologies

Mechanical Design

Material Thickness The following tables give the results of this model for
(mil)
Solder mask 1.0
the three chips in this example. For Chip #1, a total tem-
Copper 1.2 perature difference of only 6.3°C is predicted, roughly
Polyimide 2.0
Copper 1.2 half of it due to the thermal vias, the other half due to
Prepreg 1.8 the epoxy layers. As the number of thermal vias has not
Prepreg 1.8
increased proportionally to the power of Chip #2, the
Copper 1.2
Polyimide 2.0 temperature drop across the vias is higher, leading to an
Copper 1.2
Prepreg 1.8
overall DT of slightly below 8°C. For Chip #3, the very
Prepreg 1.8 small number of thermal vias creates a relatively high
Prepreg 1.8 temperature gradient, so that the overall heating effect is
Copper 1.2
Polyimide 2.0 about the same for all three chips. The heating of less
Copper 1.2
than 10°C is an excellent example for the possibilities of
Prepreg 1.8
Prepreg 1.8 laminate technologies, if appropriate use is made of the
Copper 1.2 technological options.
Polyimide 2.0
Copper 1.2
Prepreg 1.8
Total: 36±4
Board Layout
Figure 5-14. Original Layer Stack-up. During the layout phase of the board design, power and
ground layers are distributed throughout the laminate
introduced under Chip #1, 89 under Chip #2, and structure as planes and connected to each other and the
41 under Chip #3. These vias are intended to end above critical signal paths through plated vias. These vias are
the last layer of the prepreg, to assure good isolation either drilled through holes, blind vias to connect a
between the different backside potentials of the chips surface layer to an internal layer, or buried vias that
involved. In this configuration, more than 75% of the connect internal layers to each other, although the latter
temperature differential occurred in this last prepreg will increase processing difficulty. Circuit routing
layer. density is primarily dependent on the pad pitch that can
be achieved, specifically in the areas where the die will
Chip
be placed. Advances in high density circuit routing have
Epoxy
Copper pad been made possible by incorporating the use of micro-
vias allow for pad densities as high as 350 pads/inch.
Copper vias The use of finer pitch components requires a reduction
in the trace width and spacing width as well. Traditional
circuit board densities for surface mount devices require
Copper pad
Thermal epoxy trace width and spacing on the order of 0.007" (175µm).
For chip-on-board MCM-L applications, where routing
Heat sink may be required to four rows of pads for high I/O
devices, 0.002" (50µm) trace width and spacing may be
Figure 5-15. Configuration used for thermal modeling. required.
It is important to balance the essential features of the
In this example which is taken from an actual manu-
design with the fabricators’ capabilities and not design a
factured product, the customer chose to minimize
product that is extremely difficult to manufacture.
thermal resistance by mounting the entire substrate with
Features such as via diameter, trace and space width,
a 0.002" (50µm) thick layer of thermally conductive
registration tolerance/pad size, and number of layers are
epoxy adhesive onto their heat sink. Refer to Figure 5-
all interrelated; changes to one of these features imply
15. To have good thermal contact from the end of the
changes to one or more of the others to maintain the
vias, a lateral heat-spreading copper pad was necessary.
same routing density.
At a thickness of 0.0012" (30µm), it may be approx-
imated as a thermal conductor with its full area. Here, a
slightly higher temperature gradient for the spreading is Component or Die Placement
realistic, but as the entire temperature difference built up Components need to be carefully placed on the substrate
in this layer is extremely small, this complication can be with consideration given to electrical performance and
disregarded. thermal requirements. Sensitive components should be

55
© 1999/2000 Teledyne Electronic Technologies

Mechanical Design

CHIP 1

Layer d (mm) P (W) k (W/mK) A (mm2) DT (°C)

Conductive Epoxy 0.025 0.75 1.2 12.7 1.230

Copper 0.0305 0.75 390 12.7 0.0046

Copper vias 0.84 0.75 390 0.5635 2.867

Copper pad 0.0305 0.75 390 12.7 0.0046

Thermal Epoxy 0.045 0.75 1.2 12.7 2.215

Total: 6.321

CHIP 2

Layer d (mm) P (W) k(W/mK) A (mm2) DT (°C)

Conductive Epoxy 0.025 2.40 1.2 39.7 1.260

Copper 0.0305 2.40 390 39.7 0.0047

Copper vias 0.84 2.40 390 1.2232 4.226

Copper pad 0.0305 2.40 390 39.7 0.0047

Thermal Epoxy 0.045 2.40 1.2 39.7 2.267

Total: 7.762

CHIP 3

Layer d (mm) P (W) k(W/mK) A (mm2) DT (°C)

Conductive Epoxy 0.025 0.65 1.2 28.7 0.472

Copper 0.0305 0.65 390 28.7 0.0018

Copper vias 0.84 0.65 390 0.22 6.364

Copper pad 0.0305 0.65 390 28.7 0.0018

Thermal. Epoxy 0.045 0.65 1.2 28.7 0.849

Total: 7.688
Table 5-8.

isolated from components that may cause interference. The bond pad must also be large enough to permit one
Bare die must be spaced appropriately to allow for or more rework operations since it may be impossible to
encapsulation after assembly. Land pattern geometries achieve a good bond in the exact same site from which a
and pitch densities have to allow adequate space for die wire was removed. If components such as SMT or BGA
and component placement. Typical pitch spacing for packages are used, provisions for rework must be incor-
chip-on-board devices on laminate are: porated.
• Pitch spacing = 0.012" (300µm) on center
• Land widths = 0.006" - 0.008" (150µm - 200µm)
• Land spacing = 0.004" - 0.006" (100µm - 150µm)

56
 © 1999/2000 Teledyne Electronic Technologies

Mechanical Design

Wire Bonding to MCM-L Substrates finish is usually 0.50µm to 1.0µm barrier layer of low
stress nickel plating over the copper traces. The final
Both aluminum and gold wire bonds have been used to
plating is typically specified as 99.9% purity, soft elec-
successfully connect die to an MCM-L substrate.
trolytic gold plate, 0.5µm to 0.75µm thick.
Aluminum wedge bonding requires a temperature less
than 100°C and has been successfully used for Module rework is a major concern when using direct die
consumer applications. Gold wire bonding is currently attachment to laminate substrates. The use of an
the most prevalent attachment method and requires a adhesive that is reworkable is strongly recommended.
temperature of 150°C which is higher than the Tg of During rework the gold wires are either pulled or cut to
some FR4 materials (~125°C). For applications in facilitate the removal of the defective die. Heat is then
which there are a high number of bond pads, this could applied to soften the adhesive and the component is
lead to a reliability concern as the FR4 material is held removed. Special care must be taken to not degrade the
at a temperature above its Tg for an extended period of bond pad adhesion during the rework procedure. This is
time. For these applications, it would be wise to choose accomplished by limiting the time the unit is above the
a surface material with a higher Tg such as Polyimide or materials Tg during rework or repair.
BT resin. For both types of wire bonding, the surface

Product Example

57
© 1999/2000 Teledyne Electronic Technologies

6 Artwork Design
© 1999/2000 Teledyne Electronic Technologies

Artwork Design

Chapter Terms
Annular Ring: That portion of a conductive material direct a photopolotter in generating photoplotted
completely surrounding a hole. artwork.
Cover Lay or Covercoat: The layer of insulating mate- Hold Down Tabs: Conductive tabs extending from the
rial that is applied over a conductive pattern on the outer outside of an annular ring or other termination pad used
surface of a printed circuit. Used for electrical insulation to help secure the pad to the substrate.
and environmental sealing. Plated-Through Hole: A hole with plating on its walls
Dielectric: A material with a high resistance to the flow that makes an electrical connection between conductive
of electrical current. patterns on internal layers, external layers, or both, of a
Delamination: A separation between plies within a base printed board.
material, between a base material and a conductive foil, Terminal Pad: A portion of a conductive pattern that is
or any other planar separation within a multi-layer usually used for making electrical connections, for com-
printed board. ponent attachment, or both.
Gerber Data: A type of data that consists of aperture Unsupported Hole: A hole that does not required plat-
selection and operation commands and dimensions in ing-through. Most often found in single- and double-
X- and Y-coordinates. The data is generally used to sided circuits.

59
© 1999/2000 Teledyne Electronic Technologies

Artwork Design

Regardless of the care taken in the overall design, The appropriate graphs and nomographs to assist in
whether a finished flexible circuit meets the overall determining these parameters can be found in the Elec-
requirements of the system or not is ultimately deter- trical Design section of this Guide.
mined by the artwork used to produce the etched In general, all flat rolled annealed copper foil will have
pattern. In the artwork, all the conductor runs are laid some etch loss during processing. Teledyne Electronic
out, the termination areas defined, and the periphery Technologies adds an etch loss factor to conductors in
dimensions outlined. It is important to have all the elec- the artwork. Table 6-1 lists typical etch loss compensa-
trical and mechanical parameters well defined prior to tion for various copper thicknesses. The figures pre-
starting the artwork design. Please refer to the Electrical sented are considered conservative; current
Design and Mechanical Design sections of this Design manufacturing processes yield somewhat better results.
Guide before starting the actual artwork design.
ETCH LOSS FACTORS
Automated Artwork Ounce Weight Compensation
CAD/CAM design workstations find increasing use in Copper (Minimum) (Minimum)
flexible circuitry design and manufacturing. CAD/CAM
1/2 + 0.0005" 12.5µm
equipment can produce the artwork master patterns,
mechanical drawings, and drill programs. CAD/CAM 1 + 0.001" 25µm
workstations also result in the best layer-to-layer regis-
tration for multi-layer and rigid-flex designs. The com- 2 + 0.002" 50µm
puter allows the designer to design various layers to a 3 + 0.003" 75µm
master pad pattern for maximum registration accuracy.
To reduce lead times and provide more dimensionally 4 + 0.004" 100µm
accurate tooling, Teledyne Electronic Technologies has Table 6-1.
set up data-link workstations to send computer files
directly to tooling vendors via the internet. Using the factors in this table, a minimum conductor
width of 0.011" (275µm) would be used to obtain a
0.010" (250µm) finished conductor width using one
Supplied Artwork ounce copper. Good design practice maximizes the cop-
For designs that are already complete, the CAD/CAM per on the circuit where possible, without affecting elec-
computer can still be used to make any necessary trical characteristics.
changes to assure manufacturability of the circuitry.
This is accomplished by either reading the data directly Conductor Spacing
electronically, or by scanning an existing artwork master
Spacing requirements for a flexible circuit are deter-
and translating the information to an electronic file for
mined by the desired electrical characteristics of the
input into the designer’s data base. The second method
design. Please refer to the Electrical Design section of
is not preferred and should be used only as a last resort
the Guide for additional information on spacing require-
due to overall accuracy issues. The supplied data is veri-
ments. The artwork should be designed, as a minimum,
fied for produceability, and modified if needed.
with the actual spacing required.

General Artwork Design Rules Because etching on flexible circuitry is a subtractive

process, it is good practice to allow as much space as
possible and still meet the electrical and mechanical
Conductor Widths constraints of the system to account for irregularities in
Flexible circuit designers use nomographs to determine: the etching process.
• conductor widths
• conductor thicknesses
• equivalence to round wire gages
• width and thickness necessary for a maximum
10°C temperature rise due to the current carried
• cross-section required for a specific voltage drop

60
 © 1999/2000 Teledyne Electronic Technologies

Artwork Design

Conductor Routing
Not
Recommended Recommended “slabbed”
pad

Conductor
“neck-down”

Figure 6-3. Various configurations may be used to

maintain equal conductor spacing.

external angles should be avoided as they tend to cause

delamination by concentrating forces at one point.
3) when conductors enter into a pad area, it is important
Figure 6-1. Conductor routing examples.
to maintain equal spacing where the conductors pass
between the lands. It may be necessary to change either
the pad configuration or the conductor width or configu-
Conductor Routing ration. Examples of optional configurations are shown
There are several design practices that should be in Figure 6-3.
employed during the conductor routing phase to be sure 4) artwork should be designed with a balanced circuitry
that the artwork is designed for maximum manufactura- pattern where possible. Large open areas or congested
bility and also meets the mechanical constraints of the conductor runs should be redesigned for even conductor
application: placement. The circuit design in Figure 6-2 shows both
1) as mentioned in the Mechanical Design section of an improper design and a proper design with even con-
this Design Guide, all conductors should run perpendic- ductor placement.
ular to the fold line for any circuit that will be bent or For double-sided circuits or multi-layer combinations
formed in use. that use double-sided innerlayers, the conductors and
2) when establishing conductor routing, the designer spacing should alternate on opposite sides as shown in
must avoid using acute internal angles, which can trap Figure 6-4. This allows maximum flexibility without
etching acid causing improper etching. Also, sharp putting additional stress on the copper conductors.

Recommended

Not Recommended
Improper Proper

Figure 6-2. Balanced circuitry will improve producibility Figure 6-4. Offsetting conductors on opposite sides of
and flexibility. the circuit will reduce stresses in flexing applications.

61
© 1999/2000 Teledyne Electronic Technologies

Artwork Design

Terminal Construction All pads should incorporate the use of a fillet where the
conductor enters the pad as shown in Figure 6-6. This
Termination pads or fingers should be as large as possi- fillet will provide adequate strain relief between a con-
ble without violating spacing requirements. Terminal ductor and the pad area without impacting conductor
areas must be designed to accommodate the fabrication width or spacing requirements.
allowances inherent in the current manufacturing capa-
bilities of the fabricator. As shown in Figure 6-5, the
Fillet
final size of the terminal area is determined by the rela-
tionship among several factors:
• the size of the terminal hole
• the allowance for drilling tolerance
• twice the minimum dimension for the annular ring
surrounding the hole
• the fabrication allowance for standard (versus Figure 6-6. Pad-to-conductor strain relief fillets.
reduced) producability

Minimum Annular Ring

Annular Ring Dimension
Plating When designing pad terminations, it is important to
Tolerance account for both the annular ring requirements of the
circuit and the hole-to-pad ratio. The annular ring is the
Hole Diameter circular strip of conductive material that surrounds a
hole.
Terminal Area
Dimensions For unsupported, or non-plated-through holes, the
Figure 6-5. FAB Allowance. desired annular requirement is 0.015" (375µm) mini-
mum. The annular ring can be less than this only if the
In the example in Figure 6-5, the size of the terminal pad is anchored by hold down tabs or if the land is elon-
area is determined by Table 6-2. gated to provide an equivalent soldering surface. Please
refer to the following section titled Termination Pad
Design for Non-Plated-Through Holes., for additional
information.
PAD SIZE CALCULATION For supported, or plated-through holes, annular ring
considerations fall into two classifications.
Criteria Dimensions • The external annular ring, as the name suggests, is
on outside layers and in areas that will be solder
finished hole size 0.020" 500µm coated. The annular ring on external layers is the
plating tolerance +0.005" +125µm minimum amount of copper, at the narrowest
point, between the edge of the hole and the edge of
2x minimum annular +0.004" +100µm the land. The minimum external annular ring
ring dimension should measure 0.005" (125µm) for double-sided
standard fabrication +0.015" +375µm circuits requiring plating and for multi-layer and
allowance multi-layer rigid-flex circuits. This will allow for
soldering any components to the surface.
termination area = 0.044" = 1.10mm • The internal annular ring is the amount of the pad
diameter
that remains after the hole has been drilled. The
amount of internal ring remaining is important to
Table 6-2.
the electrical and mechanical integrity of the
plated-through hole. Internal annular rings for
multi-layer flex and rigid-flex should be 0.002"
(50µm) minimum. In applications where tight
hole-to-pad ratios exist, it is permissible to have

62
 © 1999/2000 Teledyne Electronic Technologies

Artwork Design

0.015" (375µm) Min. Unsupported Pad • by using a finger or rectangular pad configuration.
0.005" (125µm) Min. Plated-through The view in Figure 6-9 shows this type of terminal
area which is used when access to the flexible cir-
Pad cuitry is desired in the vertical plane. This style of
termination would be used when lap soldering
Hole pins flat to a circuit.

Desired Acceptable Not Acceptable

Figure 6-7. Annular rings minimum dimensions.
Copper
less than a 0.002" (50µm) internal annular ring, as Finger
long as the hole connection is not compromised. Dielectric

Termination Pad Design for Non-Plated- Figure 6-9. Vertical access using rectangular pads.
Through Holes.
Holes that do not require plating-through are termed Nomenclature Artwork and
unsupported holes. They are most commonly found in
single- and double-sided circuits. Pad design for unsup- Component Designation
ported holes must account for encapsulation of the pad To assist in component placement during assembly and
by the covercoat to prevent pads from lifting. This can identification during service, it may be necessary to
be accomplished in several ways: incorporate component designation in the artwork dur-
• by incorporating fillets and hold-down ears, as ing the design stage. The most cost-effective method of
shown in Figure 6-8, the covercoat openings can component identification is to incorporate the designa-
be as large as the land area, permitting the maxi- tions as part of the etched artwork. Care should be taken
mum amount of pad exposure. A pad that does not regarding placement of the designations so as not to
incorporate hold down tabs and fillets should have compromise electrical testing. For single-sided or dou-
a covercoat overlap onto the pad of 0.010" ble-sided applications, the etched nomenclature can be
(250µm) minimum. This will reduce the amount placed in any appropriate area. For multi-layer flex and
of solderable annular ring or require the use of rigid-flex the etched nomenclature is best placed in the
larger diameter pads. bonded or rigidized areas on the outer layer artwork.
The lettering should be designed as large as possible to
A. B. assure clarity after etch. Care should be taken not to vio-
late any spacing requirements.
Due to the high circuit density, nomenclature in surface
mount applications is typically applied with silk screen
artwork and epoxy ink. The screened nomenclature on
the artwork should be designed as large as possible for
C. D. clarity. Care should be taken to not place nomenclature
over any areas that will be solder coated to prevent dis-
tortion during the assembly process. Component orien-
tation must be considered to assure that no
nomenclature will be covered by any part of the compo-
Figure 6-8. Pad tie-down methods. nents or hardware. Understanding of the formed config-
uration is also important so that all pertinent marking
A. Pad overlapped by covercoat insulation 0.020"
will be visible after forming and final installation.
(500µm) for 360°.
Finally, placement of nomenclature should include
B. Elongated pad allows tighter pad densities with
information to aid in electrical testing.
sufficient pad encapsulation.
C. & D. Fillets and hold-down ears permit the cover-
coat opening to be as large as the pad for maxi-
mum pad exposure.

63
© 1999/2000 Teledyne Electronic Technologies

7 Design Checklists
 © 1999/2000 Teledyne Electronic Technologies

Design Checklists

Electrical Design Checklist Mechanical Design Checklist

Use the following checklist to confirm that your circuit Use the following checklist to confirm that your circuit
design will provide maximum interconnect performance design will provide maximum interconnect performance
and producibility. And be sure to enlist the consultation and producibility. And be sure to enlist the consultation
of our design and manufacturing engineers before final- of our design and manufacturing engineers before final-
izing your specifications. Our extensive experience with izing your specifications. Our extensive experience with
electronic interconnection designs can provide the most electronic interconnection designs can provide the most
cost-effective solution for your packaging needs. cost-effective solution for your packaging needs.
The design should specify the conductor width, conduc-
tor spacing and conductor thickness. Fold Areas
❑ Is the minimum width sufficient for current ❑ Do conductors run perpendicular to the fold?
requirements? ❑ Has extra copper been added to help hold the
❑ Is the minimum width sufficient for resistance formed shape when folded?
requirements? ❑ For multi-layer and rigid-flex circuits, is the bend
❑ Is the minimum spacing sufficient for voltage radius a minimum of 12 times greater than the
requirements between conductors? circuit thickness?
For designs requiring transmission line properties, such ❑ Are tear stops utilized where folds end internally?
as impedance and capacitance control, the design will
need to specify the values required for: Circuit Profile
❑ dielectric requirement between layers.
❑ dielectric requirement between conductors. ❑ Is sufficient edge distance specified to cover the
minimum spacing requirement plus additional
profiling tolerances?
❑ Are all internal corners radiused and reinforced
with tear stops?
❑ Are all external corners chamfered or radiused?

Stiffeners and Reinforcements

❑ Are stiffening location marks utilized on the
artwork?
❑ Are hole diameters in the stiffeners a minimum of
0.014" (350µm) larger than the through hole in the
circuit?
❑ Has strain relief been specified to form a radius at
the edge of thick stiffeners?
❑ Has the adhesive for bonding the stiffener been
specified?
❑ Have mounting holes been provided?
❑ Have potential rub or wear areas been reinforced?

Tolerances
❑ Are all tolerances specified on the master
drawing?
❑ Are tolerance ranges liberal enough to allow for
cost-effective manufacturing?
❑ Are tolerances generated from a zero reference
point to prevent a stack-up of tolerances?

65
© 1999/2000 Teledyne Electronic Technologies

Design Checklists

Mechanical (con’t) Artwork Design Checklist

Use the following checklist to confirm that your circuit
Environmental design will provide maximum interconnect performance
❑ Have operating and maximum temperatures been and producibility. And be sure to enlist the consultation
defined? of our design and manufacturing engineers before final-
❑ Have materials been chosen that will support the izing your specifications. Our extensive experience with
application for: electronic interconnection designs can provide the most
• reflow? cost-effective solution for your packaging needs.
• wave solder assembly?
• moisture absorption? Conductors
• tensile strength?
❑ Are the conductors parallel and consistent in
• flammability?
width?
• thermal cycling?
❑ Are the conductors on double-sided circuits and
double-sided innerlayers offset from top to
bottom?
❑ Are conductors centered between holes and pads?
❑ Have conductors been routed in the shortest
possible paths?
❑ Have conductors been designed to avoid acute
internal and external angles?
❑ Have the conductors been routed in such a way as
to avoid passing between two used pads in
connector areas?

Shielding
❑ Have guard conductors been used to isolate certain
conductors?
❑ If full shielding is specified, have cross-hatched
patterns in flex areas been utilized?

Terminal Pads
❑ Do all pads have fillets?
❑ Do pads for unsupported holes have tie-down
ears?
❑ Are pads large enough to account for annular ring
requirements?
❑ 0.015" (375µm) for unsupported holes.
❑ 0.005" (125µm) for double-sided supported holes.
❑ 0 005" (125µm) for external annular ring on multi-
layer flex.
❑ 0.002" (50µm) for internal annular ring on multi-
layer flex.

66
© 1999/2000 Teledyne Electronic Technologies

8 Glossary
© 1999/2000 Teledyne Electronic Technologies

Glossary

A Assembly Drawing: A document that depicts the physi-

cal relationship of two or more parts, a combination of
Acceptance Tests: Those tests deemed necessary to parts and subordinate assemblies, or a group of assem-
determine the acceptability of a product and as agreed to blies required to form an assembly of a higher order.
by both purchaser and vendor.
Asymmetric Stripline: A stripline signal conductor that
Access Hole: A hole or series of holes in successive lay- is embedded, but not centered, between two ground
ers of a multilayer board. These holes provide access to planes.
the surface of the land on one of the layers of the board.
Automatic Test Equipment: Equipment that automati-
Access Hole cally analyzes functional or static parameters in order to
evaluate performance.
AWG Equivalent: The American Wire Gauge (AWG)
round-conductor number that is used to designate a flat
conductor with an equal cross-sectional area.
Land

Figure 8-1. Access Hole B

Back-Bared Land: A land in flexible printed wiring
Adhesiveless Laminates: A copper-clad composite of
that has a portion of the side normally bonded to the
polyimide film bonded to copper foil.
base dielectric material exposed by a clearance hole.
Alignment Mark: A stylized pattern that is selectively
Backplane: An interconnection device used to provide
positioned on a base material to assist in alignment.
point-to-point electrical interconnections. (It is usually a
Anchoring Spur: An extension of a land on a flexible printed board that has discrete wiring terminals on one
printed board that extends beneath the cover lay to assist side and connector receptacles on the other side.) (See
in holding the land to the base material. also, “Mother Board”)
COVER LAY Bake Out: Subjecting a product to an elevated tempera-
ture in order to remove moisture and unwanted gasses
prior to final sealing.
Barrel Cracks: Cracks that appear in the electro-plating
inside a plated through hole due to mechanical and ther-
Anchoring
Spurs mal stresses.
Figure 8-2. Anchoring Spur Base Material: The insulating material upon which a
conductive pattern may be formed.
Annular Ring: That portion of conductive material Base Material Thickness: The thickness of the base
completely surrounding a hole. material excluding metal foil or other material deposited
Artwork: An accurately-scaled configuration that is on its surfaces.
used to product the “Artwork Master” or “Production Basestock: See “Base Material”
Master”.
Blind Via: A via extending from an inner layer to an
Artwork Master: An accurately-scaled, usually 1:1, outer layer of a printed circuit board.
pattern that is used to produce the “Production Master”.
Aspect Ratio (Film): The ratio of the length of a film A B
component to its width. Blind Via

Aspect Ratio (Hole): The ratio of the length or depth of

a hole to its pre-plated diameter.
Assembly: A number of parts, subassemblies, or combi-
nations thereof joined together. (Note: This term can be Buried Via Interfacial
Connection
used in conjunction with other terms listed herein, e.g.,
“Printed Board Assembly”.) Figure 8-3. Vias (buried, through-hole and blind)

68
 © 1999/2000 Teledyne Electronic Technologies

Glossary

Blister: Delamination in the form of a localized swell- base materials in a single operation. (See also, “Foil
ing and separation between any of the layers of a lami- Lamination”.)
nate base material, or between base material and Center-to-Center Spacing: The nominal distance
conductive foil or protective coating. between the centers of adjacent features on any single
Board Thickness: The overall thickness of the base layer of a printed board. (See Figure 8-5.) (See also
material and all conductive materials deposited thereon. “Pitch”.)
Bond Enhancement Treatment: The improvement of Characteristic Impedance: The ratio of voltage to cur-
the adhesion of a metal foil surface to an adjacent layer rent in a propagation wave, i.e., the impedance which is
of material to which it is being attached. offered to a propagation wave at any point of the line.
Bow (Printed Board): The deviation from flatness of a Check Plot: An interim drawing used for graphical data
board characterized by a roughly cylindrical or spherical verification.
curvature such that, if the board is rectangular, its four Circuit: A number of electrical elements and devices
corners are in the same plane. (See Figure 8-4.) that have been interconnected to perform a desired elec-
trical function.
Circuitry Layer: A layer of a printed board containing
conductors, including ground and voltage planes.
Clad (adj.): A condition of the base material to which a
Bow relatively-thin layer or sheet of metal foil has been
bonded to one or both of its sides, e.g., “a metal-clad
base material”.
Clearance Hole: A hole in a conductive pattern that is
larger than, and coaxial with, a hole in the base material
Figure 8-4. Bow of a printed board.
B-Stage: An intermediate stage in the reaction of a ther- Clearance Hole
mosetting resin in which the material softens when
heated and swells, but does not entirely fuse or dissolve,
when it is in contact with certain liquids. (Also see “C-
Staged Resin”.)
Buried Via: A via that does not extend to either surface Conductive Pattern
of a printed board. (See Figure 8-3.) Figure 8-6. Clearance Hole

Coaxial Cable: A cable in the form of a central wire

C surrounded by a conductor tubing or sheathing that
C-Staged Resin: A resin in its final state of cure. serves as a shield and return.
Cap Lamination: The bonding process of making a Coefficient of Thermal Expansion (CTE): The linear
multilayer printed board with surface layers of single- dimensional change of a material per unit change in
sided metal-clad base material laminated with other temperature. (See also “Thermal Expansion Mis-
match”.)
Cold Solder Connection: A solder connection that
exhibits poor wetting and that is characterized by a
greyish porous appearance. (This is due to excessive
impurities in the solder, inadequate cleaning prior to sol-
dering, and/or the insufficient application of heat during
the soldering process.)
Compensated Artwork: Production master or artwork
data that has been enlarged or reduced in order to meet
Pitch
the needs of subsequent processing requirements.
Figure 8-5. Center-to-Center Spacing

69
© 1999/2000 Teledyne Electronic Technologies

Glossary

Component Density: The quantity of components on a Conductor: A single conductive path in a conductive
unit area of printed board. pattern.
Component Hole: A hole that is used for the attachment Conductor Base Width: The width of a conductor at
and electrical connection of component terminations, the plane of the surface of a base material. (See also
including pins and wires, to a printed board. “Conductor Width” and “Design Width of
Component Lead: The solid or stranded wire or formed Conductors”.)
conductor that extends from a component to serve as a Conductor Layer No.1: The first layer of a printed
mechanical or electrical connector, or both. (See also board that has a conductive pattern on or adjacent to its
“Component Pin”.) primary side.
Component Mounting: The act of attaching compo- Conductor Layer: The total conductive pattern formed
nents to a printed board, the manner in which they are on one side of a single layer of a base material. (This
attached, or both. may include all or a portion of ground and voltage
Component Mounting Orientation: The direction in planes.)
which the components on a printed board or other Conductor Side: The side of a single-sided printed
assembly are lined up electrically with respect to the board that contains the conductive pattern.
polarity of polarized components, with respect to one Conductor Spacing: The observable distance between
another, and/or with respect to the board outline. adjacent edges (not center-to-center spacing) of isolated
Component Pin: A component lead that is not readily conductive patterns in a conductor layer. (See also
formable without being damaged. (See also “Compo- “Center-to-Center Spacing”.)
nent Lead”.)
Spacing
Component Side: The primary side of a single-sided
assembly.
Composite (Phototool): A photograph that consists of
combination two separate (aligned) images.
Computer-Aided Design (CAD): The interactive use of
computer systems, programs, and procedures in the
design process wherein, the decision-making activity
rests with the human operator and a computer provides
the data manipulation functions.
Computer-Aided Engineering (CAE): The interactive Spacing
use of computer systems, programs, and procedures in Figure 8-7. Conductor Spacing
an engineering process wherein, the decision-making
activity rests with the human operator and a computer Conductor Thickness: The thickness of a conductor
provides the data manipulation functions. including all metallic coatings and excluding all protec-
Computer Numerical Control (CNC): A system that tive coatings.
utilizes a computer and software as the primary numeri- Conductor Width: The observable width of a conduc-
cal control technique. tor at any point chosen at random on a printed board as
Conductive Foil: A thin sheet of metal that is intended viewed from directly above unless otherwise specified.
for forming a conductive pattern on a base material. (See also “Design Width of Conductors” and “Conduc-
Conductive Pattern: The configuration or design of the tor Base Width”.)
conductive material on a base material. (This includes Conformal Coating: An insulating protective covering
conductors, lands, vias, heatsinks and passive compo- that conforms to the configuration of the objects coated
nents when these are an integral part of the printed when it is applied to a completed printed board
board manufacturing process.) assembly.
Conductivity: The ability of a substance or material to Connector: A device used to provide mechanical con-
conduct electricity. nect/disconnect service for electrical terminations.

70
 © 1999/2000 Teledyne Electronic Technologies

Glossary

Connector Area: That portion of printed wiring used D

for the purpose of providing external connections.
Datum: The theoretically-exact point, axis or plane that
Connector Contact: The conducting member of a con- is the origin from which the location of geometric char-
necting device that provides a separable connection. acteristics of features of a part are established.
Connector Housing: A plastic shell that holds electrical Delamination: A separation between plies within a base
contacts in a specific field pattern that may also have material, between a base material and a conductive foil,
polarization/keying bosses or slots. or any other planar separation within a multilayer
Continuity: An uninterrupted path for the flow of elec- printed board. (See also “Blister”.)
trical current in a circuit. Dent: A smooth depression in conductive foil that does
Copper Clad Laminate: Metal-clad base material that not significantly reduce the foil’s thickness.
has copper as the conductive material. Design Rule: Guidelines that determine automatic con-
Corner Marks: The marks at the corners of artwork ductor routing behavior with respect to specified design
whose inside edges establish, or help to establish, the parameters.
borders and contour of a printed board. Design-Rule Checking: The use of a computer-aided
Coupon (Breakaway): Coupons made as an integral design program to perform continuity verification of all
part of the end product board and connected as one conductor routing in accordance with appropriate design
piece, except one edge of the coupon has perforations or rules.
a thin section connected to the board which can be eas- Design Spacing of Conductors: The spacing between
ily broken off without damaging either the coupon or conductors as delineated or otherwise noted on the mas-
the board. ter drawing.
Cover Lay: The layer of insulating material that is Design Width of Conductors: The width of conductors
applied over a conductive pattern on the outer surface of as delineated or otherwise noted on the master drawing.
a printed board. (See also “Conductor Spacing”.)
Crazing: An internal condition that occurs in reinforced Desmear: The removal of friction-melted resin and
laminate base material whereby glass fibers are sepa- drilling debris from a hole wall.
rated from the resin at the weave intersections. (This
condition manifests itself in the form of connected white Develop (Phototool): The chemical treatment of radia-
spots or crosses that are below the surface of the base tion-modified photosensitive material in order to
material. It is usually related to mechanically-induced produce an image.
stress.) (See also “Measling”.) Diazo Material: A nonsilver, room-light hardening,
Crease: A ridge in a material that is caused by a fold or ultraviolet-sensitive coating material.
wrinkle being placed under pressure. Dielectric: A material with a high resistance to the flow
Crimp Contact: A type of connector contact whose of electrical current.
non-mating end is a hollow cylinder that can be crimped Dielectric Breakdown: The complete failure of a
onto a wire inserted within it. dielectric material that is characterized by a disruptive
Crosshatching: The breaking up of large conductive electrical discharge through the material that is due to a
areas by the use of a pattern of voids in the conductive deterioration of material or due to an excessive sudden
material. increase in applied voltage.
Crosstalk: The undesirable interference cause by the Dielectric Constant: The ratio of the capacitance of a
coupling of energy between signal paths. configuration of electrodes with a specific material as
the dielectric between them to the capacitance of the
Current-Carrying Capacity: The maximum electrical same electrode configuration with a vacuum or air as the
current that can be carried continuously by a conductor, dielectric.
under specified conditions, without causing objection-
able degradation of electrical and mechanical properties Dielectric Strength: The maximum voltage that a
of the product. dielectric can withstand under specified conditions with-
out resulting in a voltage breakdown, usually expressed
as volts per unit dimension.

71
© 1999/2000 Teledyne Electronic Technologies

Glossary

Dimensional Stability: A measure of the dimensional Etching: The chemical, or chemical and electrolytic,
change of a material that is caused by factors such as removal of unwanted portions of conductive or resistive
temperature changes, humidity changes, chemical treat- material.
ment (aging), and stress exposure. External Layer: A conductive pattern on the surface of
Dimensioned Hole: A hole in a printed board whose a printed board.
location is determined by physical dimensions or coor- Extraction Tool: A device used for removing a contact
dinate values that do not necessarily coincide with the from a connector body or insert, a component from a
stated grid. socket, or a printed board from its enclosure.
Double-Sided Printed Board: A printed board with a
conductive pattern on both of its sides. F
Drill Diameter: The actual size of the drill body.
Fiducial Mark: A printed board artwork feature (or fea-
tures) that is created in the same process as the printed
E board conductive pattern and that provides a common
Edge Spacing: The distance of a pattern or component measurable point for component mounting with respect
body from the edges of a printed board. to a land pattern or land patterns.
Effective Permittivity: (See “Dielectric Constant”.) Fillet, Adhesive: The portion of an adhesive that fills
the corner, or the angle formed, where two adherents are
Electrodeposited Foil: A metal foil that is produced by joined.
electrodeposition of the metal onto a cathode.
Fine-Pitch Technology (FPT): A surface-mount assem-
Electrodeposition: The deposition of a conductive bly technology with component terminations on less
material from a plating solution by the application of than 0.025" (0.625mm) centers.
electrical current.
First Article: A part or assembly that has been manu-
Electroless Deposition: The deposition of conductive factured prior to the start of a production run for the pur-
material from an autocatalytic plating solution without pose of ascertaining whether or not the manufacturing
the application of electrical current. processes used to fabricate it are capable of making
Electromagnetic Interference: Unwanted radiated items that will meet all applicable end-product require-
electromagnetic energy that couples into electrical con- ments.
ductors. Flexible Printed Circuit: A patterned arrangement of
Elongation: The increase in length of a material that is printed circuitry and components that utilize a flexible
caused by a tensile load. base material with or without a flexible cover lay.
Engineering Drawing: A document that discloses the Flexible Printed Wiring: A patterned arrangement of
physical and functional end-product requirements of an printed wiring that utilizes a flexible base material with
item by means of pictorial and/or textual presentations. or without a flexible cover lay.
Etch Factor: The ratio of the depth of etch to the Flexible Soldermask: A soldermask that when cured
amount of lateral etch, i.e., the ratio of conductor thick- over flexible circuits will not separate, fracture, or
ness to the amount of undercut. delaminate from the surface of the base material, con-
Etchant: A solution used to remove the unwanted por- ductors and lands of the coated flexible wiring. IPC-
tion of material from a printed board by a chemical TM-650, TM 2.4.29 specifies a minimum number of 25
reaction. cycles using a 0.125" (3.175mm) diameter mandrel.
Etchback: The controlled removal, to a specified depth, Flexural Failure: A failure that is caused by the
of nonmetallic materials from the sidewalls of holes in repeated flexing of a material.
order to remove resin smear and to expose additional Flexural Strength: The tensile strength of the outer-
internal conductor surfaces. most fiber of a material that is being bent.
Etched Printed Board: A board having a conductive Foil Lamination: A process for making multilayer
pattern that was formed by the chemical removal of printed boards with a surface layer(s) of metal foil
unwanted portions of a conductive foil. bonded in a single operation. (See also “Cap Lamina-
tion”.)

72
 © 1999/2000 Teledyne Electronic Technologies

Glossary

Foil Profile: The roughness of a foil surface that results Ground Plane Clearance: Removed portions of a
from the manufacture of the foil and/or from a bond- ground plane that isolate it from a hole in the base mate-
enhancement treatment. rial to which the plane is attached. (See Figure 8-8.)
Foreign Material (Soldering): A lumpy, irregular coat- shielding or heatsinking (See also “Voltage Plane”.)
ing that has covered, or partially covered, particles of
materials that are located on, but are different than, the Ground-plane
Clearance
material or coating of the items to be soldered.
Fork Contact: A type of female connector contact that Through-hole
consists of flat spring metal that has been formed into a
Conductive Nonfunctional
two-tine “fork-like” shape so that it mates with a spade Pattern Land
contact.
From-To List: Written instructions in the form of a list
that indicates the locations of wiring terminations. Ground-plane
Clearance
Fused Coating: A metallic coating, usually a tin or sol-
der alloy, that has been melted and solidified to form a Through-hole
metallurgical bond to a basis metal.
Conductive
Fusing: The combining of metals by means of melting, Pattern
blending and solidification.
Fusing Oil: A thermally stable, non-activated, fluid that Figure 8-8. Ground Plane Clearance
is used in the fusing of tin-lead plating on a basis metal.
(The application of these predominantly water-soluble
H
fluids is usually preceded by the use of a fusing flux.)
Haloing: Mechanically induced fracturing or delamina-
G tion, on or below the surface of a base material, that is
usually exhibited by a light area around holes or other
Gel Time: The time in seconds required for prepreg to machined features.
change its physical state from that of a solid material to
Hand Soldering: Soldering using a soldering iron or
a liquid, and then back to a solid material.
other hand-held, operator-controllable apparatus.
Gerber Data: A type of data that consists of aperture
Hard Wiring: Electrical wiring that is inseparable from
selection and operation commands and dimensions in
an assembly without the use of special tools and pro-
X- and Y-coordinates. (The data is generally used to
cesses.
direct a photoplotter to generate artwork.)
Heatsink: A mechanical device that is made of a high
Glass Transition Temperature: The temperature at
thermal-conductivity and low specific-heat material that
which an amorphous polymer, or the amorphous regions
dissipates heat generated by a component or assembly.
in a partially-crystalline polymer, changes from being in
a hard and relatively brittle condition to being in a vis- Heatsink Plane: A continuous sheet of metal on or in a
cous or rubbery condition. printed board that functions to dissipate heat away from
heat generating components.
Global Fiducials: Fiducial marks that are used to locate
the position of all of the land patterns on a printed Hipot Test: A method in which the unit under test is
board. subjected to a high alternating current (AC) voltage.
Ground: A common reference point for electrical cir- Hold-Down Tabs: Conductive tabs extending from the
cuit returns, shielding, or heat sinking. outside of an annular ring or other termination pad used
to help secure the pad to the substrate.
Ground Plane: A conductor layer, or portion thereof,
that serves as a common reference for electrical circuit
returns shielding, or heat sinking. (See also “Voltage
Plane”.)

73
© 1999/2000 Teledyne Electronic Technologies

Glossary

Hole Breakout: A condition in which a hole is partially Land Pattern: A combination of lands that is used for
surrounded by a land. the mounting, interconnection and testing of a particular
component.
Layer-to-Layer Registration: The degree of confor-
mity of a conductive pattern, or portion thereof, to that
of any other conductor layer of a printed board.
Layer-to-Layer Spacing: The thickness of dielectric
material between adjacent layers of conductive patterns
in a multilayer printed board.

Conductive
Figure 8-9. Hole Breakout Pattern
Layer-to-
layer
Hole Density: The quantity of holes in a unit area of Spacing
printed board. Dielectric

Hole Location: The dimensional position of the center Figure 8-10. Layer-to-Layer Spacing
of a hole.
LPISM: Liquid photo-imagable soldermask.
Hole Pattern: The arrangement of all holes in a printed
board with respect to a reference point.
M
I Master Drawing: A document that shows the dimen-
sional limits or grid locations that are applicable to any
Immersion Plating: The chemical deposition of a thin and all parts of a product to be fabricated, including the
metallic coating over certain basis metals that is arrangement of conductors and nonconductive patterns
achieved by a partial displacement of the basis metal. or elements; the size, type, and locations of holes; and
Insert (Connector): The element that holds connector all other necessary information.
contacts in their proper arrangement and electrically Measling: A condition that occurs in laminated base
insulates the contacts from one another and from the material in which internal glass fibers are separated
connector shell. from the resin at the weave intersection, (this condition
Interlayer Connection: A conductor that connects con- manifests itself in the form of discrete white spots or
ductive patterns on internal layers of a multilayer “crosses” that are below the surface of the base material.
printed board, e.g. a plated-through hole. It is usually related to thermally-induced stress.) (See
Internal Layer: A conductive pattern that is contained also “Crazing”.)
entirely within a multilayer printed board. Meniscus: The contour of a shape that is the result of
the surface-tension forces that take place during wetting.
L Metal-Clad Base Material: Base material covered with
metal on one or both sides from which conductive pat-
Laminate: A product made by bonding together two or
terns may be formed. The material may be rigid or flexi-
more layers of material.
ble, reinforced or non-reinforced, organic or ceramic.
Laminate Thickness: The thickness of single- or dou-
Metallization: A deposited or plated thin metallic film
ble-sided metal-clad base material prior to any subse-
that is used for it’s protective and/or electrical insulator.
quent processing (See also “Board Thickness”.)
Microsectioning: The preparation of a specimen of a
Lamination: The process of bonding together two or
material, or materials, that is to be used in a metallo-
more layers of material.
graphic examination. (This usually consists of cutting
Land: A portion of a conductive pattern that is usually out a cross-section, followed by encapsulation, polish-
used for making electrical connections, for component ing, etching, staining, etc.)
attachment, or both.
Microstrip: A transmission-line configuration that con-
sists of a conductor that is positioned over, and parallel
to, a ground plane with a dielectric between them.

74
 © 1999/2000 Teledyne Electronic Technologies

Glossary

Minimum Annular Ring: The minimum width of

Copper
metal(s) at the narrowest point between the edge of a Conductive
hole and the outer edge of a circumscribing land. (This Layer Base Material
determination is made to the drilled hole on internal lay-
ers of multilayer printed boards and to the edge of the
plating on external layers of multilayer and double-
sided printed boards.)
Minimum Electrical Spacing: The minimum allowable Negative
Etchback
distance between adjacent conductors, at a given voltage
Figure 8-12. Negative Etchback
and altitude, that is sufficient to prevent dielectric break-
down, corona, or both, from occurring between the Net: An entire string of electrical connections from the
conductors. first source point to the last target point, including land
Mother Board: A printed board assembly that is used and vias.
for interconnecting arrays of plug-in electronic mod- Net List: A list of alphanumeric representations, each of
ules. (See also “Backplane”.) which is used to describe a group of two or more points
Mounting Hole: A hole that is used for the mechanical that are electrically common.
support of a printed board or the mechanical attachment Nonfunctional Land: A land that is not connected elec-
of components to a printed board. trically to the conductive pattern on its layer.
Multilayer Printed Board: The general term for a
printed board that consists of rigid or flexible insulation O
materials and three or more alternate printed wiring and/
or printed circuit layers that have been bonded together Outgassing: The gaseous emission from a printed board
and electrically interconnected. or component when a printed board assembly is exposed
to a reduced pressure, or heat, or both.
Multilayer Printed Circuit Board Assembly: An
assembly that uses a multilayer printed circuit board for
component mounting and interconnecting purposes. P
Panel: A rectangular sheet of base material or metal-
N clad material of predetermined size that is used for the
processing of one or more printed boards and, when
Nail Heading: The flared condition of copper on an
required, one or more test coupons.
inner conductive layer of a multilayer printed board that
is caused by hole-drilling. Panel Fiducials: Global fiducial marks on a multiple
printed circuit board fabrication panel that are not
Base Material located within the perimeter of an end-product printed
Nail board.
Heading
Permittivity: A translator fixture plate drilled to match
the product under test.
Photoresist: A material that is sensitive to portions of
Copper Conductor
Layer
the light spectrum and that, when properly exposed and
can mask portions of a base material with a high degree
Figure 8-11. Nail Heading of integrity.
Phototool: A photographic product that is used to pro-
Negative: An artwork, artwork master, or production
duce a pattern on a material. (See also “Artwork” and
master in which the pattern being fabricated is transpar-
“Artwork Master”.)
ent to light and the other areas are opaque.
Pitch: The nominal center-to-center distance of adjacent
Negative Etchback: Etchback in which the inner con-
conductors. (When the conductors are of equal size and
ductor layer material is recessed relative to the sur-
their spacing is uniform, the pitch is usually measured
rounding base material.
from the reference edge of the adjacent conductors.)

75
© 1999/2000 Teledyne Electronic Technologies

Glossary

Plated-Through Hole: A hole with plating on its walls Rigid-Flex Printed Board: A printed board with both
that makes an electrical connection between conductive rigid and flexible base materials.
patterns on internal layers, external layers, or both, of a
printed board. S
Polarization: The technique of eliminating symmetry
Sequential Lamination: The bonding process of mak-
within a plane so that parts can be engaged in one way
ing a multilayer printed board by multiple laminations
in order to minimize the possibility of electrical,
of single-sided, double-sided, or multilayer printed
mechanical, or malfunction damage.
board. Sequential lamination may occur one layer at a
Polyimide: A dielectric film material commonly used time or as combinations of multiple layers. The conduc-
for flexible circuit fabrication as an insulating layer. tive layers are connected by blind, buried or through-
Positional Tolerance: The amount that a feature is per- hole vias.
taining to vary from its true-position location. Shield: The material around a conductor or group of
Potting Compound: A material, usually organic, that is conductors that limits electromagnetic and/or electro-
used for the encapsulation of connectors and wires. static interference.
Prepreg: A sheet of material that has been impregnated Signal Conductor: An individual conductor that is used
with a resin and cured to an intermediate stage, i.e., to transmit an impressed electrical signal.
B-staged resin. Single-Sided Printed Board: A printed board with a
Pressfit Contact: An electrical contact that can be conductive pattern on one of its sides.
pressed into a hole in an insulator or printed board with Soldermask: A resist that provides protection from the
or without plated-through holes. action of solder.
Step-and-Repeat: The successive exposure of a single
Q image in order to produce a multiple-image production
Quality-Conformance Test Circuitry: A portion of a master.
printed board panel that contains a complete set of test Stripline: A transmission-line configuration that con-
coupons that are used to determine the acceptability of sists of a conductor that is positioned equidistant
the board(s) on the board. between, and parallel to; ground planes with a dielectric
among them.
R
T
Registration: The degree of conformity of the position
of a pattern (or portion thereof), a hole, or other feature Tenting: The covering of holes in a printed board and
to its intended position on a product. the surrounding conductive pattern with a resist that is
Reinforced Adhesive: An adhesive material whose usually a dry film.
mechanical strength is improved by the addition of glass Terminal Pad: A portion of a conductive pattern that is
fibers. usually used for making electrical connections, for com-
Resin Recession: The presence of voids between the ponent attachment, or both.
parallel of a plated-through hole and the wall of the hole Tetrafunctional Resins: Materials that have four reac-
as seen in microsections of plated-through holes that tive groups per molecule.
have been exposed to high temperatures. Thermal Coefficient of Expansion: See “Coefficient of
Thermal Expansion (CTE)”.
Resin Resin
Recession Recession Thermal Conductivity: The property of a material that
describes the rate at which heat will be conducted
through a unit area of the material for a given driving
force.

Figure 8-13. Resin

76
 © 1999/2000 Teledyne Electronic Technologies

Glossary

Thermal Expansion Mismatch: The absolute differ- True Position Tolerance: The total permissible devia-
ence between the thermal expansion of two components tion from a true position.
or materials. (See also “Coefficient of Thermal Expan-
sion (CTE).”) U
Thermal Relief: The Crosshatching of a ground or volt-
Unsupported Hole: A hole that does not required plat-
age plane that minimizes blistering or warping during
ing-through. Most often found in single- and double-
soldering operations.
sided circuits.
Thermoset Adhesive: An adhesive material that under-
goes a chemical reaction when exposed to elevated tem- V
peratures that leads to it having a relatively infusable or
crosslinked state that cannot be softened or reshaped by Vertical Pins: A type of termination which connects
subsequent heating. two conductor runs in a solder assembly where the runs
Through-Hole Technology: Techniques used to con- are in two different layers.
nect electrical components to a conductive pattern by Via: A plated-through hole that is used as an interlayer
the use of component holes. connection, but in which there is no intention to insert a
Tooling Feature: A physical feature that is used exclu- component lead or other reinforcing material.
sively to position a printed board or panel during a fabri- Voltage Plane: A conductor layer, or portion thereof,
cation assembly or testing process. (See also “Tooling that serves as a common voltage source at other than
Hole”.) ground potential for an electrical circuit, shielding, or
Tooling Hole: A tooling feature in the form of a hole in heat sinking. (See also “Ground Plane”.)
a printed board or fabrication panel. Voltage-Plane Clearance: Removed portions of a volt-
True Position: The theoretically exact location for a age plane that isolate it from a hole in the base material
feature or hole that is established by basic dimensions. to which the plane is attached.

77
© 1999/2000 Teledyne Electronic Technologies

9 Industry Specifications
Following is a listing of the commercial and federal specifications for the manufacture
and testing of flexible and rigid-flex circuits. They may be used in connection with
this Design Guide.

Federal
DOD-STD-100 Engineering drawing practices
MIL-C-14550 Electroplated Copper
MIL-P-81728 Electroplated tin/lead
MIL-F-14256 Flux, soldering liquid (resin based)
MIL-G-45204 Gold plating, electro-deposited
MIL-I-46058 Electrical insulating compound (for coating printed circuit
assemblies)
MIL-P-50884 Specification for flexible and rigid-flex printed wiring
MIL-P-13949 Plastic sheet, laminated - metal clad
MIL-STD-105 Sample procedures & tables for inspection attributes
MIL-STD-275 Printed wiring for electronic equipment
MIL-STD-202 Test methods for electronic and electrical component parts
MIL-STD-454 Standard general requirements for electronic equipment
MIL-STD-810 Environmental test methods
MIL-STD-2118 Design requirements for flexible and rigid-flex printed wiring
QQ-S-571 Solder, tin alloy
QQ-C-576 Copper flat products

IPC
IPC-T-50F Terms and definitions
IPC-MF-150 Copper foil for printed wiring applications
IPC-FC-231 Flexible bare dielectrics for use in flexible printed wiring
IPC-FC-232 Specifications for adhesive coated dielectric films for use as
cover sheets for flexible printed wiring
IPC-FC-241 Metal-clad dielectrics for use in fabrication of flexible
printed circuits
IPC-D-300 Printed board dimension and tolerances
IPC-A-600 Acceptability of printed boards
IPC-SM-840 Qualification and performance of permanent polymer coating
(solder mask) for printed boards
 © 1999/2000 Teledyne Electronic Technologies

Industry Specifications

IPC-2221 Generic standard on printed board design (Supersedes IPC-D-275)

IPC-2222 Sectional design standard for rigid organic printed boards (Supersedes IPC-D-275)
IPC-2223 Secional design standard for flexible printed boards (Supersedes IPC-D-249)
IPC-2224 Sectional standard for design of PWBs for PC cards
IPC-2225 Sectional design standard for organic multichip modules (MCM-L) and MCM-L assemblies
IPC-4101 Laminate/Prepreg materials standard for printed boards (Supersedes IPC-L-108, IPC-L-109,
IPC-L-112, IPC-L-115, and IPC-AM-361)
IPC-6011 Generic performance specification for printed boards (Supersedes IPC-RB-276)
IPC-6012 Qualification and performance specification for rigid printed boards (Supersedes
IPC-RB-276)
IPC-6013 Gualification and performance specificaiton for flexible printed boards (Supersedes
IPC-RF-245 and IPC-FC-250A)
IPC-6015 Qualification and performance specification for organic multichip module (MCM-L)
mounting and interconnecting structures
J-STD-001B Requirements for soldered electrical and electronic assemblies
J-STD-002A Solderability tests for component leads, terminations, lugs, terminals and wires (relpaces
IPC-S-805)
J-STD-003 Solderability tests for printed boards (replaces IPC-S-804A)
J-STD-004 Requirements for soldering fluxes - (includes Amendment 1)

Application for copies of IPC specifications should be addressed to:

Institute for Interconnecting and Packaging Electronic Circuits
7380 North Lincoln Ave.
Lincolnville, IL 60646

Commercial
UL-794 Certification standard

79
Teledyne Electronic Technologies
Leading the interconnection field since 1963.
Teledyne Electronic Technologies (TET), formerly by contributing to a multitude of military and
Teledyne Electro-Mechanisms, has been a leader in commercial applications. In addition to the standard
the field of interconnection technology since its circuits we have produced for many years, TET is
incorporation in 1963. At that time we designed and continuing to develop new and better products in the
manufactured innovative single layer flexible flexible circuit and multilayer rigid-flex
circuits and unique multilayer rigid-flex harnesses marketplace.
to support the NASA Saturn V program.
Teledyne is committed to assisting our customers
Throughout the years our design engineers and from design development right through prototypes
manufacturing personnel have worked together and production. This commitment includes a fully
perfecting solutions to staffed engineering
customer design challenges department utilizing the
from the simplest single layer latest CAD/CAM/CIM
applications to the most systems for circuit design,
complex interconnection document creation, artwork
systems. TET is proud to generation, and drill/rout
hold numerous process program creation. Our
patents related to flexible product engineers specialize
circuit manufacturing. in optimizing available
tooling systems to help
Today we continue to be in control costs.
the forefront of the industry

Teledyne Electronic Technologies

Printed Circuit Technology Business Unit
Printed Circuit Technology Business Unit 110 Lowell Road, CS 68
110 Lowell Road, CS 68
Hudson, New Hampshire 03051
Hudson, New Hampshire 03051
Tel: (603) 889-6191
Tel: (603) 889-6191
Fax: (603) 882-4457
Fax: (603) 882-4457
Email: [email protected]
Email: [email protected]
 Flexible Circuit Design Guide
Fourth Edition

Printed Circuit Technology Business Unit

110 Lowell Road, CS 68, Hudson, New Hampshire 03051
Tel: (603) 889-6191 • Fax: (603) 882-4457

© 1999/2000 Teledyne Electronic Technologies

OEMM January 2000; rev. 1
Printed in USA