Module 2.2
Module 2.2
Memory Segmentation
• Need for segmentation:
• 8086 has 20 bits of Physical Address- 2.5 bytes- Not byte compatible.
• The issue of byte incompatibility can be overcome by Memory Segmentation
• Memory is bisected into 4 segments
• Code segment
• Data Segment
• Stack Segment
• Extra segment
• Calculate the physical address from Virtual address(Segment address and offset address)
• Segment address register stores Segment address, Index registers store offset address
• Physical Address= Segment address*10H+ Offset address
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Address lines=20;
Memory locations= 2^20=1MB v
16 bit
00
01
10
11
16 bit
4
• We can use 16 bit registers instead of 20 bit registers
• Back ward compatibility with 8085(16 bit memory)
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Physical Address Computation
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Example:
CS register value is 348AH and the offset value
(IP) is 4214H .Find the Physical address?
Given: CS=348AH
Left shift by 4 bits then CS=348A0H
Physical address=CS+IP
348A0 +
4214
-----------
38AB4H (20 bit physical address)
-----------
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Programming Model of 8086
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Flag Registers of 8086
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Flag Register of 8086
8086 has 9 flags and they are divided into two categories – 6 Condition Flag ,3 Control Flag
Set to 0 initially
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System Bus –wires connecting memory & I/O to microprocessor
1 Address Bus
-Unidirectional
-Identifying peripheral or memory location
2 Data Bus
– Bidirectional
– Transferring data
3 Control Bus
– Synchronization signals
– Timing signals
– Control signal
Pin Configuration of 8086
S5-Interrupt flag status indicated
S6=1; Control of internal bus is
given to external bus master;
S7- Not used for any bus
Min Mode
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Pin Configuration of 8086
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Pin Configuration of 8086
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Pin Configuration of 8086
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Pin Configuration of 8086
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INTEL 8086 - Pin Details
Min/Max mode
Minimum Mode: +5V
Maximum Mode: 0V
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Minimum Mode- Pin Details
Hold Signal
HOLD-external devices are
requesting to access the Hold Acknowledge
address/data buses
Memory or I/0
Data Transmit/Receive
Status Signal
Inputs to 8288 bus controller to
generate memory and i/o
signals.
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Maximum Mode - Pin Details These are the Request/Grant
signals used by the other
processors requesting the
CPU to release the system
bus. When the signal is
received by CPU, then it
sends acknowledgment.
RQ/GT0 has a higher priority
than RQ/GT1
DMA Request/Grant
Lock Output
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Maximum Mode - Pin Details
Queue Status
Used by numeric coprocessor
(8087)
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• In addition to the general purpose registers, many 8086 instructions (including
the mov instruction) allow you to specify one of the segment registers as an
operand.
• There are two restrictions on the use of the segment registers with the mov
instruction.
• First of all, you may not specify cs as the destination operand,
• second, only one of the operands can be a segment register.
• You cannot move data from one segment register to another with a single mov
instruction.
• To copy the value of cs to ds, you’d have to use some sequence like:
mov ax, cs
mov ds, ax
• You should never use the segment registers as data registers to hold arbitrary
values.
• They should only contain segment addresses
INTRODUCTION
8086 Microprocessor
Addressing Modes
Every instruction of a program has to operate on a data.
The different ways in which a source operand is denoted in an instruction are
known as addressing modes.
1. Register Addressing
Group I : Addressing modes for register and immediate data
2. Immediate Addressing
3. Direct Addressing
5. Based Addressing
Group II : Addressing modes for memory data
6. Indexed Addressing
8. String Addressing
1. Register Addressing
Addressing Modes
The instruction will specify the name of the register which holds the
2. Immediate Addressing data to be operated by the instruction.
3. Direct Addressing
Example:
4. Register Indirect Addressing
MOV CL, DH MOV BX,DX
5. Based Addressing
The content of 8-bit register DH is moved to another 8-bit register
6. Indexed Addressing CL
8. String Addressing
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8086 Microprocessor Group I : Addressing modes for register and immediate data
Addressing Modes
In immediate addressing mode, an 8-bit or 16-bit data is specified
1. Register Addressing as part of the instruction
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8086 Microprocessor Group II : Addressing modes for memory data
Addressing Modes
1. Register Addressing
2. Immediate Addressing
Here, the effective address of the memory location at which the
3. Direct Addressing
data operand is stored is given in the instruction.
4. Register Indirect Addressing
The effective address is just a 16-bit number written directly in
5. Based Addressing the instruction.
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8086 Microprocessor Group II : Addressing modes for memory data
Addressing Modes
1. Register Addressing
In Register indirect addressing, name
2. Immediate Addressing of the register which holds the
3. Direct Addressing effective address (EA) will be specified
4. Register Indirect Addressing in the instruction.
5. Based Addressing
Example:
MOV CX, [BX]
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Note : Register/ memory enclosed in brackets
refer to content of register/ memory
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8086 Microprocessor Group II : Addressing modes for memory data
Addressing Modes
1. Register Addressing In Based Addressing, BX or BP is used to hold
2. Immediate Addressing the base value for effective address and a
signed 8-bit or unsigned 16-bit displacement
3. Direct Addressing
will be specified in the instruction.
4. Register Indirect Addressing
Addressing Modes
1. Register Addressing SI or DI register is used to hold an index value
2. Immediate Addressing for memory data and a signed 8-bit or
unsigned 16-bit displacement will be specified
3. Direct Addressing
in the instruction.
4. Register Indirect Addressing
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8086 Microprocessor Group II : Addressing modes for memory data
Addressing Modes
1. Register Addressing
In Based Index Addressing,
2. Immediate Addressing
3. Direct Addressing
the effective address is
4. Register Indirect Addressing computed from the sum of a
5. Based Addressing base register (BX or BP), an
6. Indexed Addressing
index register (SI or DI) and
a displacement.
7. Based Index Addressing
8. String Addressing
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8086 Microprocessor Group II : Addressing modes for memory data
Addressing Modes
1. Register Addressing Employed in string operations to
2. Immediate Addressing operate on string data.
3. Direct Addressing
8. String Addressing
Segment register for calculating base
address of
9. Direct I/O port Addressing
source data is DS and that of the
10. Indirect I/O port Addressing
destination data is ES
11. Relative Addressing
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8086 Microprocessor Group III : Addressing modes for I/O ports
Addressing Modes
1. Register Addressing These addressing modes are used to
2. Immediate Addressing access data from standard I/O mapped
3. Direct Addressing devices or ports.
4. Register Indirect Addressing
Addressing Modes
1. Register Addressing In indirect port addressing mode, the
2. Immediate Addressing instruction will specify the name of the
3. Direct Addressing register which holds the port address. In
4. Register Indirect Addressing 8086, the 16-bit port address is stored in the
5. Based Addressing DX register.
6. Indexed Addressing
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8086 Microprocessor Group IV : Implied Addressing mode
6. Indexed Addressing
8. String Addressing
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