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Module 2.2

The document discusses memory segmentation in the 8086 microprocessor, detailing the need for segmentation to address byte incompatibility and describing the four segments: code, data, stack, and extra. It explains how to calculate physical addresses using segment and offset addresses, and outlines the flag registers and their functions. Additionally, it covers the addressing modes available in the 8086, including register, immediate, direct, and various indirect addressing modes for both memory and I/O ports.

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rayad96989
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0% found this document useful (0 votes)
11 views

Module 2.2

The document discusses memory segmentation in the 8086 microprocessor, detailing the need for segmentation to address byte incompatibility and describing the four segments: code, data, stack, and extra. It explains how to calculate physical addresses using segment and offset addresses, and outlines the flag registers and their functions. Additionally, it covers the addressing modes available in the 8086, including register, immediate, direct, and various indirect addressing modes for both memory and I/O ports.

Uploaded by

rayad96989
Copyright
© © All Rights Reserved
Available Formats
Download as PDF, TXT or read online on Scribd
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1

Memory Segmentation
• Need for segmentation:
• 8086 has 20 bits of Physical Address- 2.5 bytes- Not byte compatible.
• The issue of byte incompatibility can be overcome by Memory Segmentation
• Memory is bisected into 4 segments
• Code segment
• Data Segment
• Stack Segment
• Extra segment
• Calculate the physical address from Virtual address(Segment address and offset address)
• Segment address register stores Segment address, Index registers store offset address
• Physical Address= Segment address*10H+ Offset address

2
Address lines=20;
Memory locations= 2^20=1MB v

16 bit

00
01
10
11
16 bit

Max size of each segment=64K


Number of segments= 16
3
Physical Address= Segment address*10H+ Offset address

4
• We can use 16 bit registers instead of 20 bit registers
• Back ward compatibility with 8085(16 bit memory)
5
Physical Address Computation

6
Example:
CS register value is 348AH and the offset value
(IP) is 4214H .Find the Physical address?
Given: CS=348AH
Left shift by 4 bits then CS=348A0H
Physical address=CS+IP
348A0 +
4214
-----------
38AB4H (20 bit physical address)
-----------
7
Programming Model of 8086

8
Flag Registers of 8086

9
Flag Register of 8086
 8086 has 9 flags and they are divided into two categories – 6 Condition Flag ,3 Control Flag
 Set to 0 initially

 Carry Flag(CF):indicates an overflow condition for unsigned integer arithmetic


 Parity Flag (PF):Indicates parity of the result
 Auxiliary Flag(AF):is set when carry/borrow from the lower nibble. It is internally used by processor
during binary to BCD conversion
 Zero Flag(ZF):is set, if the result of arithmetic or logical operation is zero else it is reset
 Sign Flag(SF):Indicates sign of a number
 Trap Flag (TP): It is used for Single step execution mode & used while debugging

 Interrupt Flag(IF):It is used to enable/disable the interrupts.


 Direction Flag(DF):It is used in string operation. If it is set, string bytes are accessed from higher
memory address to lower memory address else from lower memory address to higher memory
address
 Overflow Flag(OF):indicates that the result has exceeded the capacity of machine

10
System Bus –wires connecting memory & I/O to microprocessor
1 Address Bus
-Unidirectional
-Identifying peripheral or memory location

2 Data Bus
– Bidirectional
– Transferring data

3 Control Bus
– Synchronization signals
– Timing signals
– Control signal
Pin Configuration of 8086
S5-Interrupt flag status indicated
S6=1; Control of internal bus is
given to external bus master;
S7- Not used for any bus

Min Mode

HOLD-When the external bus controller


wants the system bus
Test’=0; exec. Will continue- else proc, in idle state
Lock’=0; up imp task- system bus cant be shared 12
Pin Configuration of 8086

13
Pin Configuration of 8086

14
Pin Configuration of 8086

15
Pin Configuration of 8086

16
Pin Configuration of 8086

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INTEL 8086 - Pin Details

Min/Max mode
Minimum Mode: +5V
Maximum Mode: 0V

Minimum Mode Pins

Maximum Mode Pins

18
Minimum Mode- Pin Details

Hold Signal
HOLD-external devices are
requesting to access the Hold Acknowledge
address/data buses

HOLDA Write Signal

Memory or I/0

Data Transmit/Receive

Data Bus Enable


19
Maximum Mode - Pin Details

Status Signal
Inputs to 8288 bus controller to
generate memory and i/o
signals.

20
Maximum Mode - Pin Details These are the Request/Grant
signals used by the other
processors requesting the
CPU to release the system
bus. When the signal is
received by CPU, then it
sends acknowledgment.
RQ/GT0 has a higher priority
than RQ/GT1

DMA Request/Grant

Lock Output

When this signal is active, it indicates


to the other processors not to ask
the CPU to leave the system bus.

21
Maximum Mode - Pin Details

Queue Status
Used by numeric coprocessor
(8087)

22
• In addition to the general purpose registers, many 8086 instructions (including
the mov instruction) allow you to specify one of the segment registers as an
operand.
• There are two restrictions on the use of the segment registers with the mov
instruction.
• First of all, you may not specify cs as the destination operand,
• second, only one of the operands can be a segment register.
• You cannot move data from one segment register to another with a single mov
instruction.
• To copy the value of cs to ds, you’d have to use some sequence like:
mov ax, cs
mov ds, ax
• You should never use the segment registers as data registers to hold arbitrary
values.
• They should only contain segment addresses

INTRODUCTION
8086 Microprocessor
Addressing Modes
Every instruction of a program has to operate on a data.
The different ways in which a source operand is denoted in an instruction are
known as addressing modes.

1. Register Addressing
Group I : Addressing modes for register and immediate data
2. Immediate Addressing

3. Direct Addressing

4. Register Indirect Addressing

5. Based Addressing
Group II : Addressing modes for memory data
6. Indexed Addressing

7. Based Index Addressing

8. String Addressing

9. Direct I/O port Addressing


Group III : Addressing modes for I/O ports
10. Indirect I/O port Addressing

11. Relative Addressing Group IV : Relative Addressing mode

12. Implied Addressing Group V : Implied Addressing24


mode
8086 Microprocessor Group I : Addressing modes for register and immediate data

1. Register Addressing
Addressing Modes
The instruction will specify the name of the register which holds the
2. Immediate Addressing data to be operated by the instruction.
3. Direct Addressing
Example:
4. Register Indirect Addressing
MOV CL, DH MOV BX,DX
5. Based Addressing
The content of 8-bit register DH is moved to another 8-bit register
6. Indexed Addressing CL

7. Based Index Addressing (CL)  (DH)

8. String Addressing

9. Direct I/O port Addressing

10. Indirect I/O port Addressing

11. Relative Addressing

12. Implied Addressing

25
8086 Microprocessor Group I : Addressing modes for register and immediate data

Addressing Modes
In immediate addressing mode, an 8-bit or 16-bit data is specified
1. Register Addressing as part of the instruction

2. Immediate Addressing Example:

3. Direct Addressing MOV DL, 08H


4. Register Indirect Addressing The 8-bit data (08H) given in the instruction is moved to DL
5. Based Addressing
(DL)  08H
6. Indexed Addressing

7. Based Index Addressing


MOV AX, 0A9FH
8. String Addressing
The 16-bit data (0A9FH) given in the instruction is moved to AX
9. Direct I/O port Addressing register

10. Indirect I/O port Addressing (AX)  0A9FH

11. Relative Addressing

12. Implied Addressing

26
8086 Microprocessor Group II : Addressing modes for memory data

Addressing Modes
1. Register Addressing

2. Immediate Addressing
Here, the effective address of the memory location at which the
3. Direct Addressing
data operand is stored is given in the instruction.
4. Register Indirect Addressing
The effective address is just a 16-bit number written directly in
5. Based Addressing the instruction.

6. Indexed Addressing Example:

7. Based Index Addressing


MOV BX, [1354H]
8. String Addressing MOV BL, [0400H]
9. Direct I/O port Addressing
The square brackets around the 1354H denotes the contents of the
memory location. When executed, this instruction will copy the
10. Indirect I/O port Addressing
contents of the memory location into BX register.
11. Relative Addressing
This addressing mode is called direct because the displacement of
12. Implied Addressing the operand from the segment base is specified directly in the
instruction.

27
28
8086 Microprocessor Group II : Addressing modes for memory data

Addressing Modes
1. Register Addressing
In Register indirect addressing, name
2. Immediate Addressing of the register which holds the
3. Direct Addressing effective address (EA) will be specified
4. Register Indirect Addressing in the instruction.
5. Based Addressing

6. Indexed Addressing Registers used to hold EA are any of


7. Based Index Addressing
the following registers:
8. String Addressing
BX, DI and SI.
9. Direct I/O port Addressing

10. Indirect I/O port Addressing


Content of the DS register is used for
11. Relative Addressing
base address calculation.
12. Implied Addressing

Example:
MOV CX, [BX]
29
Note : Register/ memory enclosed in brackets
refer to content of register/ memory

30
8086 Microprocessor Group II : Addressing modes for memory data

Addressing Modes
1. Register Addressing In Based Addressing, BX or BP is used to hold
2. Immediate Addressing the base value for effective address and a
signed 8-bit or unsigned 16-bit displacement
3. Direct Addressing
will be specified in the instruction.
4. Register Indirect Addressing

5. Based Addressing In case of 8-bit displacement, it is sign


extended to 16-bit before adding to the base
6. Indexed Addressing
value.
7. Based Index Addressing

8. String Addressing When BX holds the base value of EA, 20-bit


9. Direct I/O port Addressing
physical address is calculated from BX and DS.
10. Indirect I/O port Addressing
When BP holds the base value of EA, BP and SS
11. Relative Addressing is used.
12. Implied Addressing
Example:

MOV AX, [BX + 08H]


31
32
8086 Microprocessor Group II : Addressing modes for memory data

Addressing Modes
1. Register Addressing SI or DI register is used to hold an index value
2. Immediate Addressing for memory data and a signed 8-bit or
unsigned 16-bit displacement will be specified
3. Direct Addressing
in the instruction.
4. Register Indirect Addressing

5. Based Addressing Displacement is added to the index value in SI


or DI register to obtain the EA.
6. Indexed Addressing

7. Based Index Addressing In case of 8-bit displacement, it is sign


8. String Addressing extended to 16-bit before adding to the base
9. Direct I/O port Addressing
value.
10. Indirect I/O port Addressing

11. Relative Addressing Example:


12. Implied Addressing
MOV CX, [SI + 0A2H]

33
34
8086 Microprocessor Group II : Addressing modes for memory data

Addressing Modes
1. Register Addressing
In Based Index Addressing,
2. Immediate Addressing

3. Direct Addressing
the effective address is
4. Register Indirect Addressing computed from the sum of a
5. Based Addressing base register (BX or BP), an
6. Indexed Addressing
index register (SI or DI) and
a displacement.
7. Based Index Addressing

8. String Addressing

9. Direct I/O port Addressing

10. Indirect I/O port Addressing Example:


11. Relative Addressing

12. Implied Addressing


MOV DX, [BX + SI + 0AH]

35
36
8086 Microprocessor Group II : Addressing modes for memory data

Addressing Modes
1. Register Addressing Employed in string operations to
2. Immediate Addressing operate on string data.
3. Direct Addressing

4. Register Indirect Addressing The effective address (EA) of source


5. Based Addressing data is stored in SI register and the EA
6. Indexed Addressing
of destination is stored in DI register.
7. Based Index Addressing

8. String Addressing
Segment register for calculating base
address of
9. Direct I/O port Addressing
source data is DS and that of the
10. Indirect I/O port Addressing
destination data is ES
11. Relative Addressing

12. Implied Addressing

Example: MOVS BYTE

37
38
8086 Microprocessor Group III : Addressing modes for I/O ports

Addressing Modes
1. Register Addressing These addressing modes are used to
2. Immediate Addressing access data from standard I/O mapped
3. Direct Addressing devices or ports.
4. Register Indirect Addressing

5. Based Addressing In direct port addressing mode, an 8-


6. Indexed Addressing
bit port address is directly specified in
7. Based Index Addressing
the instruction.
8. String Addressing
Example: IN AL, 09H
9. Direct I/O port Addressing

10. Indirect I/O port Addressing


OUT 09H,AL
11. Relative Addressing
Operations: PORTaddr = 09H
12. Implied Addressing
(AL)  (PORT)
Content of port with address 09H is
moved to AL register
39
8086 Microprocessor Group III : Addressing modes for I/O ports

Addressing Modes
1. Register Addressing In indirect port addressing mode, the
2. Immediate Addressing instruction will specify the name of the
3. Direct Addressing register which holds the port address. In
4. Register Indirect Addressing 8086, the 16-bit port address is stored in the
5. Based Addressing DX register.
6. Indexed Addressing

7. Based Index Addressing


Example: OUT DX,AX
8. String Addressing
IN AX,DX
9. Direct I/O port Addressing

10. Indirect I/O port Addressing


Operations: PORTaddr = DX
11. Relative Addressing
(PORT)  (AX)
12. Implied Addressing

Content of AX is moved to port


whose address is specified by DX
register. 40
8086 Microprocessor Group IV : Relative Addressing mode

1. Register Addressing Addressing Modes


2. Immediate Addressing

3. Direct Addressing In this addressing mode, the effective address of a program


instruction is specified relative to Instruction Pointer (IP) by an 8-
4. Register Indirect Addressing bit signed displacement.

5. Based Addressing Example: JZ 0AH


6. Indexed Addressing
Operations:
7. Based Index Addressing
000AH  0AH (sign extend)
8. String Addressing
If ZF = 1, then
9. Direct I/O port Addressing
If ZF = 1, then the program control jumps to new address
10. Indirect I/O port Addressing
If ZF = 0, then next instruction of the program is executed.
11. Relative Addressing

12. Implied Addressing

41
8086 Microprocessor Group IV : Implied Addressing mode

1. Register Addressing Addressing Modes


2. Immediate Addressing Instructions using this mode have no operands. The instruction
itself will specify the data to be operated by the instruction.
3. Direct Addressing
Example: CLC
4. Register Indirect Addressing
This clears the carry flag to zero.
5. Based Addressing

6. Indexed Addressing

7. Based Index Addressing

8. String Addressing

9. Direct I/O port Addressing

10. Indirect I/O port Addressing

11. Relative Addressing

12. Implied Addressing

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