USN iv, vii. viii. xii, xiii xiv. sIA mo 21UEC104C BE. First Semester End Examinations, June 2022 Basic Electronics Duration: 3 Hours NOTE: PART-A: All questions are compulsory. PART-B: Answer any ONE full question from each unit. Question Marks PART-A Zener diode is usually operated under : (01) What is the hexadecimal value of the binary number (01) 11101111112 List any two differences between two-diode FWR and Bridge (01) Rectifier ‘The barrier voltages for Silicon and Germanium junction are (01) and___ respectively. For an oscillator, the phase shift around the loop should be (01) ‘or___degrees. ‘The PIV for Bridge rectifier is (ol) is the Boolean expression for Exclusive-OR gate. (0) What is role of by-pass capacitor in single stage CE amplifier? (01) Ina single stage CE amplifier, the phase difference between (01) the input and output signal is Determine the values of A, B, C and D that make the product (01) term ABCD equal to 1. Implement XOR gates using NAND gates. 2) ‘A broadcast AM transmitter radiates at 50 MHz, What will be (02) the height of the antenna? What are Universal gates? Why they are called so? 2) List any four Boolean rules (Identities). @) (02) xv. Define Amplitude Shift Keying. Scanned with CamScanner Max. Marks: 100 BLL CO Loot 134 Lio Lz 2 2 3 12 2 2 1 13-1 2 3 flee! 1325-3 Lit 2001 13 2 ot Pr 124 13.1 2.21 13.1 13.1 13.1 12.1 13.1 224 13.1 2.24QNo. nv b) °) 2 d) °) s & b) °) b) °) b) Question PART-B UNIT-I it diagram and waveforms, explain the With a neat circui d derive an expression, for working of half-wave rectifier an average load current. For a Full-wave rectifier, ind efficiency = 81.2%. : . Draw and cxplain the multistage vollage multiplier with show that the ripple factor = 0,48 necessary equations. Explain the basic operation of Bipolar Junction Transistor. Also draw the symbols for npn and pnp transistors, Prove that Bye = 358 With a neat circuit and graphs, explain input and output characteristics of transistor in common emitter configuration, UNIT- IL Explain the base bias circuit with necessary equations. Given that Voc = 24V, Rp = 390K ohm, Re = 3.3K ohm and Vee = 10V. Calculate the transistor Ag(B) value and determine the new Veg level when a transistor is substituted with hps = 100. In a voltage-divider bias circuit, Vec = 24V, R, = 180K ohm, R2 = 56K ohm, Re = 4.7K ohm and Re = 8.2K ohm. Calculate the approximate levels of le,Vg,Ve,and Veg. Explain DC load line analysis of transistor. What is an oscillator? What is the Barkhausen criterion for sustained oscillations? Explain LC network and hence explain colpitt’s oscillator with neat circuit. Calculate the frequency of oscillations for the same, ifC,=100pF, —G, = S0pF and L = 7.6yHl. With circuit diagram, explain BJT RC Phase Shift Oscillator, UNIT- 11 Subtract (27), from Show that: i. AEC+B+BD +480 4 ic - ea =B+C ii, AB +A+AB ~ 0 Perform the followin; i (72525) =(?)a = (2), ii, (411100111110001), = iii, Determine the value of ba (56) 1o using the 2°s complement form. @)i0 = @)ae se ‘x’, if (211) 152) Marks (08) (06) (06) (07) (04) (09) (08) (08) (04) (06) (08) (06) (04) (06) (10) 21UECK BLL co 1 Li 1 13 3 1 3 2 L2 1 Lb 4 134 iH 7 L2 3 34 L2 307 L3 41 L3 oe L3 4 1 Scanned with CamScanner21UEC104C Question Marks BLL CO PI 7. a) Implement Basic gates using NAND and NOR gates. (06) 13 3 224 b) State and Prove DeMorgan’s Theorem, (00), 3) sn oo c) Explain full adder circuit with truth table. Realize the circuit (08) 13 3 221 for sum and carry using basic gates, UNIT- IV 8. a) With a neat block diagram, explain basic elements of analog (06) L211 2.1.3 communication system. 'b) What is modulation and hence explain the need for it in detail. (08) «L213. c) What are the typical frequency ranges for the following (06) LI 3 212 classification of EM spectrum: MF, HF, VHF and UHF. Also mention their respective typical applications. 9. a) Prove that the maximum power in AM WaveisPyy=15P, (05) 13.3 2:12 b) Explain the frequency modulation in detail with necessary (06) 133 2.12 waveforms. c) List the types of digital modulation techniques. With neat (09) L333 2.1.2 block diagram, explain ASK in detail Scanned with CamScannerISN 2|BiA 21UEC104C B.E. First Semester End Examinations, September 2022 Basic Electronics Duration: 3 Hours Max. Marks: 100 Q.No. iii, vie NOTE: PART-A: All questions are compulsory. PART-B: Answer any ONE full question from each unit. Question Marks BLL CO PI PART-A, A transistor has ....... a) One pn junction b) Two pn junctions ©) Three pn junctions @y 1 1121 d) Four pn junctions Bridge rectifier is an alternative for (01) 2 2 1.2.1 a) Full wave rectifier ») Peak rectifier ©) Half wave rectifier 4) None of the mentioned. ‘When used as a voltage regulator, Zener diode is @l) 2 20 124 normally a) Not biased b) Forward biased ©) Reverse biased 4) None of the above. ‘The numbers of depletion layers in atransistorare.. = 1) 131.2 a) Four) Three c)One_—d) Two. Most of the majority carriers from the emitter a) recombine in the base b) recombine in the emitter ©) pass through the base region to the collector 4) None of the above. Which of the following is true fora bridge rectifier? 01) 141.2. a) The peak inverse voltage or PIV for the bridge rectifier is lower when compared to an identical center tapped rectifier, b) The output voltage for the center tapped rectifier is lower than the identical bridge rectifier ©) A transistor of higher number of coil is required for center tapped rectifier than the identical bridge rectifier 4) All of the mentioned (O12) 2 12H Scanned with CamScanner21UEC104C ). No. Question Marks BLL CO PI PART-R Unrr. 7 a) With a neat diagram, wave rectifier with relevant waveforms, 8) Ina two diode Full w, across each half of * ©xplain the working of a full (07) 2 3 12 Sapacitor filter along with “Ve rectifier circuit, the voltage (07) 4 3 212 the transformer secondary is tance is 950 Q and each diode c) What is a regulator? Explain the Zener diode voltage (06) 3 2 121 8) Explain the input and output characterics of common (08) 2 = 11.2.1 base configuration of NPN transistor with relevant graphs. ) Obtain the relationship between age and B.,. (ay en ©) Calculate the values of 1, fy &B,, for a transistor (06) 3 4 2.413 with the values of @g- = 0.98 and Jy = 120 yA UNIT- I Explain the concept of DC load line and bias point?) = (08) «22.2 Draw a neat sketch to explain the base biasing of a (04) 2 3 942 transistor in CE mode? For the transistor shown in Fig. 4(c), B=30ind VI (08) 3 gag such that Vez = 6V Nee, wav Rao 22158, Fig. 4(¢) in the Barkhausen (10) 3 2 212 <9 ines ,edback? Explain tl i 1. 5. ay ies is eth oscillations with the help of criterion neat diagram. jas circuit and precisely (10) 3 3 2, ider bias cit 12 Draw alate an expression fs card Ve analyze Scanned with CamScanner21UECS © Question Marks BLL CO 1 QNo. UNIT- I 6. a) Convert: (Qo 3 4 134 i) (48350)10= C)io= C)s ii) QAB.8) 16= Q)o= Cs i) Add 125 and — 68 using 2’s complement (0) 3 4 13.1 ii) Subtract (101.101), - (1111-101). using 2's complement. » 7. a) Explain half adder with the help of necessary details. (10) 2 3 22 Also draw the circuit of half adder using only NAND gates. With the help of neat diagram and example, explain (10) 3 3 213 parallel binary adder. » UNIT- IV 8. a) What is Communication? Explain the elements of (10) 2 1 3.1.1 ‘communication system. Explain amplitude modulation (AM) with relevant (10) 2 3 2.1.2 waveforms and derive the necessary expression for AM, b 9. a) With suitable waveforms explain frequency (10) 2 3 212 modulation along with its advantages over Amplitude modulation, 'b) With neat block diagram, explain ASK in detail. (10) 3 3 212 Scanned with CamScanner| 21UEC104C sn? [Bl Al | B.E. First Semester End Examinations, May 2023 Basic Electronics Duration: 3 Hours Max. Marks: 100 NOTE: PART-A: All questions are compulsory. ; PART-B: Answer any ONE full question from each unit i Marks BLL CO PI i Q.No. Question: PART-A 1. i, Transistor is oy ottoot 212 a) Apassive component b) Active component ©) None of these 4) Botha&b ii, ‘The DC current through each diode in a bridge (01) 12 2 121 rectifier equals: a) The DC load current ») Half the DC load current c) Twice the DC load current 4) One-fourth the DC load current iii, When used as a voltage regulator, Zener diode is (01) 12 2 121 normally a) Not biased b) Forward biased ©) Reverse biased 4) None of the above iv. InaBIT, oy ot 3 22 a) The base region is sandwiched between emitter and collector b) The collector is sandwiched between base & emitter c) The emitter region is sandwiched between base & and collector 4) None of the above vy. Transistor works when the emitter junction is____— (01), —sL2- 2 212 biased and collector junction is biased. a) Forward, forward b) Reverse, reverse ©) Reverse, forward 4) Forward, reverse : vi. The output from an unfiltered half wave or full wave 1) LL 4 9 1.24 } rectifier is a a) Smooth DC voltage —_—_—b) Steady DC voltage ) Pulsating DC voltage d) AC voltage vii, The binary number 10101 is equivalent to decimal (01) 13 5 13.1 number a) 19 by12 027 dn Scanned with CamScannery.No. Question PART-B UNIT-1 half , ram, explain the working ofa Me a “lone with eal waveforms. 7 ban vo diode FWR citeuit, the yoltage across a ot rite transformer secondary iS 100 V. The lot at jg 950 9 and cach diode has 4 forwal t barvaees of 50 9. Find the de load current, the rms an ‘of the load current, efficiency and piv. Explain how Zener diode regulates the out : ere vaying inp and load conditions. — a) With a neat diagram, explain the operation transistor. : 1) Eglsin input, output and transfer characteristics of transistor in common base configuration. «) Obtain the relationship between cand Bue Cale Petes of lc, fe and Bi: for a transistor with the values of ae 0.98 and Ip = 120}. t voltage of NPN UNIT- 1h 2) What isthe need for transistor biasing? {) Draw a nest circuit and explain the precise analysis of voltage divider biasing with necessary equations. ¢) Determine the operating point for a silicon transistor biased by base bias method for B = 100, RC = 2.5 k2, Ro = 500 KO and Vec = 20V. Also, draw the DC toad line. 8) What is meant by feedback? Derive an expression for voltage gain with positive feedback b) With neat circuit, explain single stage CE amplifier. ©) AHartley oscillatorcireuit having two individual inductors of O.SmH each are designed to resonate in parallel with a variable capacitor that can be adjusted between 100 pF and $00 pF. Determine the upper and lower frequencies of oscillation and also the Hartley oscillator's bandwidth UNIT- IM "% ») i) Subtract 673 from 461 using 10's complement fi), Subtract a (HILL01) from (100101), using I's ©) Realize EX-OR gate using NAND gates, Marks BLL CO (06) (08) (06) (05) (09) (06) (04) (08) (08) (06) 07) (7) (08) (08) (04) 21UEC104C L2 3 2 L2 LB 12 13 13 L3 13 13 PL 21.2 121 1.2.1 121 2412 212 212 2.2.1 212 221 13.1 224 23 Scanned with CamScannerQ.No. a) b) e) a) b) °) a) b) °) Question Explain 4-bit parallel adder with block diagram. Simplify the following Boolean expressions i) ABC + ABC + ABC ii)AB+A+ AB Design Full adder and implement it using two Half adder. UNIT- IV Describe the need for modulation. Explain amplitude modulation (AM) with relevant waveforms and derive the necessary expression for AM. With neat block diagram, explain communication system, Explain in brief, digital modulation techniques. Differentiate between FM and AM modulation. Explain the modulation of ASK in detail. Marks (06) (06) (08) (06) (08) (06) (06) (06) (08) nuecig? ; BLL CO L2 3 L3 3 13 3 L2 I 12 3 L4 3 L2 3 L4 3 L3 3 Scanned with CamScanner 221 243 212 3.1.1 3.11 21.2 212BIA ] 21UEC104C B.E. First Semester End Examinations, April 2024 Basic Electronics Duration: 3 Hours Max. Marks: 100 NOTE: PART-A: All questions are compulsory. PART-B: Answer any ONE full question from each unit. Q.No. Questions Marks BLL CO PI 1. is The number of diodes required for full wave bridge (01) LI | 13.1 rectifier is ii, A pulse in’ certain waveform occurs every 10ms. The (01) L2 20 13d frequency is__Hz iii, The binary number 1101 is equal to the decimal (01) 12 4 12.1 number. ‘A 3-variable Kamaugh map has _number of cells. (01) 2 vv. What is frequency range of optical communication? (01) A ‘vi, When the input to an inverter is HIGH(1), the output is (01) vii, What happens if a diode is reversed in a bridge (01) rectifier? viii. Define modulatiom. (ol) 1 ix. biasing method is also called fixed current (01) 122 bias method. x. How many types of gains are there? @) 1 xi. The output of a gate is LOW when at least one of its (02) 12 4 input is HIGH. This is true for a. AND b. NAND OR d. NOR Draw the circuit diagram for voltage doubler ‘circuit. (02) LI 2 221 State DeMorgan’s theorem (02) 12 1 221 xiv. Draw the logic symbol for NOT, AND, OR gates. (2) Lio 2 213 xv. Expand the following terms: @2) Lio ot 212 a, ASK b. FSK PART-B UNIT-I 2. a) A diode with V¢= 0.7 V is connected as a half wave — (06) L3 4 212 rectifier. The load resistance is 500 © and the (rms) ac input is 22 V. determine the peak output voltage, the peak load current and diode peak reverse voltage. b) With a neat circuit and waveforms, explain full wave (08) L201 1.2.1 bridge rectifier circuit using four diodes. . c) Calculate Ic and Ig for a transistor that has ag = 0.98 (06) L3 5 2.1.2 and In = 100A. Determine the value of Bic for the . transistor. Scanned with CamScannerQ.No. Questions Marks 3. a) Design a Zener voltage regulator for the following (06) d) 9) b) °) 5. a) b) a) b) specifications: Input-voltage=20 - 30V, Ti=2mA. Tzwax=50mA . | Draw and explain the multistage voltage multiplier with necessary equations an With a neat circuit and graphs, explain input, output, and gain characteristics of transistor in common base configuration. Output-voltage=10V, Load-current=0 - 10mA, UNIT - I The base bias circuit in the figure 4.a, has Ry = 470k, Re = 2.2kA, and Vc = 18 V, and the transistor has hye = 100. Determine Ip, Ic, and Vee. Briefly explain the collector to base bias circuit with necessary equations and appropriate circuits Compare the performance of the three basic bias circuits with appropriate circuit and Q-point range. Explain the function of each component used in single stage CE amplifier. Also explain its frequency response curve. With a neat circuit and waveform, explain RC phase shift oscillator. ‘The output power from an amplifier is S0mW when the signal frequency is $ kHz, The power output falls to 25mW when the frequency is increased to 20 kHz. Calculate the output power change in decibels. UNIT - U1 Find the value of base ‘x’, if i.) (211)x = (152)s ii.) (135)x + (144)x = (323) Convert the following hexadecimal number to decimal i) (Chis ii.) (AS8)i6 Scanned with CamScanner (06) (08) (06) (08) (06) (10) (06) (04) (08) (06) BLL CO L304 C3 eeeaS) 2 1 L303 2 2 Llo1 2 3 2. 3 L304 Lae 13>) 4 21UEC104 PL 13.1 1.3.1No» v : Questions i 0 i.) Subtract (11001), : complement method from (101101): using 2's ii.) Subtract comple Pho fom (69. it plement method in Aas 5)io using 10's r Implement | : eons Bale using only NAND and and lopical ae basic gates, write truth table °) Recs the following Boolean expression to simplest iy Hs RE ATH ii.) AB+AC+A B C(AB+C) UNIT -IV a) With neat block diagram, explain different elements of communication system. )_ Briefly explain the needs of communication. c) Explain different ‘elements of Analog ‘communication system with appropriate figure. in the modulation and detection of ‘ASK in detail. 9. a) Explai of AS b) Discuss frequency ulation in detail with necessary waveforms. : ications of electromagnetic «)_ List the eight typical a7? spectrum. Marks. (06) (06) (08) (06) (10) (05) (05) (10) (06) (04) 21UECI04C BLL CO 45 (ed [epg Bb 5 12:1 i 6 m ot 1253 23 it 3 PI 13.1 2.2.4 2.2.1 224 21.3 3.11 2.13 212 21.2 121 Scanned with CamScanner