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ICT1007-Part1-Tutorial1(Answer)

The document provides an overview of interrupts, cached data coherence in single and multiprocessor systems, and the differences between processes and programs. It also discusses which instructions should not be permitted in user mode, presents a scheduling problem with processes and their CPU burst times, and outlines the assignment briefing for students. Key points include the importance of managing interrupts and cached data, as well as the need for collaboration among students for the assignment.

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yuxun19999
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3 views

ICT1007-Part1-Tutorial1(Answer)

The document provides an overview of interrupts, cached data coherence in single and multiprocessor systems, and the differences between processes and programs. It also discusses which instructions should not be permitted in user mode, presents a scheduling problem with processes and their CPU burst times, and outlines the assignment briefing for students. Key points include the importance of managing interrupts and cached data, as well as the need for collaboration among students for the assignment.

Uploaded by

yuxun19999
Copyright
© © All Rights Reserved
Available Formats
Download as PDF, TXT or read online on Scribd
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ICT1007-Part1-Tutorial 1 and Assignment Briefing

1. Describe in detail when interrupt occur and how interrupt works?

Answer:

• An interrupt is a hardware-generated change of flow within the system. An interrupt


handler is summoned to deal with the cause of the interrupt; control is then
returned to the interrupted context and instruction.
• From lecture notes: ICT1007-Part1-01

2. Discuss, with examples, how the problem of maintaining coherence of cached data
manifests itself in the following processing environments:
a) Single-processor systems
b) Multiprocessor systems

Answer:

• In single-processor systems, the memory needs to be updated when a processor


issues updates to cached values. These updates can be performed immediately or in
a lazy manner.
• In a multiprocessor system, different processors might be caching the same memory
location in its local caches. When updates are made, the other cached locations
need to be invalidated or updated.
• From lecture notes: ICT1007-Part1-01
ICT1007-Part1-Tutorial 1 and Assignment Briefing

3. Which instructions should not be permitted in the user mode? Explain your answer in one or
two sentences per each.
a) Read device register for a given device.
b) Read the time of day clock.
c) Disable all interrupts.

Answer: (a) and maybe (c) [if reading the date/time doesn’t require hardware access]

a) Whether this is permissible depends on the device and depends on the register. It is ok
to read the status bits to see if a floppy is mounted. It is not ok to read a device register
that holds data that may belong to another user. Typically, IO/device access is privileged
mode.
b) Can be permitted in the user mode, because reading the time of day clock is not a
privileged operation.
c) Should not be permitted in the user mode, because interrupts must be handled on
behalf of the OS, it’s not safe for user programs to be able to service or ignore
interrupts, nor is it safe for them to have raw access to devices.

4. Briefly describe main differences between a process and a program.

Answer:

Program is a set of instructions stored on secondary memory like hard disk. Process is
usually defined as an instance of a running program, and consists of two components:

• Process Control Block (PCB) that the OS uses to manage the process. PCB is also
where the system keeps statistical information about the process.
• An address space that contains all the executable or DLL module's code and data. It
also contains dynamic memory allocations such as thread stacks and heap
allocations.

From lecture notes: ICT1007-Part1-03


ICT1007-Part1-Tutorial 1 and Assignment Briefing

5. Consider the following set of processes, with the length of the CPU burst time given in
milliseconds.
Process Burst Priority
Time
P1 2 2
P2 1 1
P3 8 4
P4 4 2
P5 5 3

Assume the processes arrive in the following order P1, P2, P3, P4, P5 all at time 0.
a. Draw four Gantt charts that illustrate the execution of these processes using the
following scheduling algorithms: FCFS, SJF, non-preemptive priority (a smaller priority
number implies a higher priority), and RR (quantum = 1).
b. What is the turnaround time of each process for each of the scheduling algorithms in
part a?
c. What is the waiting time of each process for each of these scheduling algorithms?
d. Which of the algorithms results in the minimum average waiting time (over all
processes)?

Answer:

b) Turnaround time (ms)


FCFS SJF/Priority RR
P1 2 3 6
ICT1007-Part1-Tutorial 1 and Assignment Briefing

P2 3 1 2
P3 11 20 20
P4 15 7 14
P5 20 12 17

c) Waiting time (ms)


FCFS SJF/Priority RR
P1 0 1 4
P2 2 0 1
P3 3 12 12
P4 11 3 10
P5 15 7 12

d) Average waiting time FCFS=6.2, SJF/priority=4.6, RR=7.8


SJF/Priority has minimum average waiting time.

From lecture notes: ICT1007-Part1-05

6. Assignment briefing
• Faculty will brief the assignment in detail
• Students should form team of 5 members and update the faculty
• Students should discuss the assignment within your team
• Clarify any doubts with the faculty

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