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Analog Devices How to Successfully Calibrate an Open Loop DAC Signal Chain

This technical article discusses the calibration of open-loop DAC signal chains, focusing on precision current sourcing DACs like the AD5770R and LTC2662. It introduces two calibration methods, TempCal and SpecCal, and explains the importance of addressing intrinsic and system-level errors for accurate DAC performance. The article also provides practical calibration techniques using the AD5676R as an example, emphasizing the role of temperature and reference sources in maintaining accuracy.

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0% found this document useful (0 votes)
6 views

Analog Devices How to Successfully Calibrate an Open Loop DAC Signal Chain

This technical article discusses the calibration of open-loop DAC signal chains, focusing on precision current sourcing DACs like the AD5770R and LTC2662. It introduces two calibration methods, TempCal and SpecCal, and explains the importance of addressing intrinsic and system-level errors for accurate DAC performance. The article also provides practical calibration techniques using the AD5676R as an example, emphasizing the role of temperature and reference sources in maintaining accuracy.

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alex.gaoding
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
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Technical Article

How to Successfully
Calibrate an Open-Loop
DAC Signal Chain
Martina Mincica, Product Applications Engineer and
Alice O’Keeffe, Analog Devices Co-Op

Introduction Precision current sourcing DACs (IDACs), like the AD5770R and the LTC2662, are
Any practical electronic application is subject to multiple sources of error that a new category of DACs that can precisely set an output current in a predefined
can make the most precise components deviate from their data sheet behavior. range without requiring any additional external component.
When the application signal chain doesn’t have a built-in mechanism to self-
DAC Transfer Function Theory and Intrinsic Errors
adjust for these errors, the only approach to minimize their impact is to measure
them and calibrate them out systematically. An ideal digital-to-analog converter produces an analog output voltage or cur-
rent exactly proportional to the input digital code and independent of unwanted
An open-loop system is a system that does not use its output to perform adjusting external influences like power supplies and reference variations.
control actions on its inputs to achieve the required performance, while in a
closed-loop system, the output depends on a control action in the system that can For an ideal voltage output DAC, the increase in output for a single step increase
automatically implement corrections to improve performance. Most digital-to- in input digital code is called LSB and is defined as:
analog converter (DAC) signal chains are set-and-forget type systems, where the
accuracy of the output must rely on the accuracy of each block in the signal chain. LSBSIZE (V)=
( VREF+) – ( VREF– ) (1)
A set-and-forget system is an open-loop system. For an open-loop system that 2n – 1
requires high accuracy, calibration is most likely needed and recommended. where:

We’ll introduce two types of DAC signal chain calibration: the TempCal (calibra- (VREF+) and (VREF-) are the positive and negative reference voltage. In some
tion at operating temperature), which can give the best level of error correction, cases, (VREF-) is equal to ground (0 V).
and the SpecCal (calibration using specifications), which is a valid alternative n is the resolution of the DAC in bits.
when using TempCal is not possible, but it’s not as comprehensive.
LSBSIZE (V) is the smallest increment to the DAC output in volts.
Table 1. Calibration Types and Errors That Can Be Corrected
This means that for any given input code, once the LSB is known, it should be
TempCal SpecCal possible to accurately predict the voltage output of the DAC.
DAC Intrinsic Errors  
VOUT (V)=DAC Code × LSBSIZE (V) (2)
Key Components  Can be included (for
Intrinsic Errors example, VREF) In practice, the accuracy of the DAC output is subject to gain and offset errors from
the DAC (intrinsic errors) and other components in the signal chain (system-level
Other System-Level  x errors). For example, some DACs have an integrated output amplifier, while oth-
Errors
ers require one that then becomes a possible source of additional errors.
Type of DACs In data sheets, the most relevant specifications are defined in the terminology
A unipolar voltage DAC can only give output either of positive or of negative. section. For DACs, this section lists parameters like offset error and gain error.
This article will look at the AD5676R as an example of a unipolar DAC and how Zero-scale error is a measurement of the output error when zero code (0x0000)
to accurately calibrate it. The same approach can be used to make necessary is loaded to the DAC register.
adjustments with other types of DACs.
Figure 1 shows how offset and gain errors affect a DAC transfer function for a
Bipolar voltage DACs like the AD5766 can achieve both positive and negative output. unipolar voltage DAC.
Current-output DACs are typically used in a multiplying configuration (MDAC) to Gain error is a measurement of the span error of the DAC, shown in purple in
provide variable gain; they usually require external amplifiers to buffer the Figure 1. The gain error is the deviation in slope of the DAC transfer charac-
voltage generated across a fixed resistor. teristic from the ideal. The ideal DAC transfer is shown in black.

VISIT ANALOG.COM
Offset error is a measurement of the difference between the actual and ideal Table 2. Units Conversion Matrix
output, in the linear region of the transfer function, shown in blue in Figure 1.
Note that the transfer function in blue is interpolated to meet the y-axis for LSB Volts %FSR PPM
negative VOUT and identify the offset error. LSB LSB/2N × VREF LSB/2N × 100 LSB/2N × 106

Volts (V × 2N)/VREF V/VREF × 100 V/VREF × 106


Gain
Error %FSR (%FSR)/100 × 2N %FSR/100 × VREF %FSR × 104

PPM PPM/106 × 2N PPM/106 × VREF PPM/104

TUE is a great asset to succinctly explain how accurate the DC DAC output is as
VOUT (V) a result of the sum of the intrinsic errors; however, it does not factor in system-
level errors that differ depending on the signal chain the DAC is implemented in
and its environment.
It’s worth noting that some DACs have a built-in buffer/amplifier in the output
Actual Gain (Error Only)
Ideal
stage and the data sheet specifications in this case reflect the effects of both as
Actual Offset (Error Only) part of the intrinsic errors.

System-Level Errors
Offset 0 1 2 3 4 5 6 7 8 9 10
Error Code (LSB)
When trying to analyze a DAC signal chain error budget for a given application,
the system designer should consider and verify the different components’ con-
Figure 1. Representation of offset error and gain error for a unipolar DAC. tributions, paying attention to the temperature at which the system is expected
to operate. Depending on the final applications, there can be many different
The effect of both gain error and offset error can be seen in the blue plot of Figure 4.
building blocks to the signal chain, including power ICs, buffers or amplifiers,
The same parameters are also defined in relation to how they change (drift) with and different types of active loads that can contribute to the system-level errors.
changes in temperature.
Reference Source
Zero code error drift is a measure of the change in zero code error with changes
Every DAC requires a voltage reference to operate from. The reference source is one
in temperature.
of the major contributors to the accuracy of the DAC and of the overall signal chain.
The gain error temperature coefficient is a measurement of the change in gain
The key reference performance specifications are also defined in standalone
error with changes in temperature.
reference data sheets like the ADR45xx family or as part of the DAC data sheet if
Offset error drift is a measurement of the change in offset error with a change the device has an internal reference source available to the user.
in temperature.
Dropout voltage, sometimes referred to as supply voltage headroom, is defined
Temperature variation plays a major role in the accuracy of electronic systems. as the minimum voltage differential between the input and output such that the
While the intrinsic gain and offset error of a DAC are usually specified with output voltage is maintained to within 0.1% accuracy.
respect to temperature, there are other components of the system that can have
The temperature coefficient (TC or TCVOUT) relates the change in the output voltage
an impact on the overall offset and gain of the output.
to the change in the ambient temperature of the device, as normalized by the
So even when the INL and DNL of the DAC are very competitive, there are other output voltage at 25°C. The TCVOUT for the ADR4520/ADR4525/ADR4530/ADR4533/
errors to consider—particularly with respect to temperature. Most recent DACs ADR4540/ADR4550 A grade and B grade is fully tested over three temperatures:
specify the total unadjusted error (TUE) as a measure of the output error taking −40°C, +25°C, and +125°C. The TCVOUT for the C grade is fully tested over three
all the various errors into account—namely, INL error, offset error, gain error, temperatures: 0°C, +25°C, and +70°C. This parameter is specified using two
and output drift over supplies and temperature. TUE is expressed in %FSR. methods. The box method is the most common method and accounts for the
temperature coefficient over the full temperature range, whereas the bowtie
When the data sheet doesn’t specify TUE for a DAC, it can be calculated using a
method calculates the worst-case slope from +25°C and is therefore more useful
technique called RSS, or root sum squared—a technique used to sum uncor-
for systems that are calibrated at +25°C.
related error sources for error analysis.
For certain DACs, external reference sources exhibit better performance compared
TUE = INLERR2 + OffsetERR2 + GainERR2 + ... (3)
to integrated references. The reference voltage directly impacts the transfer
There are other, smaller error sources that are usually omitted because of their function, so any change in this voltage proportionally changes the slope of the
less relevant contribution like output drift, etc. transfer function—that is, the gain.
Each of the specifications of each component in the system must be converted It’s worth noting that some DACs have a built-in buffered internal reference and
into the same units. This can be done using Table 2. the data sheet specifications in this case reflect the effects of these internal
blocks as part of the intrinsic errors.

2 How to Successfully Calibrate an Open-Loop DAC Signal Chain


Line Regulation Calibrating out gain and offset errors that are constants with no external influ-
Line regulation is defined for every standalone IC acting as a supply as the change ences is a simple procedure in theory. The linear region of the transfer function
in output in response to a given change in input. This applies to the power supply, of the DAC can be modeled as a straight line described by:
buffers, and reference ICs that are supposed to maintain their output voltage y = mx + c (4)
stable regardless of the input. Line regulation is usually specified in data sheets at
ambient temperature. where:
Load Regulation y is the output.
Load regulation is defined as the incremental change in output voltage for a m is the slope of the transfer function accounting for the gain error (shown in
change in load current. Voltage outputs are usually buffered to reduce the impact purple in Figure 1).
of this variation. Some DACs may not buffer the reference input. Therefore, as
the code changes, the reference input impedance will also change, causing a x is the input to the DAC.
change in reference voltage. The effect on the output is generally small but should c is the offset voltage (shown in blue in Figure 1).
be considered in high accuracy applications. This is usually specified in data
sheets at ambient temperature. Ideally m is always one and c is always zero. In practice they account for the
gain and offset error of the DAC and, once known, they can be accounted for
Solder Heat Resistance Shift in the DAC input to achieve a number closer to the ideal DAC output. The gain
Solder heat resistance (SHR) shift is particularly relevant to reference source. can be calibrated out by multiplying the digital DAC input by the reciprocal of
It refers to the permanent shift in output voltage that is induced by exposure the gain error. The offset error can be removed by adding the inverse of the
to reflow soldering and is expressed as a percentage of the output voltage. See the measured offset error to the digital DAC input.
data sheets for the ADR45xx family for more details. In general, all ICs are somehow The equation below shows how to calculate the correct DAC input to produce the
affected by the SHR shift, but this is not always quantifiable, and it depends greatly desired voltage:
on the specific system assembly for the application.
Ideal DAC Code
Actual DAC Code = – Offset Error (LSB) (5)
Long-Term Stability Gain
Long-term stability defines the change in output voltage vs. time and is speci- where:
fied in ppm/1000 hours. An application’s long-term stability can be improved by
Actual Output Span
PCB-level burn-in. Gain = (6)
Ideal Output Span
Open-Loop Calibration Theory Offset Error (V)
Offset Error (LSB) = (7)
A DAC signal chain simplified diagram is shown in Figure 2. The blocks outlined LSBSIZE (V)
in black show a simplified open-loop signal chain, while those outlined in gray
are an example of the additional components needed to realize the closed-loop
Note that offset error can be positive or negative.
signal chain.
Also see the “Open-Loop Calibration Techniques for Digital-to-Analog Converters”
Ref
Analog Dialogue article.

Power How to Successfully Calibrate a DAC Signal Chain


ICS *
In this section we’ll describe how to calibrate offset and gain in a DAC signal
* Actuator/ chain in practice, using the AD5676R as an example. For all the measurements,
DAC Load
Digital
the EVAL-AD5676 evaluation kit has been used with the AD5676R internal refer-
Engine
* ence enabled. The EVAL-AD5676 board and the measurement setup are both part
ADC Sensor
of the signal chain we are measuring in the example. Each component of this
* Signal Conditioning (Optional)
signal chain (power ICs on the board, AD5676R, parasitics introduced by layout
Figure 2. DAC signal chain simplified diagram.
and connectors, etc.) is contributing to the system errors. The idea is to show
how this system can be calibrated as an example for any other system of choice.
The closed-loop option requires additional components and digital data manipula-
tion via software to deliver a much more accurate output. When these additional An EVAL-SDP-CB1Z Blackfin® SDP controller board (SDP-B) is used to communicate
resources can’t be added for various reasons (space, cost, etc.), the open-loop with the AD5676R on the EVAL-AD5676 evaluation kit and an 8-digit DMM is used
solution is still valid—provided it can deliver the required accuracy. That’s where to measure the output voltage of VOUT0. A climate chamber is used to control the
this article can help in clarifying how the open-loop calibration can be done. temperature of the full system made of EVAL-SDP-CB1Z plus EVAL-AD5676 with the
AD5676R using the internal reference.
The EVAL-AD5676 is powered up as described in the User Guide and the link configu-
ration is shown in Table 3.

VISIT ANALOG.COM 3
Table 3. Configuration of Jumpers on EVAL-AD5676
Board for Described Measurements VOUT (V)
Actual
X = Y (Ideal)
Link No. Position X = MX + C

LK1 A Gain Error


FS Error
LK2 A

LK3 A
Output
Output Span
LK4 A Span
(Ideal)
(Actual)

First the signal chain errors without calibration (NoCal) have been assessed for
different temperatures. The output error has been calculated considering the
difference in LSBs between the ideal value and the measured value at specific
ZS Error
input codes. This error includes both the intrinsic and extrinsic errors of the DAC Offset ZS ZSLIN FSLIN FS Code (LSB)
Error
and the overall signal chain on the EVAL-AD5676 board. The output error with no
calibration is shown in Figure 3.

15 Figure 4. Unipolar voltage DAC transfer function and errors.


+50°C
+25°C
–5°C Once the ZSLIN and FSLIN codes have been identified, we can collect the measure-
10 –20°C
ments needed for the calibration, which are the DAC voltage outputs at those two
codes (VOUT at ZSLIN and VOUT at FSLIN), plus a few other codes in between (¼ scale,
5
mid-scale, and ¾ scale)
Error (LSB)

0 The measurements should be collected at the operating temperature for the applica-
tion. When this is not possible, the data sheets of the devices in the signal chain
–5 can be used to derive the information needed, once the two main data points
have been collected at ambient.
–10
Each device in the signal chain contributes to the errors, and each board is different
from the other, so it should be calibrated individually.
–15
0 10,000 20,000 30,000 40,000 50,000 60,000 70,000
DAC Code TempCal: Calibration at Operating Temperature
Figure 3. EVAL-AD5676 output error in LSB with NoCal. The best level of calibration is achieved by measuring the errors in the applica-
The information needed to calculate the offset and gain errors and, subsequently, tion environment at the operating temperature, and systematically correcting
the correction codes resides in the transfer function. Two points are needed for them when writing to the DAC to update the output.
that: one data point close to zero-scale (ZSLIN) and one close to full-scale (FSLIN). The To calibrate the DAC using this method, at the temperature the system will be
idea is to work in the linear region of the DAC. This information is usually provided operating at, measure the DAC output at code ZS LIN and FS LIN. Construct the
together with INL and DNL specs, most likely in the endnotes to the spec table. For transfer function as follows:
the AD5676R, for example, the linear region goes from code 256 and code 65280.
VOE = Actual Output at ZSLIN– Ideal Output at ZSLIN (8)
Figure 4 shows a diagram to explain the linear region of a DAC.
Actual Output Span = VFS,LIN,ACT – VZS,LIN,ACT (9)
Ideal Output Span = VFS,LIN,IDEAL – VZS,LIN,IDEAL (10)

Actual Output Span


Gain = (11)
Ideal Output Span

Actual Output Span


LSB = (12)
FSLIN – ZSLIN

Ideal Code VOE


Actual Code = – (13)
Gain LSB

4 How to Successfully Calibrate an Open-Loop DAC Signal Chain


where:
VOE,drift = Offset Error Drift × ∆Temperature (15)
VOE = Offset error (V)
The change in gain error due to temperature is indicated in the gain error vs. the
VFS,LIN,ACT = Actual output at FSLIN temperature TPC. Determine the gain error in % of FSR from the graph and apply
Equation 16.
VZS,LIN,ACT = Actual output at ZSLIN
100 – ∆Gain Error (TPC)
GEtemp = (16)
VFS,LIN,IDEAL = Ideal output at FSLIN 100
VZS,LIN,IDEAL = Ideal output at ZSLIN Now that we have estimated the offset error and gain error at the operating tempera-
ture, we can use Equation 17 to determine the input codes for the SpecCal output.
Note that offset error can be positive or negative.
GEtemp
Figure 5 shows the output error achieved for the EVAL-AD5676 evaluation kit Actual Input = ×
GEamb
with the TempCal method. (17)
VOE,amb VOE,drift
Ideal Input – –
15 LSB LSB
+50°C
+25°C
–5°C
where:
10 –20°C
∆Gain Error(TPC) = GEamb(TPC) – GEtemp(TPC) (18)
5
Figure 6 shows the output error achieved for the EVAL-AD5676 evaluation kit with
the SpecCal method.
Error (LSB)

15
+50°C
–5 +25°C
–5°C
10 –20°C
–10

5
–15
Error (LSB)

0 10,000 20,000 30,000 40,000 50,000 60,000 70,000


DAC Code 0

Figure 5. System output error in LSB with TempCal at different temperatures.


–5
SpecCal: Calibration Using Specifications
If it is not possible to measure the errors in the application environment at the oper- –10

ating temperature, it is still possible to achieve a high level of calibration using the
AD5676R data sheet and the DAC transfer function calibrated at ambient temperature. –15
0 10,000 20,000 30,000 40,000 50,000 60,000 70,000
DAC Code
To calibrate the DAC using this method, measure the DAC output at codes ZSLIN
Figure 6. System output error in LSB with SpecCal at different temperatures.
and FSLIN at ambient temperature. Construct the transfer function as described
in the TempCal section by calculating the gain and offset error at ambient and The internal reference was used in this instance. An external reference can add to
applying Equation 14. the overall error. Errors due to the reference source can be accounted for using
VOE,amb the reference data sheet by considering the reference drift at the temperature of
Ideal Input
Actual Input = – (14) interest. Changes to the reference voltage alter the actual output span and, thus,
GEamb LSB the LSB size. This should be accounted for if an external reference is used. The
where: temperature vs. output voltage TPC can be used to determine the change in the
GEamb = Gain error at ambient temperature output span due to the reference drift.
Actual Output Spantemp =
VOE,amb = Offset error (V) at ambient temperature Actual Output Spanamb +VREFdrift (19)

Calibrating the DAC signal chain at ambient temperature accounts for the system-level where:
errors. However, the change of the external errors due to temperature change
VREFdrift = VREFtemp (TPC) – VREFideal (20)
are not accounted for; thus, this method of calibration is not as accurate as the
TempCal method. Conclusion
Drift in intrinsic DAC errors, namely offset and gain errors, due to change in operat- This article outlined some of the main causes of error in a DAC signal chain,
ing temperature can then be accounted for using the data sheet specifications. including DAC intrinsic errors that are defined in the data sheet and system-level
This is what we call SpecCal. The typical value of offset error drift is listed in the errors that vary depending on the system and must be considered in an open-
specifications table of the AD5676R data sheet, and the offset error vs. tempera- loop application.
ture typical performance characteristics (TPC) indicates which direction the error
Two methods of calibration have been discussed, one for when the DAC can be
drifts depending on an increase or decrease in temperature from ambient.
calibrated at the temperature the system will be operating at and the second for

VISIT ANALOG.COM 5
when it is not possible to calibrate at the operating temperature, but measure-
ments can be taken at ambient temperature instead. The second method uses About the Authors
the TPCs and the specifications outlined in the data sheet of the DAC and other Martina Mincica is an applications engineer in the Precision Converter Group
ICs in the signal chain, to account for gain and offset error drift. at Analog Devices in Limerick. Prior to that, she was a design evaluation
The TempCal method can achieve much better accuracy than the SpecCal one. For engineer in the same group. She joined Analog Devices in 2011 after receiv-
example, Figure 7 shows how, for the EVAL-AD5676 board at 50°C, the TempCal ing her B.S.E.E., M.S.E.E., and Ph.D. in electronic engineering from University
method achieved a level of accuracy very close to the ideal, while the SpecCal of Pisa, Italy. Her field of interest at the time was radio frequency integrated
method still managed to deliver an improvement from the NoCal data. circuit design. Since then she has been working on precision DAC and ADC
bench evaluation. She can be reached at [email protected].
15
NoCal Alice O’Keeffe is a final year electronic and computer engineering student
SpecCal
TempCal currently studying in University of Limerick. In 2019 she completed her
10
eight month placement in Analog Devices’ Limerick campus, working with
the Precision Converters Applications Group. Alice worked with both the
5
Precision DAC and Precision ADC teams.
Error (LSB)

–5

Engage with the ADI technology experts in our online support community.
–10 Ask your tough design questions, browse FAQs, or join a conversation.

–15
0 10,000 20,000 30,000 40,000 50,000 60,000 70,000
DAC Code

Figure 7. System output error in LSB with NoCal, SpecCal, and TempCal at 50°C. Visit ez.analog.com
Temperature variation plays a major role in the accuracy of electronic systems.
Calibrating at the system operating temperature counteracts most errors. If
this isn’t possible, temperature variation can be tackled using the informa-
tion available in the DAC and other ICs’ data sheets to achieve accuracy of an
acceptable degree.

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