Model Name: SOM-DB5830

01 COVER 24 COM Port 1-2 / CAN

02 Block Diagram 25 LED/SCREW/PROBE/BTN/PCB
03 Power Map 26 ATX power / +V5_DUAL
04 COMe R3.0 Type6 RAW A/B 27 DC IN / +V3.3_DUAL
05 COMe R3.0 Type6 RAW C/D 28 RAPID SHUTDOWN
06 LAN0/USB 3.1 Port 0-1 29 Revision History
07 USB3.1 Port 2-3
08 USB3.1 Redriver Port 0-1
09 USB3.1 Redriver Port 2-3
10 USB2.0 Port 4-7
11 BIOS socket/SATA/RTC
12 HD Audio Codec ALC888
13 PCIe X4 Slot 1-2
14 PCI Express X16 Slot
15 Clock Buffer PCI-E/PCI
16 VGA
17 LVDS Connector
18 HDMI Conn. DDI3
19 DP Conn. DDI port 1-2
20 SYS FAN / SMART FAN
21 GPIO/SMBus/I2C/MicroSD/BZ
22 BIOS / eSPI selection
23 Port 80/ LPC PH / TPM

Title
COVER
Size Document Number Rev
SOM-DB5830 A1
Monday, October 22, 2018
Date: Sheet 1 of 34
 COM-Express Type 6 Rev. 3.0

*Default SOM Module

85ohm LVDS1
DF13

85ohm eDP LVDS PCIEX16 85ohm

DF13
PCIE x16
Optional x16 Slot 0

85ohm PCIE4x Port 0-3 PCIEX1 PCIEX1 Port 6-7

PCIE4x 85ohm
x4 Slot 0 Port 0-5 Port 6-7 Port 4-5 from Row A, B x4 Slot 1

Port 4-5
85ohm PCIE4x
x4 Slot 1 Port 6-7 from Row C, D

DDI1
DDI[1:3] Display Port 85ohm
100ohm LAN0 LAN DP Conn. 1
RJ-45 stack USB3.1 x 2

Port 0-1
USB 2.0 DDI2
Display Port 85ohm
85ohm USB 2.0 x 2 Port 0-7 DP Conn. 2
LAN0 stack USB3.1 Port 0-1

Port 2-3
85ohm USB 2.0 x 2 DDI3
85ohm 100ohm
Pair with USB3.1 Port 2-3
DP to HDMI HDMI Conn.
HDMI_19P + DSUB_15P

85ohm USB 2.0 x 4 Port 4-7 level shfiter

Connector Row A,B

Connector Row C,D

NXP_PTN3363BS
QUADRUPLE STACKED Connector

HD Audio Codec
50ohm HDA
Audio Jack
Line-in, Line-out, MIC REALTEK ALC888S-VD2-GR 80ohm COMe R3.0 only support USB 3.0.
80ohm
Port 0-1 Port 0-1
SPDIF USB 3.1 USB3.1 10 Gbps USB 3.1 x 2
LAN0 stack USB3.1 Port 0-1
Redriver
ON_NB7NPQ7041MMUTXG
50ohm GPIO1 *Default GPIO
Pin Header 10P
Function select by jumper
85ohm
Port 2-3 Port 2-3
SDIO1 USB3.1 10 Gbps USB 3.1 x 2
50ohm DUAL STACKED Connector
microSD Conn. 8P
Optional Redriver
ON_NB7NPQ7041MMUTXG
LPC
50ohm LPC/eSPI LPC LPC /eSPI
LPC1 TPM Port 80
Pin Header 6x2P

50ohm VGA1 CRT

HDMI_19P + DSUB_15P

Port 0 Serial Port

50ohm COM1
Box Header 5x2P

50ohm COM2 *Default Port 1

Box Header 5x2P

50ohm CAN1
Box Header 5x2P
Optional SPI
50ohm BIOS1
SPI Socket Smart Fan
50ohm BIOS1
Pin Header 7P SYS Fan1

Power/Reset/Sleep/LID Button,
85ohm Port SATA WDTOUT LED, Thermal Alerm LED,
SATA Gen3 Battery low LED, Power Good Signal.
SATA Conn. 0
SATA Conn. 1
SATA Conn. 2
SATA Conn. 3

50ohm SMBUS1 SMBus

Wafer Box 4P

50ohm I2C1 I2C

Wafer Box 4P

EEPROM
2 Kbit (256 bytes )

Title
Block Diagram
Size Document Number Rev
SOM-DB5830 A1
Monday, October 22, 2018
Date: Sheet 2 of 34
 5 4 3 2 1

LVDS PWR LVDS INVERTER

ATX 24P +V12 +V12
1A (40mils) +V5 +V5
+V5
+VLVDS_PANEL_PWR 1A (40mils)
+V5
+V5
+V5 @ Max. supply 20A
Baseboard
+VLVDS_PANEL_PWR 1A (40mils) +V12 +V12
Power consumption +V3.3 1A (40mils)
+V5SB +V5_DUAL +V5_DUAL Max.10.337A
@ 11A 8.617A +V3.3
Power consumption +VLVDS_PANEL_PWR 1A (40mils)
+V5SB +V5SB @ 0.5A +V5_DUAL @ 2.5A
+V5_DUAL +V5 @ 5A 4.27A
+V5SB @ Max. supply 2.5A Max. supply 17.5A
+V5SB @ 2A
+V3.3_DUAL *Power consumption
D

APW7145 +V3.3_DUAL @ 1.4A

0.937A
System FAN / Smart FAN TPM D

+V3.3_DUAL +V12 2.2 x2 = 4.4A +V3.3_DUAL +V3.3_DUAL

Max. supply 3A
+V3.3 *Power consumption 4.4A (176mils) 25mA (1mils)
+V3.3 @8.255A
12A
+V3.3 @ Max. supply 20A
+V12 PCIE Slot SMBUS Pin Header
*Power consumption +V12 +V12 +V3.3_DUAL
+V12 @ Max. supply 24A +V12 @ 10.6A
16.5A +V3.3_DUAL(pin Header)
PCIe X16 x1 + PCIe X4 x2 80mA (3.2mils)
+V12 12A +V3.3 5.5A + (2.1A x2) = 9.7A (388mils)
+V3.3
EN
MOSFET PCIe X16 x1 + PCIe X4 x2
I2C Pin Header + ST_M24C02-RMN6TP
+V3.3_DUAL +V3.3_DUAL(pin Header)
+V12 COMe Module +V3.3_DUAL 3A + (3A x2) = 9A (360mils) 82mA (4mils)
+V3.3_DUAL
PCIe X16 x1 + PCIe X4 x2
Jumper Selector MOSFET
+VIN 375mA + (375mA x2) = 1125mA (45mils) (From Module) SPI Flash + Pin Header
(Normal:+V12 @ 12A) +V3.3_DUAL +V3.3_DUAL
(Min.:+V4.75 @ 30A) BUZZER 100mA (4mils)
GND +V5SB +V5 +V5
MOSFET 50mA (2mils) HDMI LS
EN
(Normal:+V5SB @ 2A)
DCIN (Min.:+V4.75SB @ 2.1A) +V3.3 +V3.3
30A ON_NCP45521IMNTWG-H 22mA (0.88mils)
+VBAT
C
+V3.3 +V3.3 C
+V4.75 ~ +V20 (Normal:+V3 @ 0.5A) 1A (40mils)
(Min.:+V2 @ 0.75A) HDMI Connector
+V3.3_SDIO +V3.3_SDIO +V5 +V5
1A (40mils) 55mA (2.2mils)

VGA DP Connector x2
+V5 +V5 +V3.3 +V3.3
1A (40mils)
500mA x2 = 1A (40mils)

ANPEC_APW7145KAI-TRG LC4032V
+V5_DUAL +V5_DUAL +V3.3 +V3.3
2.5A (100mils) 11.8mA (0.5mils)
+V3.3_DUAL
+V3.3_DUAL 3 A (120mils) SP3243EUEY-L
+V5 +V5
100mA (4mils)
REALTEK_ALC888S-VD2-GR
+V3.3 +V3.3
20.47mA (0.82mils) ATX Connector
+V12 +V12
B +V5_DUAL 24A (960mils) B
+V5_DUAL
237mA (10mils) +V3.3 +V3.3 20A (800mils)
+V5 +V5
USB3.0 x 4 port 15A (600mils)
+V5_DUAL +V5_DUAL +V5SB +V5SB 2.5A (100mils)
900mA x4 = 3.6A (144mils)
ATX12V Power Supply Design Guide ICS_ICS9112-16
USB2.0 x 8 port +V3.3 +V3.3
+V5_DUAL +V5_DUAL 40 mA (1.6 mils)
500mA x8 = 4A (160mils)
LATTICE_LC4032V-75T44C
PCIE Clock Buffer +V3.3 +V3.3
+V3.3 +V3.3 11.8mA (0.472mils)
200mA (8mils)

SN65HVD251DR
+V5 +V5
65mA (2.6mils)

A
ON_NB7NPQ7041MMUTXG A
+V3.3_DUAL +V3.3_DUAL
130mA x2 = 260mA (10.4mils)

Title
Power Map
Size Document Number Rev
SOM-DB5830 A1
Monday, October 22, 2018
Date: Sheet 3 of 34
5 4 3 2 1
 CN1A

[6] LAN1_MDI3-
A1
A2
A3
GND_FIXED_1
GBE0_MDI3-
GND_FIXED_13
GBE0_ACT#
B1
B2
B3
LAN1_ACT# [6]
COMe Rev. 3.0 PN:00A0000209
[6] LAN1_MDI3+ A4 GBE0_MDI3+ LPC_FRAME#/ESPI_CS0# B4 LPC_FRAME# [23]
[6] LAN1_LINK100# GBE0_LINK100# LPC_AD0/ESPI_IO_0 LPC_AD0 [23]
A5 B5
[6] LAN1_LINK1000# A6 GBE0_LINK1000# LPC_AD1/ESPI_IO_1 B6 LPC_AD1 [23]
[6] LAN1_MDI2- GBE0_MDI2- LPC_AD2/ESPI_IO_2 LPC_AD2 [23]
A7 B7
[6] LAN1_MDI2+ GBE0_MDI2+ LPC_AD3/ESPI_IO_3 LPC_DRQ0_ESPI_ALERT0# LPC_AD3 [23]
A8 B8
[6] LAN1_LINK# A9 GBE0_LINK# LPC_DRQ0#/ESPI_ALERT0# B9 LPC_DRQ1_ESPI_ALERT1# LPC_DRQ0_ESPI_ALERT0# [23] 1 TP3 TP28_PSM
[6] LAN1_MDI1- GBE0_MDI1- LPC_DRQ1#/ESPI_ALERT1#
A10 B10 A101-1 20170906
[6] LAN1_MDI1+ A11 GBE0_MDI1+ LPC_CLK/ESPI_CK B11 CLK33M_LPC [15] 1 For AE test.
TP4 TP28_PSM
A12 GND_FIXED_2 GND_FIXED_14 B12
[6] LAN1_MDI0- GBE0_MDI0- PWRBTN# PWRBTN# [25,26] CB_PWROK_PH
TP5 1 A13 B13
[6] LAN1_MDI0+ A14 GBE0_MDI0+ SMB_CK B14 SMB_CLK [13,14,15,21] CB_PWROK [26,27]
TP28_PSM
[6] GBE0_CTREF GBE0_CTREF SMB_DAT SMB_DAT [13,14,15,21]
A15 B15 SMB_ALT# [25]
[25,26] SLP_S3# SUS_S3# SMB_ALERT#

1
2
3
A16 B16
[11] SATA0_TX+ SATA0_TX+ SATA1_TX+ SATA1_TX+ [11]
A17 B17 CB_PWROK(2-3)
[11] SATA0_TX- SATA0_TX- SATA1_TX- SUS_STAT# SATA1_TX- [11]
A18 B18 R1 0 0402
[25] SLP_S4# A19 SUS_S4# SUS_STAT#/ESPI_RESET# B19 ESPI_RESET# [23]
CB_PWROK
[11] SATA0_RX+ SATA0_RX+ SATA1_RX+ SATA1_RX+ [11]
TP2 1 A20 B20 PH_3x1V_2.54mm MINIJUMPER_2_2.54mm
[11] SATA0_RX- SATA0_RX- SATA1_RX- SATA1_RX- [11]
TP28_PSM <Characteristic> <Characteristic>
A21 B21 1 TP7 TP28_PSM
TP6 1 A22 GND_FIXED_3 GND_FIXED_15 B22
[11] SATA2_TX+ A23 SATA2_TX+ SATA3_TX+ B23 SATA3_TX+ [11]
TP28_PSM
[11] SATA2_TX- SATA2_TX- SATA3_TX- SATA3_TX- [11] CB_PWROK_PH
A24 B24
[25] SLP_S5# A25 SUS_S5# PWR_OK B25
[11] SATA2_RX+ SATA2_RX+ SATA3_RX+ SATA3_RX+ [11] +V3.3_DUAL
A26 B26
[11] SATA2_RX- SATA2_RX- SATA3_RX- SATA3_RX- [11]
A27 B27 WDTOUT 1 TP8 TP28_PSM
[25] BATLOW# A28 BATLOW# WDT B28
[25,26] SATA_ACT# (S)ATA_ACT# HDA_SDIN2 CB_A_RESET# R410
A29 B29 SDIN1 and SDIN2 let it NC when not used 33
[12] HDA_SYNC A30 HDA_SYNC HDA_SDIN1 B30 PLTRST# [13,14,23,24,25]
0402 1%
[12] HDA_RST# HDA_RST# HDA_SDIN0 HDA_SDIN0 [12]
A31 B31 C220
A32 GND_FIXED_4 GND_FIXED_16 B32 100nF
*Default [12] HDA_BITCLK A33 HDA_BITCLK SPKR B33 SPKR [12,21]
10%_16V
[12] HDA_SDOUT HDA_SDOUT I2C_CK I2C_CLK [21]

4
R2 0 BIOS_DIS0#_ESPI_SAFS A34 B34 0402
[22] BIOS_DIS0# 1 A35 BIOS_DIS0#/ESPI_SAFS I2C_DAT B35 I2C_DAT [21]
0402 TP17 THERMTRIP#

VCC
THRMTRIP# THRM# EXT_THRM# [25]
TP28_PSM A36 B36
[10] USB6_P- USB7_P- [10]

GND
R3 NL/0 A37 USB6- USB7- B37 U17
[22] ESPI_SAFS [10] USB6_P+ A38 USB6+ USB7+ B38 USB7_P+ [10]
0402 TI_SN74AHC1G125DBVR
[10] USB_OC#67 USB_OC#45 [10]

1
2
3
Option A39 USB_6_7_OC# USB_4_5_OC# B39 SOT-23-5
[10] USB4_P- A40 USB4- USB5- B40 USB5_P- [10]
<Characteristic>
[10] USB4_P+ USB4+ USB5+ USB5_P+ [10] CB_RESET#
A41 B41
A42 GND_FIXED_5 GND_FIXED_17 B42
[7] USB2_P- USB2- USB3- USB3_P- [7]
A43 B43
[7] USB2_P+ A44 USB2+ USB3+ B44 USB3_P+ [7]
R411 NL/0
[7] USB_OC#23 USB_2_3_OC# USB_0_1_OC# USB_OC#01 [6]
A45 B45 0402 5%
[6] USB0_P- USB0- USB1- USB1_P- [6]
A46 B46
[6] USB0_P+ A47 USB0+ USB1+ B47 USB1_P+ [6]
+VBAT_C Pin A48 is RSVD for COM.0 R3. A48 VCC_RTC ESPI_EN# B48 USB0_HOST_PRSNT 1 TP9 TP28_PSM
ESPI_EN# [22]
1 TP10 TP28_PSM
TP11 1 GBE0_SDP A49 RSVD10_1 USB0_HOST_PRSNT B49
GBE0_SDP SYS_RESET# CB_RESET# PM_EXTRST# [25,26]
TP28_PSM A50 B50
[23] SERIRQ LPC_SERIRQ/ESPI_CS1# CB_RESET#
A51 B51 1 TP12 TP28_PSM
A52 GND_FIXED_6 GND_FIXED_18 B52
[13] PCIE1X5_TX+ PCIE_TX5+ PCIE_RX5+ PCIE1X5_RX+ [13]
A53 B53
[13] PCIE1X5_TX- A54 PCIE_TX5- PCIE_RX5- B54 PCIE1X5_RX- [13]
[21] GPI0_SD_DATA0 GPI0 GPO1 GPO1_SD_CMD [21]
A55 B55
[13] PCIE1X4_TX+ PCIE_TX4+ PCIE_RX4+ PCIE1X4_RX+ [13]
A56 B56
[13] PCIE1X4_TX- A57 PCIE_TX4- PCIE_RX4- B57 PCIE1X4_RX- [13]
GND_1 GPO2 GPO2_SD_WP [21]
A58 B58
[13] PCIE1X3_TX+ A59 PCIE_TX3+ PCIE_RX3+ B59 PCIE1X3_RX+ [13]
[13] PCIE1X3_TX- PCIE_TX3- PCIE_RX3- PCIE1X3_RX- [13]
A60 B60
GND_FIXED_7 GND_FIXED_19
A61 B61
[13] PCIE1X2_TX+ PCIE_TX2+ PCIE_RX2+ PCIE1X2_RX+ [13]
A62 B62
[13] PCIE1X2_TX- A63 PCIE_TX2- PCIE_RX2- B63 PCIE1X2_RX- [13]
[21] GPI1_SD_DATA1 GPI1 GPO3 GPO3_SD_CD# [21]
A64 B64 1 TP13 TP28_PSM
[13] PCIE1X1_TX+ PCIE_TX1+ PCIE_RX1+ PCIE1X1_RX+ [13]
A65 B65
[13] PCIE1X1_TX- A66 PCIE_TX1- PCIE_RX1- B66 PCIE1X1_RX- [13]
GND_2 WAKE0# PCIE_WAKE# [13,14]
A67 B67
[21] GPI2_SD_DATA2 A68 GPI2 WAKE1# B68 PM_WAKE# [25]
[13] PCIE1X0_TX+ PCIE_TX0+ PCIE_RX0+ PCIE1X0_RX+ [13]
A69 B69 1 TP14 TP28_PSM
[13] PCIE1X0_TX- PCIE_TX0- PCIE_RX0- PCIE1X0_RX- [13]
A70 B70
A71 GND_FIXED_8 GND_FIXED_20 B71 C1
[17] LVDS0_D0+ LVDS_A0+ LVDS_B0+ LVDS1_D0+ [17]
A72 B72 100nF
[17] LVDS0_D0- A73 LVDS_A0- LVDS_B0- B73 LVDS1_D0- [17]
10%_16V
[17] LVDS0_D1+ LVDS_A1+ LVDS_B1+ LVDS1_D1+ [17]
A74 B74 0402
[17] LVDS0_D1- LVDS_A1- LVDS_B1- LVDS1_D1- [17]
A75 B75
[17] LVDS0_D2+ A76 LVDS_A2+ LVDS_B2+ B76 LVDS1_D2+ [17] +V3.3
[17] LVDS0_D2- LVDS_A2- LVDS_B2- LVDS1_D2- [17]
A77 B77 J1(1-2) J1(3-4)
[17] LVDS_ENAVDD A78 LVDS_VDD_EN LVDS_B3+ B78 LVDS1_D3+ [17]
[17] LVDS0_D3+ LVDS_A3+ LVDS_B3- LVDS1_D3- [17]
A79 B79 A101-3
[17] LVDS0_D3- LVDS_A3- LVDS_BKLT_EN LVDS_BKLT_EN# [17]
A80 B80 MINIJUMPER_2_2.54mm MINIJUMPER_2_2.54mm R4 Update Q1 P/N to 1310006408-01
GND_FIXED_9 GND_FIXED_21 <Characteristic> <Characteristic> 4.7K
A101-1 Change from USB Client pin A81 B81 5%
to RSVD for COMe 3.0 . [17] LVDS0_CLK+ A82 LVDS_A_CK+ LVDS_B_CK+ B82 LVDS1_CLK+ [17]
0402
[17] LVDS0_CLK- LVDS_A_CK- LVDS_B_CK- LVDS1_CLK- [17]
A83 B83
[17] LVDS_DDC_CLK_eDP_AUX+ LVDS_I2C_CK LVDS_BKLT_CTRL LVDS_CTRL [17] +V5SB
A84 B84 A101-2
[17] LVDS_DDC_DAT_eDP_AUX- A85 LVDS_I2C_DAT VCC_5V_SBY_1 B85 J1
[21] GPI3_SD_DATA3 GPI3 VCC_5V_SBY_2 +V3.3

4
R2035 NL/0 SD_PWR_EN A86 B86 1 2
[21] SD_PWR_EN_R A87 RSVD VCC_5V_SBY_3 B87 +V5SB_R 3 4
Jumper_1/16W 0402 Q1

D1

S2
G2
[17] EDP_HPD# EDP_HPD VCC_5V_SBY_4 BIOS_DIS1#
A88 B88 2N7002KDW
[15] CLK_PCIE_REF+ PCIE_CK_REF+ BIOS_DIS1# BIOS_DIS1# [22]
Reserve SD_PWR_EN to CN1 PIN A86 for SD card use. A89 B89 PH_2x2V_2.54mm 1653002200
[15] CLK_PCIE_REF- A90 PCIE_CK_REF- VGA_RED B90 VGA_R [16]
<Characteristic>
+V3.3M_SPI A91 GND_FIXED_10 GND_FIXED_22 B91 A101-1 J1 change Jumper for R5
+V3.3M_SPI A92 SPI_POWER VGA_GRN B92 VGA_G [16] Phase Out for standardization. 4.7K
[11] SPI_MISO SPI_MISO VGA_BLU VGA_B [16]

G1

D2
S1
A93 B93 5%
[21] GPO0_SD_CLK
[11] SPI_CLK
A94 GPO0 VGA_HSYNC B94
VGA_HS [16]
VGA_VS [16] +V5SB@ 2A 0402

3
A95 SPI_CLK VGA_VSYNC B95
[11] SPI_MOSI TPM_PP SPI_MOSI VGA_I2C_CK VGA_DCLK [16] 0.115A/60V
[23] TPM_R_PP R6 NL/0 0402 A96 B96
1 A97 TPM_PP VGA_I2C_DAT B97 VGA_DDAT [16] FANPWM [20]
Jumper_1/16W TP16 TYPE10#
TYPE10# SPI_CS# SPI_CS# [11]
[24] B2B_Z_RS1_TX TP28_PSM A98 B98 R7 4.7K
A99 SER0_TX RSVD10_2 B99 5% 0402
[24] B2B_Z_RS1_RX A100 SER0_RX RSVD10_3 B100 B2B_Z_FANPWM
GND_FIXED_11 GND_FIXED_23
A101 B101 B2B_Z_FANPWM
[24] B2B_RS2_CAN_TX SER1_TX FAN_PWMOUT B2B_Z_FANTACH
A102 B102 R8 1K
[24] B2B_RS2_CAN_RX B2B_Z_LID# SER1_RX FAN_TACHIN B2B_Z_SLEEP#
1K R9 A103 B103 R10 1K 0805 1%
1% 0805 A104 LID# SLEEP# B104 0805 1%
+VIN A105 VCC_12V_1 VCC_12V_7 B105 +VIN

B2B_Y_FANTACH
+V3.3 VCC_12V_2 VCC_12V_8
B2B_Y_LID#

A106 B106

B2B_Y_SLEEP#
A107 VCC_12V_3 VCC_12V_9 B107 +V3.3 +V3.3
A108 VCC_12V_4 VCC_12V_10 B108
A109 VCC_12V_5 VCC_12V_11 B109
R11 A110 VCC_12V_6 VCC_12V_12 B110
4.7K GND_FIXED_12 GND_FIXED_24 R12 R13
5% 4.7K 4.7K
0402 5% 5%
TRI_ETXE-BP_REV3_SOM-COM-E
0402 0402
1.TEST PAD TP28
PN: 0030000085
6

A101-3
+VIN(SOM A/B/C/D) total:
6

4
Q2 Update Q3,Q4 P/N to 1310006408-01
D1

S2
G2

Q3 Q4
D1

D1
S2

S2
2N7002KDW
G2

G2
+V12 @ 12A 2N7002KDW 2N7002KDW

A101-3
+V4.75 @ 30A 2.TEST PAD TP-10
G1

D2
S1

Update Q2 P/N to 1310006408-01

PN: 0030000032
G1

G1
D2

D2
S1

S1
1

0.115A/60V
1

3
0.115A/60V 0.115A/60V

R14 4.7K
R15 4.7K 0402 5% +V3.3 FANTACH [20]
+V3.3 0402 5%

[25] LID# SLEEP# [25]

Title
COMe R3.0 Type6 RAW A/B
Size Document Number Rev
SOM-DB5830 A1
Monday, October 22, 2018
Date: Sheet 4 of 34
 STDOFF1 STDOFF2 STDOFF3 STDOFF4 STDOFF5
1 1 1 1 1

POST_M3.15*3.5L POST_M3.15*3.5L POST_M3.15*3.5L POST_M3.15*3.5L POST_M3.15*3.5L

<Characteristic> <Characteristic> <Characteristic> <Characteristic> <Characteristic>

SOM-AB1 SOM-CD1 CN1C X2 CN1D X4

CN1B X7 X8
C1 D1
C2 GND_FIXED_25 GND_FIXED_37 D2
C3 GND_3 GND_14 D3
[8] USB_SSRX0- USB_SSRX0- USB_SSTX0- USB_SSTX0- [8]
C4 D4
[8] USB_SSRX0+ C5 USB_SSRX0+ USB_SSTX0+ D5 USB_SSTX0+ [8]
C6 GND_4 GND_15 D6
[8] USB_SSRX1- C7 USB_SSRX1- USB_SSTX1- D7 USB_SSTX1- [8]
[8] USB_SSRX1+ USB_SSRX1+ USB_SSTX1+ USB_SSTX1+ [8]
C8 D8
C9 GND_5 GND_16 D9
[9] USB_SSRX2- C10 USB_SSRX2- USB_SSTX2- D10 USB_SSTX2- [9]
[9] USB_SSRX2+ USB_SSRX2+ USB_SSTX2+ USB_SSTX2+ [9]
C11 D11
C12 GND_FIXED_26 GND_FIXED_38 D12
[9] USB_SSRX3- USB_SSRX3- USB_SSTX3- USB_SSTX3- [9]
C13 D13
[9] USB_SSRX3+ USB_SSRX3+ USB_SSTX3+ USB_SSTX3+ [9]
C14 D14
C15 GND_6 GND_41 D15 X5 X6
DDI1_PAIR6+ DDI1_CTRLCLK_AUX+ DDI1_CTRLCLK_AUX+ [19]
C16 D16 X1 X3
C17 DDI1_PAIR6- DDI1_CTRLDATA_AUX- D17 DDI1_CTRLDATA_AUX- [19]
TRI_COME-BP TRI_COME-BP TRI_ETXE-BP_REV3_SOM-COM-E TRI_ETXE-BP_REV3_SOM-COM-E
C18 RSVD10_4 RSVD10_16 D18 <Characteristic> <Characteristic>
C19 RSVD10_5 RSVD10_17 D19
[13] PCIE1X6_RX+ C20 PCIE_RX6+ PCIE_TX6+ D20 PCIE1X6_TX+ [13]
[13] PCIE1X6_RX- PCIE_RX6- PCIE_TX6- PCIE1X6_TX- [13]
C21 D21
C22 GND_FIXED_27 GND_FIXED_39 D22
[13] PCIE1X7_RX+ PCIE_RX7+ PCIE_TX7+ PCIE1X7_TX+ [13]
C23 D23
[13] PCIE1X7_RX- C24 PCIE_RX7- PCIE_TX7- D24 PCIE1X7_TX- [13]
[19] DDI1_HPD DDI1_HPD RSVD10_18
C25 D25 CN1E
C26 DDI1_PAIR4+ RSVD10_19 D26
DDI1_PAIR4- DDI1_PAIR0+ DDI1_PAIR0+ [19] HOLE_CN1E
C27 D27 H1
RSVD10_6 DDI1_PAIR0- DDI1_PAIR0- [19]
C28 D28
C29 RSVD10_7 RSVD10_20 D29 TRI_ETXE-BP_REV3_SOM-COM-E R16
DDI1_PAIR5+ DDI1_PAIR1+ DDI1_PAIR1+ [19]
C30 D30 <Characteristic> 0
C31 DDI1_PAIR5- DDI1_PAIR1- D31 DDI1_PAIR1- [19]
GND_FIXED_28 GND_FIXED_40 5%
C32 D32
[19] DDI2_CTRLCLK_AUX+ DDI2_CTRLCLK_AUX+ DDI1_PAIR2+ DDI1_PAIR2+ [19] 0603
C33 D33
[19] DDI2_CTRLDATA_AUX- C34 DDI2_CTRLDATA_AUX- DDI1_PAIR2- D34 DDI1_PAIR2- [19]
[19] DDI2_DDC_AUX_SEL DDI2_DDC_AUX_SEL DDI1_DDC_AUX_SEL DDI1_DDC_AUX_SEL [19]
C35 D35
C36 RSVD10_8 RSVD10_21 D36
[18] DDI3_CTRLCLK DDI3_CTRLCLK_AUX+ DDI1_PAIR3+ DDI1_PAIR3+ [19]
C37 D37
[18] DDI3_CTRLDATA DDI3_CTRLDATA_ATX- DDI1_PAIR3- DDI1_PAIR3- [19]
C38 D38 CN1F
[18] DDI3_DDC_AUX_SEL C39 DDI3_DDC_AUX_SEL RSVD10_22 D39
[18] DDI3_PAIR0+ DDI3_PAIR0+ DDI2_PAIR0+ DDI2_PAIR0+ [19] HOLE_CN1F
C40 D40 H2
[18] DDI3_PAIR0- DDI3_PAIR0- DDI2_PAIR0- DDI2_PAIR0- [19]
C41 D41 TRI_ETXE-BP_REV3_SOM-COM-E R17
C42 GND_FIXED_29 GND_FIXED_41 D42 <Characteristic>
[18] DDI3_PAIR1+ DDI3_PAIR1+ DDI2_PAIR1+ DDI2_PAIR1+ [19] 0
C43 D43
[18] DDI3_PAIR1- DDI3_PAIR1- DDI2_PAIR1- DDI2_PAIR1- [19] 5%
C44 D44
[18] DDI3_HPD C45 DDI3_HPD DDI2_HPD D45 DDI2_HPD [19] 0603
C46 RSVD10_9 RSVD10_23 D46
[18] DDI3_PAIR2+ DDI3_PAIR2+ DDI2_PAIR2+ DDI2_PAIR2+ [19]
C47 D47
[18] DDI3_PAIR2- C48 DDI3_PAIR2- DDI2_PAIR2- D48 DDI2_PAIR2- [19]
A101-2 Add schematic for TYPE0# select. C49 RSVD10_10 RSVD10_24 D49
[18] DDI3_PAIR3+ C50 DDI3_PAIR3+ DDI2_PAIR3+ D50 DDI2_PAIR3+ [19]
CN1G
[18] DDI3_PAIR3- DDI3_PAIR3- DDI2_PAIR3- DDI2_PAIR3- [19]
C51 D51
C52 GND_FIXED_30 GND_FIXED_42 D52 H3 HOLE_CN1G
[14] PCIE16X_RX0+ C53 PEG_RX0+ PEG_TX0+ D53 PCIE16X_TX0+ [14]
[14] PCIE16X_RX0- PEG_RX0- PEG_TX0- PCIE16X_TX0- [14]
TYPE0# C54 D54 TRI_ETXE-BP_REV3_SOM-COM-E R18
[26] TYPE0# C55 TYPE0# PEG_LANE_RV# D55 PEG_LAN_RV# [25]
<Characteristic> 0
[14] PCIE16X_RX1+ PEG_RX1+ PEG_TX1+ PCIE16X_TX1+ [14]
C56 D56 5%
[14] PCIE16X_RX1- PEG_RX1- PEG_TX1- PCIE16X_TX1- [14]
TP23 1 TYPE1# C57 D57
C58 TYPE1# TYPE2# D58 TYPE2# [26] 0603
TP28_PSM
[14] PCIE16X_RX2+ PEG_RX2+ PEG_TX2+ PCIE16X_TX2+ [14]
C59 D59
[14] PCIE16X_RX2- C60 PEG_RX2- PEG_TX2- D60 PCIE16X_TX2- [14]
GND_FIXED_31 GND_FIXED_43
C61 D61
[14] PCIE16X_RX3+ C62 PEG_RX3+ PEG_TX3+ D62 PCIE16X_TX3+ [14]
CN1H
[14] PCIE16X_RX3- PEG_RX3- PEG_TX3- PCIE16X_TX3- [14]
C63 D63
C64 RSVD10_11 RSVD10_25 D64 H4 HOLE_CN1H
C65 RSVD10_12 RSVD10_26 D65
[14] PCIE16X_RX4+ PEG_RX4+ PEG_TX4+ PCIE16X_TX4+ [14]
C66 D66 TRI_ETXE-BP_REV3_SOM-COM-E R19
[14] PCIE16X_RX4- C67 PEG_RX4- PEG_TX4- D67 PCIE16X_TX4- [14]
<Characteristic> 0
[11,28] RAPID_SHUTDOWN RAPID_SHUTDOWN GND_17
C68 D68 5%
[14] PCIE16X_RX5+ C69 PEG_RX5+ PEG_TX5+ D69 PCIE16X_TX5+ [14]
[14] PCIE16X_RX5- PEG_RX5- PEG_TX5- PCIE16X_TX5- [14] 0603
C70 D70
C71 GND_FIXED_32 GND_FIXED_44 D71
[14] PCIE16X_RX6+ C72 PEG_RX6+ PEG_TX6+ D72 PCIE16X_TX6+ [14]
[14] PCIE16X_RX6- PEG_RX6- PEG_TX6- PCIE16X_TX6- [14]
C73 D73
C74 GND_7 GND_18 D74
[14] PCIE16X_RX7+ PEG_RX7+ PEG_TX7+ PCIE16X_TX7+ [14]
C75 D75 CN1I
[14] PCIE16X_RX7- PEG_RX7- PEG_TX7- PCIE16X_TX7- [14]
C76 D76
C77 GND_8 GND_19 D77 H5 HOLE_CN1I
C78 RSVD10_13 RSVD10_27 D78
[14] PCIE16X_RX8+ C79 PEG_RX8+ PEG_TX8+ D79 PCIE16X_TX8+ [14]
TRI_ETXE-BP_REV3_SOM-COM-E R20
[14] PCIE16X_RX8- PEG_RX8- PEG_TX8- PCIE16X_TX8- [14]
C80 D80 <Characteristic> 0
GND_FIXED_33 GND_FIXED_45
5%
C81 D81
[14] PCIE16X_RX9+ PEG_RX9+ PEG_TX9+ PCIE16X_TX9+ [14] 0603
C82 D82
[14] PCIE16X_RX9- C83 PEG_RX9- PEG_TX9- D83 PCIE16X_TX9- [14]
C84 RSVD10_14 RSVD10_28 D84
C85 GND_9 GND_20 D85
[14] PCIE16X_RX10+ C86 PEG_RX10+ PEG_TX10+ D86 PCIE16X_TX10+ [14]
[14] PCIE16X_RX10- PEG_RX10- PEG_TX10- PCIE16X_TX10- [14]
C87 D87 CN1J
C88 GND_10 GND_21 D88
[14] PCIE16X_RX11+ PEG_RX11+ PEG_TX11+ PCIE16X_TX11+ [14] HOLE_CN1J
C89 D89 H6
[14] PCIE16X_RX11- PEG_RX11- PEG_TX11- PCIE16X_TX11- [14]
C90 D90
C91 GND_FIXED_34 GND_FIXED_46 D91 TRI_ETXE-BP_REV3_SOM-COM-E R21
[14] PCIE16X_RX12+ PEG_RX12+ PEG_TX12+ PCIE16X_TX12+ [14] <Characteristic>
C92 D92 0
[14] PCIE16X_RX12- C93 PEG_RX12- PEG_TX12- D93 PCIE16X_TX12- [14]
GND_11 GND_22 5%
C94 D94
[14] PCIE16X_RX13+ PEG_RX13+ PEG_TX13+ PCIE16X_TX13+ [14] 0603
C95 D95
[14] PCIE16X_RX13- C96 PEG_RX13- PEG_TX13- D96 PCIE16X_TX13- [14]
C97 GND_12 GND_23 D97 1 TP28 TP28_PSM
C98 RSVD10_15 RSVD10_29 D98
[14] PCIE16X_RX14+ PEG_RX14+ PEG_TX14+ PCIE16X_TX14+ [14]
C99 D99 COM.0 R3.0 Changes from R2.1:
[14] PCIE16X_RX14- PEG_RX14- PEG_TX14- PCIE16X_TX14- [14]
C100 D100 Remove TYPE 2 D97 pin PEG_ENABLE#. CN1K
GND_FIXED_35 GND_FIXED_47
TYPE 6 is RSVD. HOLE_CN1K
C101 D101 H7
[14] PCIE16X_RX15+ C102 PEG_RX15+ PEG_TX15+ D102 PCIE16X_TX15+ [14]
[14] PCIE16X_RX15- PEG_RX15- PEG_TX15- PCIE16X_TX15- [14]
C103 D103 TRI_ETXE-BP_REV3_SOM-COM-E R22
C104 GND_13 GND_24 D104 <Characteristic>
+VIN VCC_12V_13 VCC_12V_19 +VIN 0
C105 D105
VCC_12V_14 VCC_12V_20 5%
C106 D106
C107 VCC_12V_15 VCC_12V_21 D107 0603
C108 VCC_12V_16 VCC_12V_22 D108
C109 VCC_12V_17 VCC_12V_23 D109
C110 VCC_12V_18 VCC_12V_24 D110
GND_FIXED_36 GND_FIXED_48
CN1L

H8 HOLE_CN1L
TRI_ETXE-BP_REV3_SOM-COM-E
TRI_ETXE-BP_REV3_SOM-COM-E R23
+VIN(SOM A/B/C/D) total: <Characteristic> 0

+V12 @ 12A 5%
0603

+V4.75 @ 30A

Title
COMe R2.0 Type6 RAW C/D
Size Document Number Rev
SOM-DB5830 A1
Monday, October 22, 2018
Date: Sheet 5 of 34
 5 4 3 2 1

LAN0
RJ-45 (w/ USB3.1 x2)
LAN0
LAN0_USB1A +V3.3_DUAL
USB3.1 / USB2.0 Port 0-1 PWR CAD Note:
RJ45+USBx2_W/XFMR
+V5_DUAL @ 2A (80mils) Place close to USB 3.0 Connector
L3 Reserve for Intel LAN Driver LED Issue
[4,6] LAN1_LINK100# O
R25
+V5_DUAL +V5_USB3.1_Z_01 5%_1/16W R24 330 0402 L4 G NL/4.7K
[4,6] LAN1_LINK1000#
PS1 C2 100nF Q5 5%_1/16W
D +V5_USB3.1_Y_01 B1 30_100MHz 0402 10%_16V R1 NL/2N7002 0402 D
[4] GBE0_CTREF LAN1_ACT# LAN1_Z_LINK#_ACT#
X
0805 3A S 2 3

D
[4,6] LAN1_ACT#
SMD1206P260SLRT [4] LAN1_MDI0+ R2
2.6A R26 C3 C4 C5 0.25A/60V

G
C1
1206 10K 100nF 100nF 680uF +V3.3_DUAL SOT-23

1
1%_1/16W 10%_16V 10%_16V 20%_6.3V R3 75
[4] LAN1_MDI0-
Polyswitch 0402 0402 0402 PC-7.3*4.3*3.8mm C2 Input Output
Ihold= 2.6A USB_z_OC#01 Ripple Current=3.5A R4 U1
Itrip=5A [4] LAN1_MDI1+
C3 A LAN1_LINK100# 1 VCC 5 S A B Y X
[4,6] LAN1_LINK100# LAN1_LINK1000#
B 2
75 [4,6] LAN1_LINK1000# LAN1_ACT#_CTRL
R27 C6 [4] LAN1_MDI1- R5 3 4 Y 0 0 0 0 1
NL/15K 100nF C6 GND

1%_1/16W 10%_16V [4] LAN1_MDI2+ R6 NL/TI_SN74LVC1G32DBV 0/1 0 1 1 0/1

0402 0402 C4 <Characteristic>
75 X: 0/1 1 0 1 0/1
[4] LAN1_MDI2- R7
+V5_DUAL 1 - Disable LAN_ACT LED.
C5
0/1 - LAN_ACT LED can be blink. 0/1 1 1 1 0/1
[4] LAN1_MDI3+ R8
C7

R28 R9 75
[4] LAN1_MDI3-
4.7K C8
5% R10
0402 2kV 1000pF
R29 NL/0 Jumper_1/16W 0402 LAN1_Z_LINK#_ACT# L1
[4] LAN1_LINK#
R30 0 Jumper_1/16W 0402
[4,6] LAN1_ACT# G SHIELD GND
R31 330 5%_1/16W 0402 L2
+V3.3_DUAL
6

Q6
D1

S2
G2

H1
H2
H3
H4
2N7002KDW

A101-3 GND_LAN0
Update Q7 P/N to 1310006408-01
G1

D2
S1

R32 0
1 TP29 0603 Jumper_1/10W
1

TP28_PSM R33 0
0.115A/60V
0603 Jumper_1/10W
USB_OC#01 [4]

GND_LAN0

C USB_z_OC#01 C

R35 0
0603 Jumper_1/10W

GND_LAN0 GND_USB3.1

A101-1 170915
Layout Note 1:
Bead net 可可可可可可可可 Net 可順
Layout Note 2:
Each pair co-layout bead overlap resistor.
After ON Semi. review, ESD should work OK,
but will limit bandwidth due to loss. USB3.1 Gen2 / USB2.0
Layout Note 1: Layout Note 2: Layout Note 1: USB 3.1 SPEC. each port power consumption 900mA max
Bead net 可可可可可可可可 Net 可順 Each pair co-layout bead overlap resistor. ESD可可可可 Net 可順 D1
All the ESD near the USB connector
RN3
3 4 R37 NL/0 TPD4E02B04 LAN0_USB1B
ON Semi. FAE suggest TX pair don't
1 2 0402 Jumper_1/16W 1 USB_Z_SSRX1+
through Common choke, but Intel CRB +V5_USB3.1_Z_01 USB 3.1
U1
through Common choke so reserve. NL/0 5% B2 2*1.2*0.9mm 2 USB_Z_SSRX1- USB0_Z_P- U2 VUSB_1
4P2R0402 1 2 USB0_Z_P+ USB0_Z_P+ U3 D-_1
B3 [4] USB0_P+ D+_1
3 4 USB_Z_SSTX1+ U4
4 3 USB_Z_SSTX0+ 8 GND_1
[8] USB_C_SSTX0+ USB0_Z_P- USB_Z_SSTX1- USB_Z_SSRX0-
[4] USB0_P- 4 3 5 U5
USB_Z_SSRX0+ U6 StdA_SSRX-_1
1 2 USB_Z_SSTX0- 90_100MHz U7 Stda_SSRX+_1
[8] USB_C_SSTX0- GND_DRAIN_1
0.33A 1212001302 USB_Z_SSTX0- U8
0.7×0.55×0.35mm USB_Z_SSTX0+ U9 StdA_SSTX-_1
7.5_200MHz R39 NL/0 StdA_SSTX+_1

10
9
7
6
Follow 571391_CFL_H_PDG_Rev1p0 100mA 0402 Jumper_1/16W H5
RN1 H6 SHIELDGND_5
17.1.5 USB 3.1 General Guidelines SHIELDGND_6
3 4
CMC: CMC is not needed for Rx lanes 1 2 R41 NL/0 RJ45+USBx2_W/XFMR
0402 Jumper_1/16W <Characteristic>
0 5% GND_LAN0
4P2R0402 B5 2*1.2*0.9mm D2
B 1 2 USB1_Z_P+ TPD4E02B04 B
[4] USB1_P+
B61 1 USB_Z_SSRX0+ A101-3 20181003
1 2 USB_Z_SSRX0- Change re-driver USB3.1 port 0/1.
[8] USB_C_SSRX0-
4 3 USB1_Z_P- 2 USB_Z_SSRX0-
[4] USB1_P-
4 3 USB_Z_SSRX0+ 90_100MHz 3 4 USB_Z_SSTX0+
[8] USB_C_SSRX0+
0.33A 1212001302 8
NL/7.5_200MHz100mA 5 USB_Z_SSTX0-
0.7×0.55×0.35mm R43 NL/0 LAN0_USB1C
0402 Jumper_1/16W
+V5_USB3.1_Z_01 U10 USB 3.1
RN4 USB1_Z_P- U11 VUSB_2
Place near the USB connector D-_2
3 4 USB1_Z_P+ U12

10
9
7
6
1 2 A101-2 U13 D+_2
Change USB20 port 0/1 Common Mode Choke from 1212003587-01 to 1212001302. GND_2
NL/0 5% USB_Z_SSRX1- U14
4P2R0402 USB_Z_SSRX1+ U15 StdA_SSRX-_2
B6 Stda_SSRX+_2
U16
4 3 USB_Z_SSTX1+ USB_Z_SSTX1- U17 GND_DRAIN_2
[8] USB_C_SSTX1+ D3 StdA_SSTX-_2
USB_Z_SSTX1+ U18
AZ1143-04F.R7G StdA_SSTX+_2
1 2 USB_Z_SSTX1- 1 USB0_Z_P+ H7
[8] USB_C_SSTX1- SHIELDGND_7
H8
0.7×0.55×0.35mm 2 USB0_Z_P- SHIELDGND_8
Follow 571391_CFL_H_PDG_Rev1p0 7.5_200MHz
17.1.5 USB 3.1 General Guidelines RJ45+USBx2_W/XFMR
100mA 3 4 USB1_Z_P+ <Characteristic>
CMC: CMC is not needed for Rx lanes RN2 8 GND_LAN0
3 4 5 USB1_Z_P-
1 2

0 5%
4P2R0402

10
9
7
6
B62
1 2 USB_Z_SSRX1- 3.3V
[8] USB_C_SSRX1-

4 3 USB_Z_SSRX1+
[8] USB_C_SSRX1+
NL/7.5_200MHz100mA
0.7×0.55×0.35mm

A Place near the USB connector A

A101-2
Reserve Common Mode Choke co-layout for USB3.1 RX Port0/1 signal.

Title
LAN0/USB 3.1 Port 0-1
Size Document Number Rev
SOM-DB5830 A1
Monday, October 22, 2018
Date: Sheet 6 of 34
5 4 3 2 1
 A101-1 170915
After ON Semi. review, ESD should work OK,

USB3.1 x2 but will limit bandwidth due to loss.

Layout Note:
ESD net 可可可可可可可可 Net 可順
USB3.1 Connector Port 2-3
D4 USB3.1_1
USB3.1 / USB2.0 Port 2-3 PWR CAD Note:
TPD4E02B04
Place close to USB 3.0 Connector +V5_USB3.1_Z_23
+V5_DUAL @ 2A (80mils) 1 USB_Z_SSRX2+ 1
VBUS_1
USB2_Z_P- 2
+V5_DUAL +V5_USB3.1_Z_23 2 USB_Z_SSRX2- USB2_Z_P+ 3 D-_1 18 14
PS2 4 D+_1
10 13
+V5_USB3.1_Y_23 B8 30_100MHz 3 4 USB_Z_SSTX2+ GND_1
0805 3A 8 USB_Z_SSRX2- 5
SMD1206P260SLRT 5 USB_Z_SSTX2- USB_Z_SSRX2+ 6 StdA_SSRX-_1
2.6A R48 C11 C12 C13 7 StdA_SSRX+_1 9 5
1206 10K 100nF 100nF 680uF USB_Z_SSTX2- 8 GND_DRAIN_1
1 4
1%_1/16W 10%_16V 10%_16V 20%_6.3V USB_Z_SSTX2+ 9 StdA_SSTX-_1
Polyswitch 0402 0402 0402 PC-7.3*4.3*3.8mm StdA_SSTX+_1
Ihold= 2.6A USB_z_OC#23 Ripple Current=3.5A
+V5_USB3.1_Z_23 10
USB A TYPE

10
9
7
6
Itrip=5A USB3_Z_P- 11 VBUS_2
D-_2 USB 3.1
USB3_Z_P+ 12
R49 C14 13 D+_2
NL/15K 100nF GND_2
1%_1/16W 10%_16V Near the USB connector USB_Z_SSRX3- 14 H1
0402 0402 USB_Z_SSRX3+ 15 StdA_SSRX-_2 PTH_1 H2
16 StdA_SSRX+_2 PTH_2 H3
D5 USB_Z_SSTX3- 17 GND_DRAIN_2 PTH_3 H4
+V5_DUAL TPD4E02B04 USB_Z_SSTX3+ 18 StdA_SSTX-_2 PTH_4
1 USB_Z_SSRX3+ StdA_SSTX+_2
USB3.1x2_9H
2 USB_Z_SSRX3- A101-3 20181003 <Characteristic>
R50 Change re-driver USB3.1 port 2/3.
4.7K 3 4 USB_Z_SSTX3+ GND_USB3.1
USB 3.1 SPEC. each port power consumption 900mA max
5% 8
0402 5 USB_Z_SSTX3-
6

R52 0
Q7 0603 Jumper_1/10W
D1

S2
G2

10
9
7
6
2N7002KDW
A101-3
Update Q7 P/N to 1310006408-01 GND_USB2.0 GND_USB3.1
Near the USB connector
G1

D2
S1

1 TP30 D6
1

TP28_PSM AZ1143-04F.R7G R565 0

0.115A/60V USB2_Z_P+
1 0603 Jumper_1/10W
USB_OC#23 [4]
R566 0
2 USB2_Z_P- 0603 Jumper_1/10W

3 4 USB3_Z_P+
USB_z_OC#23 8 GND_USB3.1
5 USB3_Z_P-

10
9
7
6
3.3V

Near the USB connector

Layout Note:
Bead net 可可可可可可可可 Net 可順
Layout Note:
Each pair of bead and resister co-layout
Layout Note 1: Layout Note 2:
Bead net 可可可可可可可可 Net 可順 Each pair co-layout bead overlap resistor.
RN7
ON Semi. FAE suggest TX pair don't 3 4 R54 NL/0
through Common choke, but Intel CRB 1 2 0402 Jumper_1/16W
through Common choke so reserve.
NL/0 5% B10 2*1.2*0.9mm
4P2R0402 1 2 USB2_Z_P+
B9 [4] USB2_P+
4 3 USB_Z_SSTX2+
[9] USB_C_SSTX2+ USB2_Z_P-
4 3
[4] USB2_P-
1 2 USB_Z_SSTX2- 90_100MHz
[9] USB_C_SSTX2-
0.33A 1212001302
7.5_200MHz 0.7×0.55×0.35mm R56 NL/0
100mA 0402 Jumper_1/16W

Follow 571391_CFL_H_PDG_Rev1p0 RN5

17.1.5 USB 3.1 General Guidelines 3 4 R59 NL/0
CMC: CMC is not needed for Rx lanes 1 2 0402 Jumper_1/16W

0 5% B12 2*1.2*0.9mm
4P2R0402 1 2 USB3_Z_P+
[4] USB3_P+
B63
1 2 USB_Z_SSRX2- 4 3 USB3_Z_P-
[9] USB_C_SSRX2- [4] USB3_P-
90_100MHz
4 3 USB_Z_SSRX2+ 0.33A 1212001302
[9] USB_C_SSRX2+
NL/7.5_200MHz 100mA R61 NL/0
0.7×0.55×0.35mm 0402 Jumper_1/16W

ON Semi. FAE suggest TX pair don't RN8 Place near the USB connector
through Common choke, but Intel CRB 3 4
through Common choke so reserve. 1 2
A101-2
NL/0 5% Change USB20 port 2/3 Common Mode Choke from 1212003587-01 to 1212001302.
4P2R0402
B13
4 3 USB_Z_SSTX3+
[9] USB_C_SSTX3+

1 2 USB_Z_SSTX3-
[9] USB_C_SSTX3-
Follow 571391_CFL_H_PDG_Rev1p0 0.7×0.55×0.35mm
7.5_200MHz
17.1.5 USB 3.1 General Guidelines
100mA
CMC: CMC is not needed for Rx lanes
RN6
3 4
1 2

0 5%
4P2R0402

B64
1 2 USB_Z_SSRX3-
[9] USB_C_SSRX3-

4 3 USB_Z_SSRX3+
[9] USB_C_SSRX3+
NL/7.5_200MHz 100mA
0.7×0.55×0.35mm

Title
A101-2 USB3.1 Port 2-3
Reserve Common Mode Choke co-layout for USB3.1 RX Port2/3 signal.
Size Document Number Rev
SOM-DB5830 A1
Monday, October 22, 2018
Date: Sheet 7 of 34
 +V3.3_U3RDV1 @ 130mA (10.4mils)

+V3.3_DUAL
B16 120_100MHz
+V3.3_U3RDV1
USB3.1 Gen2 Redriver for RJ45 + USB3.1 x2 Port 0-1
0603 2A
C19 C20 C21 C22
1uF 1uF 1uF 1uF
10%_6.3V 10%_6.3V 10%_6.3V 10%_6.3V
0402 0402 0402 0402

GND GND GND GND

close to pin 30 close to pin 13

close to pin 5 close to pin 22
+V3.3_U3RDV1
USB3.1_RDV1_CTRL_A0
USB3.1_RDV1_CTRL_A1

A101-3 20181003
GND Change re-driver USB3.1 port 0/1.

35
34
33
32
31
30
29
U2
A101-1 20170915

GND2
NC3
GND1
CTRL_A1
CTRL_A0
VCC3
NC2
After ON Semi. review result, Change from 220nF to 330nF.

C24 100nF 10%_16V 0402 USB_RE_IN_SSTX1- 1 28 USB_RE_OUT_SSTX1- C9 100nF 10%_16V 0402

From PCH [5] USB_SSTX1-
C26 100nF 10%_16V 0402 USB_RE_IN_SSTX1+ 2 A_RX- A_TX- 27 USB_RE_OUT_SSTX1+ C10 100nF 10%_16V 0402
USB_C_SSTX1- [6] To PCH
[5] USB_SSTX1+ USB_RE_OUT_SSRX1- A_RX+ A_TX+ USB_RE_IN_SSRX1- USB_C_SSTX1+ [6]
[5] USB_SSRX1- C36 100nF 10%_16V 0402 3 26 C33 330nF 10%_10V 0402 USB_C_SSRX1- [6]
C38 100nF 10%_16V 0402 USB_RE_OUT_SSRX1+ 4 B_TX- B_RX- 25 USB_RE_IN_SSRX1+ C35 330nF 10%_10V 0402
To PCH [5] USB_SSRX1+
5 B_TX+ B_RX+ 24 USB3.1_RDV1_CTRL_B1 USB_C_SSRX1+ [6] From Device
+V3.3_U3RDV1 USB3.1_RDV1_CTRL_C0 6 VCC0 CTRL_B1 23 USB3.1_RDV1_CTRL_B0
USB3.1_RDV1_CTRL_C1 7 CTRL_C0 CTRL_B0 22 R98 R99
C23 100nF 10%_16V 0402 USB_RE_IN_SSTX0- 8 CTRL_C1 VCC2 21 +V3.3_U3RDV1 200K 200K
From PCH [5] USB_SSTX0-
C25 100nF 10%_16V 0402 USB_RE_IN_SSTX0+ 9 C_RX- C_TX- 20 1%_1/16W 1%_1/16W
[5] USB_SSTX0+ USB_RE_OUT_SSRX0- C_RX+ C_TX+
[5] USB_SSRX0- C37 100nF 10%_16V 0402 10 19 0402 0402
C31 100nF 10%_16V 0402 USB_RE_OUT_SSRX0+ 11 D_TX- D_RX- 18
To PCH

CTRL_D0
CTRL_D1
[5] USB_SSRX0+ D_TX+ D_RX+

GND0
VCC1
GND GND

NC0

NC1
USB_RE_OUT_SSTX0- C7 100nF 10%_16V 0402
To PCH
USB_RE_OUT_SSTX0+ USB_C_SSTX0- [6]
ON_NB7NPQ7041MMUTXG C8 100nF 10%_16V 0402
USB_C_SSTX0+ [6]

12
13
14
15
16
17
X2QFN34 USB_RE_IN_SSRX0- C32 330nF 10%_10V 0402
USB_RE_IN_SSRX0+ USB_C_SSRX0- [6]
C34 330nF 10%_10V 0402
HW Strap table for equalization and flat gain +V3.3_U3RDV1 USB_C_SSRX0+ [6]
From Device
USB3.1_RDV1_CTRL_D0
DC Input Setting "L" Input pin connected to GND USB3.1_RDV1_CTRL_D1 A101-1 20170915 R100 R101
After ON Semi. review result, Change from 220nF to 330nF. 200K 200K
DC Input Setting "R" A "68k ohm" must be applied 1%_1/16W 1%_1/16W
between pin and GND GND 0402 0402

DC Input Setting "F" Input pin is left floating GND GND

DC Input Setting "H" Input pin connected to VCC
ON_NB7NPQ7041MMUTXG CAD Note:
Internal pull-up 100k ohm and pull-down 200k ohm.

Layout note:
+V3.3_U3RDV1 Resistors place together
May 3 PADs sharing
R74 R75 R76 R77
NL/0 0 NL/0 0
Jumper_1/16W Jumper_1/16W Jumper_1/16W Jumper_1/16W
0402 0402 0402 0402
USB3.1_RDV1_CTRL_A0
USB3.1_RDV1_CTRL_A1
USB3.1_RDV1_CTRL_B0
USB3.1_RDV1_CTRL_B1

R78 R79 R80 R81

0 NL/68K 0 NL/68K
Jumper_1/16W 1%_1/16W Jumper_1/16W 1%_1/16W
0402 0402 0402 0402

GND GND GND GND

+V3.3_U3RDV1

R82 R83 R84 R85

NL/0 0 NL/0 0
Jumper_1/16W Jumper_1/16W Jumper_1/16W Jumper_1/16W
0402 0402 0402 0402
USB3.1_RDV1_CTRL_C0
USB3.1_RDV1_CTRL_C1
USB3.1_RDV1_CTRL_D0
USB3.1_RDV1_CTRL_D1

R86 R87 R66 R67

0 NL/1K 0 NL/1K
CHA
Jumper_1/16W 1%_1/16W Jumper_1/16W 1%_1/16W
CHB
0402 0402 0402 0402
CHC
CHD
GND GND GND GND

Title
USB3.1 Redriver Port 0-1
Size Document Number Rev
SOM-DB5830 A1
Monday, October 22, 2018
Date: Sheet 8 of 34
 +V3.3_U3RDV2 @ 130mA (10.4mils)
+V3.3_DUAL
B60 120_100MHz
+V3.3_U3RDV2
USB3.1 Gen2 Redriver for USB3.1 x2 Port 2-3
0603 2A
C286 C287 C289 C288
1uF 1uF 1uF 1uF
10%_6.3V 10%_6.3V 10%_6.3V 10%_6.3V
0402 0402 0402 0402

GND GND GND GND

close to pin 30 close to pin 13

close to pin 5 close to pin 22
+V3.3_U3RDV2
USB3.1_RDV2_CTRL_A0
USB3.1_RDV2_CTRL_A1

A101-3 20181003
Change re-driver USB3.1 port 2/3.
GND

35
34
33
32
31
30
29
U3
A101-1 20170915

GND2
NC3
GND1
CTRL_A1
CTRL_A0
VCC3
NC2
After ON Semi. review result, Change from 220nF to 330nF.

C290 100nF 10%_16V 0402 USB_RE_IN_SSTX3- 1 28 USB_RE_OUT_SSTX3- C292 100nF 10%_16V 0402
From PCH [5] USB_SSTX3-
C291 100nF 10%_16V 0402 USB_RE_IN_SSTX3+ 2 A_RX- A_TX- 27 USB_RE_OUT_SSTX3+ C293 100nF 10%_16V 0402
USB_C_SSTX3- [7] To PCH
[5] USB_SSTX3+ A_RX+ A_TX+ USB_C_SSTX3+ [7]
C294 100nF 10%_16V 0402 USB_RE_OUT_SSRX3- 3 26 USB_RE_IN_SSRX3- C295 330nF 10%_10V 0402
[5] USB_SSRX3- B_TX- B_RX- USB_C_SSRX3- [7]
C278 100nF 10%_16V 0402 USB_RE_OUT_SSRX3+ 4 25 USB_RE_IN_SSRX3+ C296 330nF 10%_10V 0402
To PCH [5] USB_SSRX3+
5 B_TX+ B_RX+ 24 USB3.1_RDV2_CTRL_B1 USB_C_SSRX3+ [7] From Device
+V3.3_U3RDV2 USB3.1_RDV2_CTRL_C0 6 VCC0 CTRL_B1 23 USB3.1_RDV2_CTRL_B0
USB3.1_RDV2_CTRL_C1 7 CTRL_C0 CTRL_B0 22 R587 R588
C279 100nF 10%_16V 0402 USB_RE_IN_SSTX2- 8 CTRL_C1 VCC2 21 +V3.3_U3RDV2 200K 200K
From PCH [5] USB_SSTX2-
C280 100nF 10%_16V 0402 USB_RE_IN_SSTX2+ 9 C_RX- C_TX- 20 1%_1/16W 1%_1/16W
[5] USB_SSTX2+ USB_RE_OUT_SSRX2- C_RX+ C_TX+
[5] USB_SSRX2- C283 100nF 10%_16V 0402 10 19 0402 0402
C284 100nF 10%_16V 0402 USB_RE_OUT_SSRX2+ 11 D_TX- D_RX- 18
To PCH

CTRL_D0
CTRL_D1
[5] USB_SSRX2+ D_TX+ D_RX+

GND0
VCC1
GND GND

NC0

NC1
USB_RE_OUT_SSTX2- C282 100nF 10%_16V 0402
To PCH
USB_RE_OUT_SSTX2+ USB_C_SSTX2- [7]
ON_NB7NPQ7041MMUTXG C281 100nF 10%_16V 0402
USB_C_SSTX2+ [7]

12
13
14
15
16
17
X2QFN34 USB_RE_IN_SSRX2- C285 330nF 10%_10V 0402 USB_C_SSRX2- [7]
USB_RE_IN_SSRX2+ C277 330nF 10%_10V 0402
HW Strap table for equalization and flat gain +V3.3_U3RDV2 USB_C_SSRX2+ [7]
From Device
USB3.1_RDV2_CTRL_D0
DC Input Setting "L" Input pin connected to GND USB3.1_RDV2_CTRL_D1 A101-1 20170915 R571 R581
After ON Semi. review result, Change from 220nF to 330nF. 200K 200K
DC Input Setting "R" A "68k ohm" must be applied 1%_1/16W 1%_1/16W
between pin and GND GND 0402 0402

DC Input Setting "F" Input pin is left floating GND GND

DC Input Setting "H" Input pin connected to VCC
ON_NB7NPQ7041MMUTXG CAD Note:
Internal pull-up 100k ohm and pull-down 200k ohm.

Layout note:
+V3.3_U3RDV2 Resistors place together
May 3 PADs sharing
R572 R582 R583 R584
NL/0 NL/0 NL/0 NL/0
Jumper_1/16W Jumper_1/16W Jumper_1/16W Jumper_1/16W
0402 0402 0402 0402
USB3.1_RDV2_CTRL_A0
USB3.1_RDV2_CTRL_A1
USB3.1_RDV2_CTRL_B0
USB3.1_RDV2_CTRL_B1

R573 R574 R575 R576

0 0 0 0
Jumper_1/16W Jumper_1/16W Jumper_1/16W Jumper_1/16W
0402 0402 0402 0402

GND GND GND GND

A101-2
Change HW Strap setting of equalization and flat gain for USB3.1 GEN2 TX.

+V3.3_U3RDV2

R570 R569 R586 R585

NL/0 NL/0 NL/0 NL/0
Jumper_1/16W Jumper_1/16W Jumper_1/16W Jumper_1/16W
0402 0402 0402 0402
USB3.1_RDV2_CTRL_C0
USB3.1_RDV2_CTRL_C1
USB3.1_RDV2_CTRL_D0
USB3.1_RDV2_CTRL_D1

R578 R577 R579 R580

0 0 0 0
Jumper_1/16W Jumper_1/16W Jumper_1/16W Jumper_1/16W
0402 0402 0402 0402

GND GND GND GND

CHA
CHB
CHC
CHD

Title
USB3.1 Redriver Port 2-3
Size Document Number Rev
SOM-DB5830 A1
Monday, October 22, 2018
Date: Sheet 9 of 34
USB2.0 Port 4-5 PWR A101-2
Change USB20 port 4~7 Common Mode Choke from 1212003587-01 to 1212001302.
Layout Note:
ESD net 可可可可可可可可 Net 可順
USB2.0 Port 4-7 A101-2
CAD Note: Layout Note 1: Layout Note 2: Change USB20 CONN USB2.0_1 from 1654012279-01 to 1654009643.
USB2.0 Port 4-5 PWR Place close to USB 3.0 Connector Bead net 可可可可可可可可 Net 可順 Each pair co-layout bead overlap resistor. D7
+V5_DUAL @ 1A (40mils) AZ1143-04F.R7G USB2.0_1
R170 NL/0
+V5_DUAL +V5_USB2.0_Z_45 0402 Jumper_1/16W 1 USB4_Z_P+ +V5_USB2.0_Z_45 A1
PS3 USB4_Z_P- A2 VCC_USB0
+V5_USB2.0_Y_45 B23 30_100MHz B24 2*1.2*0.9mm 2 USB4_Z_P- USB4_Z_P+ A3 USB-0_B
0805 3A 1 2 USB4_Z_P- A4 USB+0_B
[4] USB4_P- USB5_Z_P+ GND_1
SMD1206P150TFT 3 4
1.5A R171 C59 C60 C61 8 +V5_USB2.0_Z_45 B1
1206 10K 100nF 100nF 680uF 4 3 USB4_Z_P+ 5 USB5_Z_P- USB5_Z_P- B2 VCC_USB1
[4] USB4_P+ USB5_Z_P+ USB-1_B
1%_1/16W 10%_16V 10%_16V 20%_6.3V B3
Polyswitch 0402 0402 0402 PC-7.3*4.3*3.8mm 90_100MHz B4 USB+1_B
Ihold= 1.5A USB_z_OC#45 0.33A 1212001302 GND_2
Itrip=3A
Ripple Current=3.5A +V5_USB2.0_Z_67 C1
R172 NL/0 USB6_Z_P- C2 VCC_USB2

10
9
7
6
R173 C62 0402 Jumper_1/16W USB6_Z_P+ C3 USB-2_B
NL/15K 100nF 3.3V C4 USB+2_B
1%_1/16W 10%_16V GND_3
0402 0402 R174 NL/0 Near the USB connector +V5_USB2.0_Z_67 D1
0402 Jumper_1/16W USB7_Z_P- D2 VCC_USB3
USB7_Z_P+ D3 USB-3_B
+V5_DUAL B25 2*1.2*0.9mm D4 USB+3_B
1 2 USB5_Z_P- H1 GND_4
[4] USB5_P- PTH_1
H2
H3 PTH_2
R175 4 3 USB5_Z_P+ H4 PTH_3
[4] USB5_P+ PTH_4
4.7K H5
5% 90_100MHz H6 PTH_5
0402 0.33A 1212001302 PTH_6
USBx4_16H
R176 NL/0 <Characteristic>
0402 Jumper_1/16W 1654009643
6

Q8 A101-3 Place near the USB connector GND_USB2.0

D1

S2
G2

2N7002KDW Update Q8 P/N to 1310006408-01

R177 0
0603 Jumper_1/10W
G1

D2
S1

1 TP31
1

TP28_PSM
0.115A/60V
USB_OC#45 [4]
GND_USB2.0 GND_DP

USB_z_OC#45
R564 0
0603 Jumper_1/10W
R178 0
0603 Jumper_1/10W

USB2.0 Port 6-7 PWR

GND_USB2.0

Layout Note:
ESD net 可可可可可可可可 Net 可順

USB2.0 Port 6-7 PWR CAD Note: Layout Note 1: Layout Note 2:
Place close to USB 3.0 Connector Bead net 可可可可可可可可 Net 可順 Each pair co-layout bead overlap resistor. D8
+V5_DUAL @ 1A (40mils) AZ1143-04F.R7G
R180 NL/0
+V5_DUAL +V5_USB2.0_Z_67 0402 Jumper_1/16W 1 USB6_Z_P+
PS4
+V5_USB2.0_Y_67 B26 30_100MHz B27 2*1.2*0.9mm 2 USB6_Z_P-
0805 3A 1 2 USB6_Z_P-
[4] USB6_P- USB7_Z_P+
SMD1206P150TFT 3 4
1.5A R181 C63 C64 C65 8
1206 10K 100nF 100nF 680uF 4 3 USB6_Z_P+ 5 USB7_Z_P-
[4] USB6_P+
1%_1/16W 10%_16V 10%_16V 20%_6.3V
Polyswitch 0402 0402 0402 PC-7.3*4.3*3.8mm 90_100MHz
Ihold= 1.5A USB_z_OC#67 Ripple Current=3.5A 0.33A 1212001302
Itrip=3A
R183 NL/0

10
9
7
6
R182 C66 0402 Jumper_1/16W
NL/15K 100nF 3.3V
1%_1/16W 10%_16V
0402 0402 R184 NL/0 Near the USB connector
0402 Jumper_1/16W

+V5_DUAL B28 2*1.2*0.9mm

1 2 USB7_Z_P-
[4] USB7_P-

R185 4 3 USB7_Z_P+
[4] USB7_P+
4.7K
5% 90_100MHz
0402 0.33A 1212001302

R186 NL/0
0402 Jumper_1/16W
6

Q9 Place near the USB connector

D1

S2
G2

2N7002KDW
A101-3
Update Q9 P/N to 1310006408-01
G1

D2
S1

1 TP32
1

TP28_PSM
0.115A/60V
USB_OC#67 [4]

USB_z_OC#67

Title
USB2.0 Port 4-7
Size Document Number Rev
SOM-DB5830 A1
Monday, October 22, 2018
Date: Sheet 10 of 34
 5 4 3 2 1

+V3.3M_SPI @ 100mA
SPI BIOS SPI +V3.3M_SPI_J With COM.0 Rev 3, the SPI interface maybe either 3.3V
or 1.8V, as is best for the Module chipset at hand.
RTC BATTERY
SPI_BIOS1
Q_SPI_CB_CS# 1 8 R188 10K
Q_SPI_CB_MISO 2 CE VDD 7 Q_SPI_CB_HOLD# 0402 1%_1/16W
D R189 10K Q_SPI_CB_WP 3 SO HOLD 6 Q_SPI_CB_CLK SOM-DB5920 Add carrier board SPI BIOS power isolation circuit D
+V3.3M_SPI_J 0402 1%_1/16W 4 WP SCK 5 Q_SPI_CB_MOSI
VSS SI
IC SKT_8
IC SKT8P
<Characteristic>
+V3.3M_SPI_J
+V5_DUAL
R190 4.7K SPI_CB_G J2(2-3)
+V5_DUAL

3
0402 5%_1/16W Q11 D
NL/NX7002AK Q10

1
0.3A/60V R191 10K 1 FDN335N MINIJUMPER_2_2.54mm
SOT-23 0402 1%_1/16W G S 1.7A/20V <Characteristic>

2
SOT-23

G
Q_SPI_CB_CS# R192 0 SPI_CB_CS# 3 2 VGS(th)==>1.5V
SPI_CS# [4] +V3.3M_SPI
0402 Jumper_1/16W J2

S
PH_3x1V_2.54mm
Q_SPI_PH_CS# R557
0402
0
Jumper_1/16W R193
0402
0
Jumper_1/16W
1-2 Clear CMOS
+VBAT_C @ 0.5A (20mils)
2-3 Normal Operation

1
2
3
CAD Note:
Co-layout Q12 R194 1K
A101-2 NL/NX7002AK <Characteristic> 0603 1%_1/10W

+VBAT_BH
1
Update schematic for two SPI BIOS ROM support. 0.3A/60V
SOT-23 20151016
C +V3.3M_SPI_J CUZ: Change Module Diode from diode to 0ohm. C
Q_SPI_CB_CLK SPI_CB_CLK G SO: Add Jumper for power cut.
R195 0 3 2 BAT1
SPI_CLK [4] +VBAT

1
0402 Jumper_1/16W +
D

S
SPI_CN1 J3(1-2) BH1
Q_SPI_PH_CLK R558 0 1 2 +V3.3M_SPI Li Battery BR2032HOLDER
0402 Jumper_1/16W R196 33 Q_SPI_PH_CS# 3 4 Q_SPI_PH_CLK 3V

2
0402 1%_1/16W Q_SPI_PH_MISO 5 6 Q_SPI_PH_MOSI 2 MINIJUMPER_2_2.54mm BR2032
S
CAD Note: CAD Note: 8 1 <Characteristic> 1 Q13
[5,28] RAPID_SHUTDOWN

2
Q_SPI_CB_* resistor close to SPI_BIOS1 Co-layout Q14 G FDN352AP BR2032
Q_SPI_PH_* resistor close to SPI_CN1 NL/NX7002AK PH_4x2V_S2.54mm J3 -1.3A/-30V 3V_195mAH
1

D
0.3A/60V PH_2x1V_2.54mm SOT-23
SOT-23 <Characteristic>

3
G

Q_SPI_CB_MOSI R197 0 SPI_CB_MOSI 3 2

SPI_MOSI [4] +V3.3M_SPI_J
0402 Jumper_1/16W
D

A101-2
Q_SPI_PH_MOSI R559 0 R198 33
0402 Jumper_1/16W CAD Note: 0402 1%_1/16W Add J3(1-2) jumper for two SPI BIOS ROM support.
Co-layout +VBAT_C
Q15
NL/NX7002AK
1

0.3A/60V
SOT-23
G

B B
Q_SPI_CB_MISO R199 0 SPI_CB_MISO 3 2
SPI_MISO [4]
0402 Jumper_1/16W
D

Q_SPI_PH_MISO R560 0
0402 Jumper_1/16W R200 33
0402 1%_1/16W
CAD Note:
Co-layout

P/N: 1654005955

SATA
PIN length 3.3mm

P/N: 1654013393-01
PIN length 2.1mm A101-2
Change SATA1~SATA4 from 1654005955 to 1654013393-01 for DFM request.

SATA1 SATA2 SATA3 SATA4

9

9
SATA_7V SATA_7V SATA_7V SATA_7V
1654013393-01 1654013393-01 1654013393-01 1654013393-01
1 1 1 1
A
2 GND 2 GND 2 GND 2 GND A
[4] SATA0_TX+
3 TX+ [4] SATA1_TX+
3 TX+ [4] SATA2_TX+ 3 TX+ [4] SATA3_TX+ 3 TX+
[4] SATA0_TX- TX- [4] SATA1_TX- TX- [4] SATA2_TX- TX- [4] SATA3_TX- TX-
4 4 4 4
5 GND 5 GND 5 GND 5 GND
[4] SATA0_RX-
6 RX- [4] SATA1_RX-
6 RX- [4] SATA2_RX- 6 RX- [4] SATA3_RX- 6 RX-
[4] SATA0_RX+
7
RX+ [4] SATA1_RX+
7
RX+ [4] SATA2_RX+
7
RX+ [4] SATA3_RX+
7
RX+ Title
GND GND GND GND BIOS socket/SATA/RTC
8

8
Size Document Number Rev
SOM-DB5830 A1
Monday, October 22, 2018
Date: Sheet 11 of 34
5 4 3 2 1
 5 4 3 2 1

HD Audio Codec REALTEK ALC888S-VD2-GR

TP33
TP28_PSM GND_AUD

+V3.3 @ total = 20.47mA Pin29輸輸5V

1
SPDIF_OUT

DVDD=19.8mA in25/38勿勿輸輸5V
R201
D DVDDIO=0.67mA 20K
1%
+V4.5_LDO_OUT in29可為為LDO input D

in25/38可為為LDO output

SPDIF_IN
0402

JDREF
Place close to IC pin 1
C67 C68
+V3.3 +V3.3_HDA 100nF 10uF
10%_16V 10%_25V
B29 120_100MHz 19.8mA U6 0402 0805

48
47
46
45
44
43
42
41
40
39
38
37
0603 2A LQFP48
Note: C69 C70 Close to IC pin 38

SIDE-L

AVSS2

SURR-L
LDO-OUT2
SPDIF-IN/EAPD
SIDE-R

CENTER

SURR-R
SPDIF-OUT

JDREF

PIN37-VREFO
LFE
Pin9-需需需Chipset HDA的的的的的的 10uF 100nF
10%_25V 16V
0805 0402
GND_AUD +V5_LDO_IN @ 112.08mA
Place close to IC pin 6
HDA_BITCLK
+V4.5_LDO_OUT @ 125mA
1
TP34 1 SPDIF-OUT2 2 DVDD 36 FRONT-OUT-R
TP28_PSM C72 10uF REGREF 3 GPIO0/DMIC-CLK/SPDIF-OUT2 FRONT-R 35 FRONT-OUT-L
C71 0805 10%_25V 4 REGREF FRONT-L 34 SENSEB 1 TP35
22pF 5 GPIO1/DMIC-DATA SENSEB 33 TP28_PSM
[4] HDA_SDOUT SDATA-OUT SENSEC
5%_50V 6 32 MIC1-VREFO-R
[4] HDA_BITCLK BITCLK PORT-B-VREFO-R
0402 R place close to IC pin 8 7 31
R202 33 HDA_a_SDIN0 8 DVSS REALTEK_ALC888S-VD2-GR PORT-E-VREFO 30
[4] HDA_SDIN0 SDATA-IN PORT-F-VREFO
0402 1% 0.67mA 9 29 112.08mA
+V3.3_HDA 10 DVDD-IO LDO-IN 28 +V5_LDO_IN MIC1-VREFO-L
[4] HDA_SYNC SYNC PORT-B-VREFO-L
11 27 VREF C73 10uF
[4] HDA_RST# RESET VREF
12 26 0402 20%_6.3V
BEEP AVSS1 GND_AUD
25 125mA
[4,21] SPKR
R203
0402
NL/4.7K
1%_1/16W
PCBEEP_IN C74
0402
NL/1uF PCBEEP
10%_10V
LDO-OUT1 +V4.5_LDO_OUT +V5_DUAL @ 237mA
+V5_LDO_IN +V5_DUAL

SENSEA

CD-GND
LINE2-R

LINE1-R
R204 C75

LINE2-L

LINE1-L
MIC2-R

MIC1-R
MIC2-L

MIC1-L
NL/4.7K NL/100pF

CD-R
CD-L
1%_1/16W 5%_50V
0402 0402 B30 33_100MHz
C76 C77 0603 3A

13
14
15
16
17
18
19
20
21
22
23
24
100nF 10uF C78 C79 C80 C81
C SOM-DB5800 unmount 10%_16V 10%_25V 10uF 1uF 100nF 100nF C
0402 0805 10%_25V 10%_6.3V 10%_16V 10%_16V
0805 0402 0402 0402
Place close to IC pin 9 Close to IC pin 25
+V3.3_HDA Close to IC pin 29
GND_AUD GND_AUD

C82 C83
10uF 100nF
10%_25V 16V LINE1-R
SENSEA

0805 0402 LINE1-L

MIC1-R
MIC1-L

R205 5.1K FRONT-JD

0402 1%
R206 10K LINE1-JD
0402 1%
R207 20K MIC1-JD
0402 1%
Close to IC pin 13

LINE1-L C84 4.7uF 10%_25V 0603 LINE1L_C R208 75 1% 0402 LINE1L_R B31 120_100MHz LINE1L
0603 2A
LINE1-R C85 4.7uF 10%_25V 0603 LINE1R_C R209 75 1% 0402 LINE1R_R B32 120_100MHz LINE1R
0603 2A

FRONT-OUT-L C86 100uF 20%_6.3V 1206 LINEOL_C R210 75 1% 0402 LINEOL_R B33 120_100MHz LINEOL
B B
0603 2A
FRONT-OUT-R C87 100uF 20%_6.3V 1206 LINEOR_C R211 75 1% 0402 LINEOR_R B34 120_100MHz LINEOR
0603 2A

MIC1-L C88 4.7uF 10%_25V 0603 MIC1L_C R212 75 1% 0402 MIC1L_R B35 120_100MHz MIC1L
0603 2A
MIC1-R C89 4.7uF 10%_25V 0603 MIC1R_C R213 75 1% 0402 MIC1R_R B36 120_100MHz MIC1R
0603 2A

A101-2 C90 C91 C92 C93 C94 C95

Change C84/C85/C88/C89 from X7R 4.7uF 10% 10V SMD 0805 100pF 100pF 100pF 100pF 100pF 100pF
to X5R 4.7uF 10% 25V SMD 0603 for capacitance shortage issue. R214 R215 R216 R217 R218 R219 50V 50V 50V 50V 50V 50V
2.2K 2.2K 22K 22K 22K 22K 0402 0402 0402 0402 0402 0402
5% 5% 5% 5% 5% 5%
MIC1-VREFO-R 0402 0402 0402 0402 0402 0402
MIC1-VREFO-L

GND_AUD GND_F2

TP44
2 1
H4
H3
H2
H1

21 H5 AUDIO1 GND_F2 Plastic Optical Fiber Transmit Connector

TP-S20X2-SHORT LINE1L 32
LINE1-JD 33 CN3
TP45 34 Blue 1 GND LED
2
21
1

TP-S20X2-SHORT
LINE1R

LINEOL
35

22
AUDIO Jack +V5 SPDIF_OUT
2 VCC
3 VIN
Drive IC
NPTH
S/PDIF
FRONT-JD 23 C96 FIBER_3H
H3
H2
H1

24 Lime 100nF <Characteristic>

A LINEOR 25 16V A
0402
GND_F2 GND_LAN0 MIC1L 2
MIC1-JD 3
4 Pink
R553 0 MIC1R 5
0603 Jumper_1/10W 1
R554 0
0603 Jumper_1/10W JACK_1x3
<Characteristic>

GND_AUD Title
GND_AUD HD Audio Codec ALC888
Size Document Number Rev
SOM-DB5830 A1
Monday, October 22, 2018
Date: Sheet 12 of 34
5 4 3 2 1
 5 4 3 2 1

PCI-E X4 _Slot1 PCIEX4_1_PRSNT1# R220

0402
0
Jumper_1/16W +V12 CAD Note:
+V12 PCIE-4X1_1 +V12 Place near slot and each PWR pin.
PCIEXPRESS_64V
B1 A1
B2 12V_1 PRSNT1# A2 C97 C98 C99
B3 12V_2 12V_3 A3 R223 4.7K 270uF 100nF 100nF
B4 RSVD 12V_4 A4 0402 5%_1/16W 20%_16V 10%_16V 10%_16V
B5 GND_1 GND_21 A5 PCIEX4_1_JTAG2 0402 0402
[4,13,14,15,21] SMB_CLK SMCLK JTAG2 PCIEX4_1_JTAG3
B6 A6 R221 4.7K
[4,13,14,15,21] SMB_DAT B7 SMDAT JTAG3 A7 0402 5%_1/16W +V3.3
D
B8 GND_2 JTAG4 A8 PCIEX4_1_JTAG5 R224 4.7K D
+V3.3 R222 4.7K PCIEX4_1_JTAG1 B9 3p3V_1 JTAG5 A9 0402 5%_1/16W
0402 5%_1/16W B10 JTAG1 3p3V_2 A10 +V3.3
+V3.3_DUAL B11 3p3VAUX 3p3V_3 A11 +V3.3
[4,13,14] PCIE_WAKE# WAKE# PWRGD PLTRST# [4,13,14,23,24,25]
KEY
B12 A12
B13 RSVD_1 GND_20 A13 C100 C101 C102 C103
GND_3 REFCLK+ CLK_PCIEX4_1+ [15]
[4] PCIE1X0_TX+ B14 A14 CLK_PCIEX4_1- [15] 560uF 100nF 100nF 100nF
B15 HSOP0 REFCLK- A15 20%_6.3V 10%_16V 10%_16V 10%_16V
[4] PCIE1X0_TX- HSON0 GND_19
B16 A16 PCIE1X0_RX+ [4] 0402 0402 0402
R225 10K PCIEX4_1_PRSNT B17 GND_4 HSIP0 A17
+V3.3 0402 1%_1/16W B18 PRSNT2_1# HSIN0 A18
PCIE1X0_RX- [4]
GND_5 GND_18

B19 A19 +V3.3_DUAL

[4] PCIE1X1_TX+ HSOP1 RSVD_4
[4] PCIE1X1_TX- B20 A20
B21 HSON1 GND_17 A21
GND_6 HSIP1 PCIE1X1_RX+ [4]
B22 A22
GND_7 HSIN1 PCIE1X1_RX- [4]
[4] PCIE1X2_TX+ B23 A23 C104
B24 HSOP2 GND_16 A24 100nF
[4] PCIE1X2_TX- HSON2 GND_15
B25 A25 10%_16V
GND_8 HSIP2 PCIE1X2_RX+ [4]
B26 A26 PCIE1X2_RX- [4] 0402
B27 GND_9 HSIN2 A27
[4] PCIE1X3_TX+ HSOP3 GND_14
[4] PCIE1X3_TX- B28 A28
B29 HSON3 GND_13 A29
GND_10 HSIP3 PCIE1X3_RX+ [4]

NPTH_1
NPTH_2
B30 A30 PCIE1X3_RX- [4]
B31 RSVD_2 HSIN3 A31
B32 PRSNT2_2# GND_12 A32
GND_11 RSVD_3
C C

I1
I2
PCI-E X4 _Slot2 PCIEX4_2_PRSNT1# R226
0402
0
Jumper_1/16W
+V12 PCIE-4X1_2 +V12
PCIEXPRESS_64V
B1 A1
B2 12V_1 PRSNT1# A2 +V12 CAD Note:
B3 12V_2 12V_3 A3 R227 4.7K
RSVD 12V_4 Place near slot and each PWR pin.
B4 A4 0402 5%_1/16W
B5 GND_1 GND_21 A5 PCIEX4_2_JTAG2
[4,13,14,15,21] SMB_CLK SMCLK JTAG2 PCIEX4_2_JTAG3
B6 A6 R228 4.7K C105 C106 C107
[4,13,14,15,21] SMB_DAT B7 SMDAT JTAG3 A7 0402 5%_1/16W +V3.3 270uF 100nF 100nF
B8 GND_2 JTAG4 A8 PCIEX4_2_JTAG5 R229 4.7K 20%_16V 10%_16V 10%_16V
+V3.3 R230 4.7K PCIEX4_2_JTAG1 B9 3p3V_1 JTAG5 A9 0402 5%_1/16W 0402 0402
0402 5%_1/16W B10 JTAG1 3p3V_2 A10 +V3.3
+V3.3_DUAL B11 3p3VAUX 3p3V_3 A11
[4,13,14] PCIE_WAKE# WAKE# PWRGD PLTRST# [4,13,14,23,24,25]
KEY
B12 A12
B13 RSVD_1 GND_20 A13 +V3.3
GND_3 REFCLK+ CLK_PCIEX4_2+ [15]
B14 A14 CLK_PCIEX4_2- [15]
[4] PCIE1X4_TX+ HSOP0 REFCLK-
B15 A15
B [4] PCIE1X4_TX- B16 HSON0 GND_19 A16 B
GND_4 HSIP0 PCIE1X4_RX+ [4]
R231 10K PCIEX4_2_PRSNT B17 A17 C108 C109 C110 C111
+V3.3 0402 1%_1/16W B18 PRSNT2_1# HSIN0 A18
PCIE1X4_RX- [4]
560uF 100nF 100nF 100nF
GND_5 GND_18 20%_6.3V 10%_16V 10%_16V 10%_16V
0402 0402 0402
B19 A19
[4] PCIE1X5_TX+ HSOP1 RSVD_4
B20 A20
[4] PCIE1X5_TX- HSON1 GND_17
B21 A21 PCIE1X5_RX+ [4]
B22 GND_6 HSIP1 A22
GND_7 HSIN1 PCIE1X5_RX- [4] +V3.3_DUAL
B23 A23
[5] PCIE1X6_TX+ HSOP2 GND_16
B24 A24
[5] PCIE1X6_TX- HSON2 GND_15
B25 A25
GND_8 HSIP2 PCIE1X6_RX+ [5]
B26 A26 PCIE1X6_RX- [5]
B27 GND_9 HSIN2 A27 C112
[5] PCIE1X7_TX+ HSOP3 GND_14
B28 A28 100nF
[5] PCIE1X7_TX- HSON3 GND_13
B29 A29 10%_16V
GND_10 HSIP3 PCIE1X7_RX+ [5]
NPTH_1
NPTH_2

B30 A30 0402

RSVD_2 HSIN3 PCIE1X7_RX- [5]
B31 A31
B32 PRSNT2_2# GND_12 A32
GND_11 RSVD_3
I1
I2

A A

Title
PCIe X4 Slot 1-2
Size Document Number Rev
SOM-DB5830 A1
Monday, October 22, 2018
Date: Sheet 13 of 34
5 4 3 2 1
 8 7 6 5 4 3 2 1

R233 0 5% 0402

CAD Note:

I1
I2
+V12 +V12 +V12 Place near slot and each PWR pin.

NPTH_1
NPTH_2
B1 A1
D
B2 12V_1 PRSNT1 A2 D
B3 12V_2 12V_4 A3 C115 C116 C113
B4 12V_3 12V_5 A4 100nF 100nF 270uF
SMB_CLK B5 GND_1 GND_3 A5 R234 4.7K 5% 0402 10%_16V 10%_16V 20%_16V
[4,13,15,21] SMB_CLK SMB_DAT B6 SMCLK JTAG2 A6 R235 4.7K 5% 0402 0402 0402 SC-φ8*8mm
[4,13,15,21] SMB_DAT B7 SMDAT JTAG3 A7
B8 GND_2 JTAG4 A8 R236 4.7K 5% 0402
+V3.3 R237 4.7K B9 3_3V_1 JTAG5 A9 +V3.3
5% 0402 B10 JTAG1 3_3V_2 A10
+V3.3_DUAL B11 3_3VAUX 3_3V_3 A11 +V3.3
[4,13] PCIE_WAKE# WAKE PWRGD PLTRST# [4,13,23,24,25]

KEY C117
B12 A12 NL/100pF C114 C118 C119 C120
B13 RSVD_1 GND_7 A13 50V 100nF 100nF 100nF 560uF
B14 GND_4 REFCLK+ A14 CLK_PCIEX16_1+ [15]
0402 10%_16V 10%_16V 10%_16V 20%_6.3V
[5] PCIE16X_TX0+ B15 HSOP0 REFCLK- A15 CLK_PCIEX16_1- [15]
0402 0402 0402 OSCON-φ8*8mm
[5] PCIE16X_TX0- HSON0 GND_8
B16 A16
GND_5 HSIP0 PCIE16X_RX0+ [5]
R232 10K 5% 0402 B17 A17
+V3.3 B18 PRSNT2_1 HSIN0 A18
PCIE16X_RX0- [5]
GND_6 GND_9
+V3.3_DUAL
B19 A19
[5] PCIE16X_TX1+ HSOP1 RSVD_3
B20 A20
[5] PCIE16X_TX1- B21 HSON1 GND_16 A21 C121
GND_10 HSIP1 PCIE16X_RX1+ [5]
B22 A22 100nF
GND_11 HSIN1 PCIE16X_RX1- [5]
B23 A23 10%_16V
[5] PCIE16X_TX2+ B24 HSOP2 GND_17 A24 0402
[5] PCIE16X_TX2- HSON2 GND_18
C B25 A25 C
B26 GND_12 HSIP2 A26 PCIE16X_RX2+ [5]
GND_13 HSIN2 PCIE16X_RX2- [5]
B27 A27
[5] PCIE16X_TX3+ HSOP3 GND_19
B28 A28
[5] PCIE16X_TX3- B29 HSON3 GND_20 A29
GND_14 HSIP3 PCIE16X_RX3+ [5]
B30 A30
RSVD_2 HSIN3 PCIE16X_RX3- [5]
B31 A31
B32 PRSNT2_2 GND_21 A32
GND_15 RSVD_4

B33 A33
[5] PCIE16X_TX4+ HSOP4 RSVD_5
B34 A34
[5] PCIE16X_TX4- HSON4 GND_30
B35 A35
GND_22 HSIP4 PCIE16X_RX4+ [5]
B36 A36
GND_23 HSIN4 PCIE16X_RX4- [5]
B37 A37
[5] PCIE16X_TX5+ B38 HSOP5 GND_31 A38
[5] PCIE16X_TX5- B39 HSON5 GND_32 A39
GND_24 HSIP5 PCIE16X_RX5+ [5]
B40 A40
B41 GND_25 HSIN5 A41 PCIE16X_RX5- [5]
[5] PCIE16X_TX6+ B42 HSOP6 GND_33 A42
[5] PCIE16X_TX6- HSON6 GND_34
B43 A43
GND_26 HSIP6 PCIE16X_RX6+ [5]
B44 A44
GND_27 HSIN6 PCIE16X_RX6- [5]
B45 A45
[5] PCIE16X_TX7+ HSOP7 GND_35
B46 A46
[5] PCIE16X_TX7- B47 HSON7 GND_36 A47
B48 GND_28 HSIP7 A48 PCIE16X_RX7+ [5]
B49 PRSNT2_3 HSIN7 A49 PCIE16X_RX7- [5]
GND_29 GND_37

B B
B50 A50
[5] PCIE16X_TX8+ HSOP8 RSVD_7
B51 A51
[5] PCIE16X_TX8- HSON8 GND_53
B52 A52
GND_38 HSIP8 PCIE16X_RX8+ [5]
B53 A53
GND_39 HSIN8 PCIE16X_RX8- [5]
B54 A54
[5] PCIE16X_TX9+ HSOP9 GND_54
B55 A55
[5] PCIE16X_TX9- HSON9 GND_55
B56 A56
GND_40 HSIP9 PCIE16X_RX9+ [5]
B57 A57
B58 GND_41 HSIN9 A58 PCIE16X_RX9- [5]
[5] PCIE16X_TX10+ HSOP10 GND_56
B59 A59
[5] PCIE16X_TX10- HSON10 GND_57
B60 A60
GND_42 HSIP10 PCIE16X_RX10+ [5]
B61 A61
GND_43 HSIN10 PCIE16X_RX10- [5]
B62 A62
[5] PCIE16X_TX11+ HSOP11 GND_58
B63 A63
[5] PCIE16X_TX11- HSON11 GND_59
B64 A64
GND_44 HSIP11 PCIE16X_RX11+ [5]
B65 A65
B66 GND_45 HSIN11 A66 PCIE16X_RX11- [5]
[5] PCIE16X_TX12+ HSOP12 GND_60
B67 A67
[5] PCIE16X_TX12- B68 HSON12 GND_61 A68
B69 GND_46 HSIP12 A69 PCIE16X_RX12+ [5]
GND_47 HSIN12 PCIE16X_RX12- [5]
B70 A70
[5] PCIE16X_TX13+ HSOP13 GND_62
B71 A71
[5] PCIE16X_TX13- HSON13 GND_63
B72 A72
B73 GND_48 HSIP13 A73 PCIE16X_RX13+ [5]
GND_49 HSIN13 PCIE16X_RX13- [5]
B74 A74
[5] PCIE16X_TX14+ HSOP14 GND_64
B75 A75
[5] PCIE16X_TX14- B76 HSON14 GND_65 A76
GND_50 HSIP14 PCIE16X_RX14+ [5]
B77 A77
GND_51 HSIN14 PCIE16X_RX14- [5]
A B78 A78 A
[5] PCIE16X_TX15+ HSOP15 GND_66
B79 A79
[5] PCIE16X_TX15- B80 HSON15 GND_67 A80
B81 GND_52 HSIP15 A81 PCIE16X_RX15+ [5]
PRSNT2_4 HSIN15 PCIE16X_RX15- [5]
B82 A82
RSVD_6 GND_68

PCIEX16_1 Title
PCIEXPRESS_164V PCI Express X16 Slot
Size Document Number Rev
SOM-DB5830 A1
Monday, October 22, 2018
Date: Sheet 14 of 34
8 7 6 5 4 3 2 1
 5 4 3 2 1

PCIE Clock Buffer

R238 NL/10K OE1#
+V3.3 0402 1%_1/16W
R239 10K
0402 1%_1/16W +V3.3_PCIE_CLK + +V3.3_VDDA_PLL = Max 200 mA/ 8 mils
R240 10K OE6#
0402 1%_1/16W +V3.3_PCIE_CLK +V3.3
R241 NL/10K
PLL 0402 1%_1/16W B37 2A CAD Note :
(BYP#_LOBW_HIBW) MODE 0603 120_100MHz 1. Place 10UF close to IC
C122 C123 C124 C125 C126 C127 2. Place 100nF PER PIN close to
R242 10K PD# 100nF 100nF 100nF 100nF 100nF 10uF
0402 1%_1/16W 10%_16V 10%_16V 10%_16V 10%_16V 10%_16V 20%_6.3V
Pin 1,5,11,16,18, 24, 28 as possible
Low Bypass
Mid PLL 100M Low BW R243 NL/10K 0402 0402 0402 0402 0402 0603
D D
High PLL 100M Hi BW 0402 1%_1/16W

R244 NL/10K PLL

SMB_ADR_tri Address 0402 1%_1/16W
R245 10K
Low DA/DB 0402 1%_1/16W +V3.3_VDDA_PLL +V3.3
Mid DC/DD
High D8/D9 A101-1 Change PCIE CLK IC part R246 2.2 +V3.3_VDDA B38 2A CAD Note :
R247 10K SMB_ADDR_TRI 0603 1%_1/10W 0603 120_100MHz 1. Place 10UF close to IC
U7
0402 1%_1/16W C128 C129 2. Place 100nF close to Pin 28
R248 10K 1 100nF 10uF
0402 1%_1/16W OE1# 8 VDD_1 5 10%_16V 20%_6.3V
OE6# 21 OE1 VDD_2 11 0402 0603
OE6 VDD_3 16
VDD_4 18
2 VDD_5 24
[4] CLK_PCIE_REF+ SRC_IN VDD_6
3 28
[4] CLK_PCIE_REF- SRC_IN VDDA
CAD NOTE:PLACE RESISTORS CLOSE TO IC WITHIN 0.5 INCHES
PD# 25 6 CLK_Z_PCIEX4_2+ R249 27 0402 1%_1/16W
+V3.3 +V3.3 PD DIF_1 7 CLK_Z_PCIEX4_2- CLK_PCIEX4_2+ [13]
R250 27 0402 1%_1/16W
DIF_1 CLK_PCIEX4_2- [13]
PLL 12
BYP/LOBW/HIBW 9 CLK_Z_PCIEX4_1+ R251 27 0402 1%_1/16W
SMB_M_DAT DIF_2 CLK_Z_PCIEX4_1- CLK_PCIEX4_1+ [13]
A101-2 14 10 R252 27 0402 1%_1/16W
SDATA DIF_2 CLK_PCIEX4_1- [13]
R253 SMB_M_CLK 13 20 CLK_Z_PCIEX16_1+ R254 27 0402 1%_1/16W
SCLK DIF_5 CLK_PCIEX16_1+ [14]
1

2.2K 19 CLK_Z_PCIEX16_1- R255 27 0402 1%_1/16W

SMB_ADDR_TRI 17 DIF_5 CLK_PCIEX16_1- [14]
5%
0402 SMB_ADR_tri 23
G

3 2 SMB_M_CLK Swap U7 SMB_M_CLK and SMB_M_DAT for connect mistake. DIF_6 22 R256 R257
[4,13,14,21] SMB_CLK DIF_6 43.2 43.2 R258
D

1%_1/16W 1%_1/16W 43.2

26 CLK_IREF 0402 0402 1%_1/16W
Q16 IREF 0402
NX7002AK 4 R260
GND_1 15 R261 R259 43.2
0.3A/60V
GND_2 27 412 R262 43.2 1%_1/16W
C SOT-23 C
GNDA 1%_1/16W 43.2 1%_1/16W 0402
0402 1%_1/16W 0402
IDT_9DB433AGILF 0402
TSSOP28
+V3.3 +V3.3
Operating temp. -40~85 degree

R263
1

2.2K
5%
0402
G

3 2 SMB_M_DAT
[4,13,14,21] SMB_DAT
D

Q17
NX7002AK
0.3A/60V
SOT-23

From SOC to 3 device

CAD Note: 1. to TPM
Co-Layout use 3 PAD Shared. 2. to 80 port
3. to LPC pin header
B
R264
0402
0
5%
CLK33M_B_LPC [23] PCI Clock Buffer B

From SOC R265 NL/10

+V3.3 @ Max 40 mA / 1.6 mils
[4] CLK33M_LPC +V3.3
0402 5%_1/16W
U8
CLK33M_REF 1 8
2 REF CLKOUT 7 CLK33M_A_TPM R266 NL/22
CLK2 CLK4 CLK33M_R_TPM [23] to TPM
To 80 port R267 NL/22 CLK33M_A_80 3 6 0402 1%_1/16W
[23] CLK33M_A_R_80 CLK1 VCC CLK33M_A_PH
0402 1%_1/16W 4 5 R268 NL/22 CLK33M_R_PH [23] to LPC pin header
GND CLK3 0402 1%_1/16W
C130 C131 C132 C133
NL/10pF NL/ICS_ICS9112-16 NL/100nF NL/10pF NL/10pF
5%_50V SOIC_8P_50_193X236 10%_16V 5%_50V 5%_50V
0402 TA : 0~70 degree 0402 0402 0402

A A

Title
Clock Buffer PCI-E/PCI
Size Document Number Rev
SOM-DB5830 A1
Monday, October 22, 2018
Date: Sheet 15 of 34
5 4 3 2 1
 E D C B A

VGA
placement near the CRT connector +V5 @ 1A
+V5 +V5
[4] VGA_R
VGA_R B39
0603
75_100MHz
0.5A
VGA_Y_R B40
0603
75_100MHz
0.5A
VGA_Z_R VGA
VGA_G B41 75_100MHz VGA_Y_G B42 75_100MHz VGA_Z_G
[4] VGA_G
0603 0.5A 0603 0.5A
4 VGA_B VGA_Y_B VGA_Z_B 4
B43 75_100MHz B44 75_100MHz PS5 R269 VGA_CONN1
[4] VGA_B
0603 0.5A 0603 0.5A SMD1206P200TF 10K
2A 5% H2
1206 0402
VGA_EN 6
R270 R272 R271 C134 C135 C136 C141 C137 C138 C142 C139 C140 VGA_Z_R 1 11 GND_HDMI_VGA
150 150 150 10pF 10pF 10pF 22pF 22pF 22pF 10pF 10pF 10pF 7
1% 1% 1% 50V 50V 50V 50V 50V 50V 50V 50V 50V +V5_Z_VGA VGA_Z_G 2 12 VGA_Z_DDAT
0402 0402 0402 0402 0402 0402 0402 0402 0402 0402 0402 0402 8
VGA_Z_B 3 13 VGA_Z_HS
+V5_VGA B45 3A 9
0805 30_100MHz 4 14 VGA_Z_VS
C143 10
100nF 5 15 VGA_Z_DCLK
10%_16V
0402 H1

placement near the CRT connector +V5 placement near the CRT connector DSUB_15(F)H GND_HDMI_VGA
<Characteristic>

A101-1 change single bus buffer for C144

Phase Out for standardization. 100nF
Oprerating Temperature: -55~105 degree
10%_16V D9
U9 +V3.3
0402
1 OE# VCC 5 1 6 VGA_Z_R
R273 33 VGA_BUF_HS 2 A
[4] VGA_HS VGA_Y_HS VGA_Z_HS
0402 1% 3 Y 4 R274 39.2 2 5
GND
0402 1% C145
3 NL/22pF VGA_Z_B 3 4 VGA_Z_G C146 3
TI_SN74AHCT1G125DCKR 50V 100nF
0402 10%_16V
AZC099-04S.R7G 0402
Remove NL/33 ohm 5.5A

+V5

A101-1 change single bus buffer for C147

Phase Out for standardization. 100nF
10%_16V
U10
0402
1 OE# VCC 5 D10
R275 33 VGA_BUF_VS 2 A
+V5
[4] VGA_VS VGA_Y_VS VGA_Z_VS VGA_Z_VS VGA_Z_HS
0402 1% 3 Y 4 R276 39.2 1 6
GND
0402 1% C148
NL/22pF 2 5
TI_SN74AHCT1G125DCKR 50V
0402 VGA_Z_DCLK 3 4 VGA_Z_DDAT C149
100nF
Remove NL/33 ohm 10%_16V
AZC099-04S.R7G 0402
5.5A

2 2
+V3.3 +V5
1

R277
2.2K
G

5%
2 3 0402 VGA_Z_DDAT
[4] VGA_DDAT
S

C150 Remove serio 0 ohm

NL/22pF
Q18 50V
NX7002AK 0402
0.3A/60V
SOT-23

+V3.3 +V5
1

R278
2.2K
G

5%
2 3 0402 VGA_Z_DCLK
[4] VGA_DCLK
S

C151 Remove serio 0 ohm

1 NL/22pF 1
Q19 50V
NX7002AK 0402
0.3A/60V
SOT-23

Title
VGA
Size Document Number Rev
SOM-DB5830 A1
Monday, October 22, 2018
Date: Sheet 16 of 34
E D C B A
 5 4 3 2 1
LVDS PWR selection CAD Note :
LVDS INVERTER EDP / LVDS HPD selection
Follow schematic and place J6/J7 together.
J4 J5(2-3) J6(1-2)
PH_2x1V_2.54mm
<Characteristic>
+V12 @ 1A 1
MINIJUMPER_2_2.54mm
<Characteristic>
MINIJUMPER_2_2.54mm
<Characteristic>
2 J7(1-2)
+V12 J6 1-2 LVDS
J5
PH_3x1V_2.54mm
+V3.3 @ 1A +V5 @ 1A PH_3x1V_2.54mm
<Characteristic>
+V12 @ 1A MINIJUMPER_2_2.54mm 2-3 EDP_HPD

1
2
3

1
2
3
<Characteristic> <Characteristic>
+V5 +V3.3 +V5 +V12

+V5 @ 1A C152 +V12_Y_LVDS J7

+VDD_SELECT
100nF A101-2 LVDS_INVERTER1 PH_3x1V_2.54mm
10%_16V PS6 SMD1206P200TF 2A 1206 +V12_Z_LVDS 1 <Characteristic>

1
2
3
0402 Change component at PG17 for LVDS sequence. 2

D +VDD_SELECT @ 1A Q20 +VLVDS_PANEL_PWR [4] LVDS_BKLT_EN#

R279
R280
0 5% 0603 LVDS_BKLT_Z_EN#
0 5% 0603 LVDS_Z_VBR
3
4 EDP_HDP_A
EDP_HPD# [4]
D
[4] LVDS_CTRL +V5_LVDS
SI4435DDY-T1-GE3 5
-8.1A/30V C153
NL/1uF WB_5V_2.0mm
+VDD_SELECT 3 8 10V <Characteristic>

S S S

D D D D
2 7 0603

R281
1 6
5
+V5 @ 1A
100K PS7 SMD1206P200TF
+V5

G
5%_1/16W SOIC8 1206 2A

4
0402 C154 C1141 C1144 C1145
22uF 270uF 470uF 470uF
LVDS_Z_ENAVDD 20%_25V 20%_16V 20%_16V 20%_16V
0805 SC-φ8*8mm OSCON-φ10*11.5mm
3

OSCON-φ10*11.5mm
D Q21 C155
NX7002AK NL/220nF
LVDS_Y_ENAVDD G
R282 27.4K 1 0.3A/60V 10%_16V
[4,17] LVDS_ENAVDD
0402 1%_1/16W S SOT-23 A101-2 0402

Unmount C155 for LVDS sequence.

2

C1140
1uF
10%_6.3V
0402

LVDS Connector
Layout Note: Layout Note:
Each pair of bead and resister co-layout Each pair of bead and resister co-layout +VLVDS_PANEL_PWR @ 1A (40mils)
+VLVDS_PANEL_PWR
A101-1 LVDS1 change LVDS conn. for

C LVDS0_Z_D0- R284
0402
0
5%
LVDS0_D0-
LVDS0_D0- [4]
LVDS1_Z_D0+ R285
0402
0
5%
LVDS1_D0+
LVDS1_D0+ [4]
Phase Out.
C
LVDS0_Z_D0+ R286 0 LVDS0_D0+ LVDS1_Z_D0- R287 0 LVDS1_D0- LVDS1
LVDS0_D0+ [4] LVDS1_D0- [4]
0402 5% 0402 5% 41 43
C1146 C1147 C1156 C1157
NL/8pF NL/8pF NL/8pF NL/8pF 1 2
0.5pF_50V 0.5pF_50V 0.5pF_50V 0.5pF_50V 3 4
0402 0402 0402 0402 5 6
LVDS0_Z_D0- 7 8 LVDS1_Z_D0-
C156 LVDS0_Z_D0+ 9 10 LVDS1_Z_D0+ C157
100nF 11 12 100nF
10%_16V LVDS0_Z_D1- 13 14 LVDS1_Z_D1- 10%_16V
A101-2 0402 LVDS0_Z_D1+ 15 16 LVDS1_Z_D1+ 0402
Reserve cap at LVDS signals for SI and remove Common Mode Choke. 17 18
LVDS0_Z_D2- 19 20 LVDS1_Z_D2-
LVDS0_Z_D2+ 21 22 LVDS1_Z_D2+
23 24
LVDS0_Z_D1- R288 0 LVDS0_D1- LVDS1_Z_D1+ R289 0 LVDS1_D1+ LVDS0_Z_CLK- 25 26 LVDS1_Z_CLK- +V3.3
LVDS0_D1- [4] LVDS1_D1+ [4] LVDS0_Z_CLK+ LVDS1_Z_CLK+
0402 5% 0402 5% 27 28
LVDS0_Z_D1+ R290 0 LVDS0_D1+ LVDS1_Z_D1- R291 0 LVDS1_D1- 29 30
LVDS0_D1+ [4] LVDS1_D1- [4] LVDS_Z_DDC_CLK_eDP_AUX+ LVDS_Z_DDC_DAT_eDP_AUX-
0402 5% 0402 5% 31 32
C1148 C1149 C1158 C1159 33 34 EDP_HDP_A R292
NL/8pF NL/8pF NL/8pF NL/8pF LVDS0_Z_D3- 35 36 LVDS1_Z_D3- 10K
0.5pF_50V 0.5pF_50V 0.5pF_50V 0.5pF_50V LVDS0_Z_D3+ 37 38 LVDS1_Z_D3+ 5%
0402 0402 0402 0402 39 40 LVDS1_CTRL 0402

R293 42 44
4.7K R294
5% BB_20x2V_S1.25mm 1K
0402 <Characteristic> 5%
0402

LVDS0_Z_D2- R295 0 LVDS0_D2- LVDS1_Z_D2+ R296 0 LVDS1_D2+

LVDS0_D2- [4] LVDS1_D2+ [4]
0402 5% 0402 5%
LVDS0_Z_D2+ R297 0 LVDS0_D2+ LVDS1_Z_D2- R298 0 LVDS1_D2-
LVDS0_D2+ [4] LVDS1_D2- [4]
0402 5% 0402 5%
C1150 C1151 C1160 C1161
NL/8pF NL/8pF NL/8pF NL/8pF
0.5pF_50V
0402
0.5pF_50V
0402
0.5pF_50V
0402
0.5pF_50V
0402 Discharge Circuit Change R2033 from +V3.3 to +V5_DUAL for +VLVDS_PANEL_PWR discharge.

A101-2
+V5_DUAL +VLVDS_PANEL_PWR
B A101-2
B
R2033 R2034 Change R2034 from 1.2Kohm to 52.3ohm for
10K 52.3 +VLVDS_PANEL_PWR discharge.
5% 0805
LVDS0_Z_CLK- R299 0 LVDS0_CLK- LVDS1_Z_CLK+ R300 0 LVDS1_CLK+ 0402 1%_1/8W
LVDS0_CLK- [4] LVDS1_CLK+ [4]
0402 5% 0402 5%
LVDS0_Z_CLK+ R301 0 LVDS0_CLK+ LVDS1_Z_CLK- R302 0 LVDS1_CLK- DISCHARGE_+VLVDS_PANEL_PWR
LVDS0_CLK+ [4] LVDS1_CLK- [4]

3
0402 5% 0402 5%
D Q63
NX7002AK
LVDS_ENAVDD# G
1 0.3A/60V
S SOT-23

2
D Q64
NX7002AK
G
1 0.3A/60V
[4,17] LVDS_ENAVDD
S SOT-23

2
LVDS1_Z_D3+ R303 0 LVDS1_D3+
LVDS0_Z_D3- LVDS0_D3- LVDS1_D3+ [4]
R304 0 0402 5%
LVDS0_D3- [4] LVDS1_Z_D3- LVDS1_D3-
0402 5% R305 0
LVDS0_Z_D3+ LVDS0_D3+ LVDS1_D3- [4]
R306 0 0402 5%
LVDS0_D3+ [4]
0402 5% C1162 C1163
C1152 C1153 NL/8pF NL/8pF
NL/8pF NL/8pF 0.5pF_50V 0.5pF_50V
0.5pF_50V 0.5pF_50V 0402 0402
0402 0402

A LVDS_Z_DDC_CLK_eDP_AUX+ R307
0402
0
5%
LVDS_DDC_CLK_eDP_AUX+ [4] A
LVDS_Z_DDC_DAT_eDP_AUX- R308 0
LVDS_DDC_DAT_eDP_AUX- [4]
0402 5%

Title
LVDS Connector
Size Document Number Rev
SOM-DB5830 A1
Monday, October 22, 2018
Date: Sheet 17 of 34

5 4 3 2 1
 5 4 3 2 1
HDMI level shifter
Layout Note:
close to Pin18
Layout Note:
close to Pin1 ESD
+V3.3_HDMI +V3.3
D11
22mA R309 0 22mA HDMID_CONN_DATA2- 1 ESD Diode
TMDS_CH1-
Main Link TMDS DATA CH C161
1uF
C158
1uF
C162
1nF
C159
100nF
0402 Jumper_1/16W
C160
1nF
C163
10uF
HDMID_CONN_DATA2+ 2
TMDS_CH1+

D R310 1K HDMID_OE# 17
U11
VDD_1
1
18
10%_6.3V
0402
10%_6.3V
0402
10%_50V
0402
10%_16V
0402
10%_50V
0402
20%_6.3V
0402
3
8 GND1
GND2 10 HDMID_CONN_DATA2-
D
1%_1/16W OE VDD_2 HDMID_CONN_DATA1- 4 NC_4 9 HDMID_CONN_DATA2+
9 HDMID_CN_CLK+ TMDS_CH2- NC_3 7 HDMID_CONN_DATA1-
C170 100nF 10%_16V 0402 HDMID_C_CLK+ 32 OUT_D4+ 10 HDMID_CN_CLK- R314 NL/0 HDMID_CONN_DATA1+ 5 NC_2 6 HDMID_CONN_DATA1+
[5] DDI3_PAIR3+ IN_D4+ OUT_D4- TMDS_CH2+ NC_1
C171 100nF 10%_16V 0402 HDMID_C_CLK- 31 0402 Jumper_1/16W
[5] DDI3_PAIR3- IN_D4- HDMID_CN_DATA0+
11 IP4294CZ10-TBR
C168 100nF 10%_16V 0402 HDMID_C_DATA0+ 30 OUT_D3+ 12 HDMID_CN_DATA0- R313 NL/0 5.5V
[5] DDI3_PAIR2+ IN_D3+ OUT_D3-
C169 100nF 10%_16V 0402 HDMID_C_DATA0- 29 0402 Jumper_1/16W XSON10
[5] DDI3_PAIR2- IN_D3- HDMID_CN_DATA1+
13
C166 100nF 10%_16V 0402 HDMID_C_DATA1+ 28 OUT_D2+ 14 HDMID_CN_DATA1- R312 NL/0
[5] DDI3_PAIR1+ IN_D2+ OUT_D2-
C167 100nF 10%_16V 0402 HDMID_C_DATA1- 27 0402 Jumper_1/16W
[5] DDI3_PAIR1- IN_D2- HDMID_CN_DATA2+
15
C164 100nF 10%_16V 0402 HDMID_C_DATA2+ 26 OUT_D1+ 16 HDMID_CN_DATA2- R311 NL/0
[5] DDI3_PAIR0+ IN_D1+ OUT_D1-
C165 100nF 10%_16V 0402 HDMID_C_DATA2- 25 0402 Jumper_1/16W
[5] DDI3_PAIR0- IN_D1-
D12
TP38 1 LS_HPD_S 5 21 HDMID_CN_HPD HDMID_CONN_DATA0- 1 ESD Diode
TP28_PSM HPD_SOURCE HPD_SINK TMDS_CH1-
HDMI_EQ0 8 HDMI1_REXT R316 10.7K HDMID_CONN_DATA0+ 2
HDMI_EQ1 2 EQ0 4 0402 1%_1/16W R315 TMDS_CH1+
EQ1 REXT 1.AIMB-217 design 10.7K 1% ohm NL/200K 3
R317 2.2K DDC_EN 22 2.Datasheet 12.5K 1% ohm 1%_1/16W 8 GND1
+V3.3_HDMI 1% 0402 DDC_EN Only 12.4K 1% ohm which value 0402 GND2 10 HDMID_CONN_DATA0-
R318 NL/0 3 23 close to 12.5K in Advantech HDMID_CONN_CLK- 4 NC_4 9 HDMID_CONN_DATA0+
0402 Jumper_1/16W DDET NC TMDS_CH2- NC_3 7 HDMID_CONN_CLK-
R319 2.2K DDET HDMID_CONN_CLK+ 5 NC_2 6 HDMID_CONN_CLK+
+V3.3_HDMI 1% 0402 7 19 R320 2.2K 1% 0402 TMDS_CH2+ NC_1
R321 NL/0 SCL_SOURCE SCL_SINK +V5_HDMID IP4294CZ10-TBR
0402 Jumper_1/16W 6 20 R322 2.2K 1% 0402 5.5V
SDA_SOURCE SDA_SINK
XSON10
R323 NL/2.2K 33 24 HDMI_DDC_CLK
+V3.3_HDMI 1% 0402 EPAD_GND HIZ_EN HDMI_DDC_DAT
R324 NL/2.2K NXP_PTN3363BS
+V3.3_HDMI 1% 0402 <Characteristic>
HIZ_EN R325 NL/2.2K
HVQFN32 +V3.3_HDMI
0402 1%_1/16W
C [5]
[5]
DDI3_CTRLCLK
DDI3_CTRLDATA Oprerating Temperature: -40~105 degree R326
0402
2.2K
1%_1/16W
D13
+V5_HDMID
C
HDMI_DDC_CLK 1 6 HDMI_DDC_DAT

Correct name error from SW_HMDI_EQ1 to SW_HDMI_EQ1. 2 5

A101-2
HIZ_EN=0, 50 termination resistors are
+V3.3_HDMI
EQ SW_HDMI_EQ1 enabled on IN_Dx and this configuration
3 4 HDMID_CN_HPD C172
100nF
[5] DDI3_DDC_AUX_SEL R327 0 DDI3_DDC_SEL R328 100K
+V3.3
option is used for HDMI level shifter use case. 16V
0402 Jumper_1/16W 0402 5%_1/16W R329 10K 1%_1/16W 0402 1 ON 4 HDMI_EQ0_GND R330 0 0402 0402
R331 10K 1%_1/16W 0402 2 3 HDMI_EQ1_GND R332 0 0402 AZC199-04S.R7G
6A
CHS-02TA(29)
HIZ_EN=1, high input impedance is presented on IN_Dx and this
SOT-23-6
configuration option is used when PTN3363 is used for native
HDMI SEL HDMI_EQ0

HDMI_EQ1
<Characteristic>

Default SW all OFF.

HDMI redriver use cases. In the native
redriver use case, external 50 termination resistors on the
[5] DDI3_HPD R333 0 Jumper_1/16W 0402

application are pulled up to VDD.

Co-lay Co-lay
Bead B46 B47 55mA PS8 55mA
+V5_HDMID
HDMID_CN_DATA2+ 4 3 HDMID_CONN_DATA2+ HDMID_CN_DATA0+ 4 3 HDMID_CONN_DATA0+ 2 3 VCC_HDMI_V

D
+V5
Q22 SMD0805P050TF C173

G
HDMID_CN_DATA2- 1 2 HDMID_CONN_DATA2- HDMID_CN_DATA0- 1 2 HDMID_CONN_DATA0- PJA3402 0.5A 1uF

1
4.4A/30V 0805 10%_6.3V
170mA 170mA SOT-23 Itrip=1 (A) 0402
35_100MHz 35_100MHz R334 1.5K Vgs=+/-12v
1.25*1*0.82mm 1.25*1*0.82mm +V12 0402 1%
R336
10K
R335 NL/0 R337 NL/0 1%
0402 Jumper_1/16W 0402 Jumper_1/16W 0402
R338 NL/0 R339 NL/0
B 0402
Co-lay
Jumper_1/16W 0402
Co-lay
Jumper_1/16W
B
HDMID_CN_DATA1+ 4
B48
3 HDMID_CONN_DATA1+ HDMID_CN_CLK+ 4
B49
3 HDMID_CONN_CLK+ HDMI Connector
HDMI_CONN1
HDMID_CN_DATA1- 1 2 HDMID_CONN_DATA1- HDMID_CN_CLK- 1 2 HDMID_CONN_CLK- HDMID_CONN_DATA2+ 1
2
170mA 170mA HDMID_CONN_DATA2- 3 HDMI A TYPE
35_100MHz 35_100MHz HDMID_CONN_DATA1+ 4
1.25*1*0.82mm 1.25*1*0.82mm 5 1
HDMID_CONN_DATA1- 2
6
HDMID_CONN_DATA0+ 7 H1
R340 NL/0 R341 NL/0 8 H2
0402 Jumper_1/16W 0402 Jumper_1/16W HDMID_CONN_DATA0- 9 H3
R342 NL/0 R343 NL/0 HDMID_CONN_CLK+ 10 H4
0402 Jumper_1/16W 0402 Jumper_1/16W 11
HDMID_CONN_CLK- 12
13
14
+V5_HDMID HDMI_DDC_CLK 15 18
HDMI_DDC_DAT 16 19
55mA 17
18
HDMID_CN_HPD 19
C174 C175 C176
100nF 1nF 10pF HDMI_19H
10%_16V 10%_50V 5%_50V R344 <Characteristic>
0402 0402 0402 NL/100K
1%_1/16W

CAD NOTE:
GND_HDMI_VGA
Place close HDMI1
Oprerating Temperature: -40~85 degree
R345 0
0603 Jumper_1/10W
A R346
0603
0
Jumper_1/10W A
GND_HDMI_VGA

Title
HDMI Conn. DDI3
Size Document Number Rev
SOM-DB5830 A1
Monday, October 22, 2018
Date: Sheet 18 of 34

5 4 3 2 1
 5 4 3 2 1
DP1
CAD Note:
Q23 ESD Diode place them close to connector
1A 1A D14 DDI1_CN_PAIR0+ P1 DISPLAYPORT1A
2 3 DDI1_CN_PAIR0+ 1 P2

D
+V3.3 +V3.3_DP TMDS_CH1- ESD Diode
DDI1_CN_PAIR0- P3
DDI1_CN_PAIR0- 2 DDI1_CN_PAIR1+ P4

G
PJA3402 20
4.4A/30V TMDS_CH1+ P5

1
R347 1.5K SOT-23 3 DDI1_CN_PAIR1- P6
+V12 0402 1%_1/16W 8 GND1 DDI1_CN_PAIR2+ P7 19
GND2 10 DDI1_CN_PAIR0+ P8
R348 DDI1_CN_PAIR1+ 4 NC_4 9 DDI1_CN_PAIR0- DDI1_CN_PAIR2- P9 H1
10K TMDS_CH2- NC_3 7 DDI1_CN_PAIR1+ DDI1_CN_PAIR3+ P10 H2
1%_1/16W DDI1_CN_PAIR1- 5 NC_2 6 DDI1_CN_PAIR1- P11 H3 R349 0
0402 TMDS_CH2+ NC_1 DDI1_CN_PAIR3- P12 H4 0603 Jumper_1/10W
IP4294CZ10-TBR R350 0 DDI1_R_DDC_AUX_SEL P13
D 5.5V
[5]

[5]
DDI1_DDC_AUX_SEL

DDI1_CTRLCLK_AUX+
0402 Jumper_1/16W DDI1_CNF2 P14
P15
D
D16 P16 2
DDI1_CN_PAIR2+ 1 P17 1
D15 TMDS_CH1- ESD Diode [5] DDI1_CTRLDATA_AUX-
P18 GND_DP GND_DP GND_HDMI_VGA
DDI1_CN_PAIR2- 2 [5] DDI1_HPD P19
500mA
DDI1_HPD 1 6 DDI1_DDC_AUX_SEL +V3.3_DP TMDS_CH1+ PS9 +V3.3_PW _DP1 B50 30_100MHz +V3.3_B_DP1 500mA P20
3 +V3.3_DP 0603 1A Displayport_40H R351 0
2 5 8 GND1 SMD0603P050TF C177 C178 C179 R352 <Characteristic> 0603 Jumper_1/10W
GND2 10 DDI1_CN_PAIR2+ 0.5A 22uF 22uF 100nF 0 R562 0
NC_4 Displayport40P
DDI1_CTRLCLK_AUX+ 3 4 DDI1_CTRLDATA_AUX- DDI1_CN_PAIR3+ 4 9 DDI1_CN_PAIR2- 0603 6.3V 6.3V 10%_16V Jumper_1/16W 0603 Jumper_1/10W
TMDS_CH2- NC_3 7 DDI1_CN_PAIR3+
C180
NC_2
Itrip=1 (A) 0805 0805 0402 0402 Pin 13 : Config 1
100nF DDI1_CN_PAIR3- 5 6 DDI1_CN_PAIR3-
TMDS_CH2+ NC_1 High : HDMI device detect
10%_16V GND_DP
AZC099-04S.R7G 0402 IP4294CZ10-TBR
Low : DP device detect
5.5A 5.5V Oprerating Temperature: -40~85 degree

CAD Note:
Bead Bead place them close to connector
Co-lay Co-lay
B51 B52
C181 100nF DDI1_C_PAIR0+ 1 2 DDI1_CN_PAIR0+ C182 100nF DDI1_C_PAIR2+ 1 2 DDI1_CN_PAIR2+
[5] DDI1_PAIR0+ [5] DDI1_PAIR2+
0402 10%_16V 0402 10%_16V

C183 100nF DDI1_C_PAIR0- 4 3 DDI1_CN_PAIR0- C184 100nF DDI1_C_PAIR2- 4 3 DDI1_CN_PAIR2-

[5] DDI1_PAIR0- [5] DDI1_PAIR2-
0402 10%_16V 0402 10%_16V
170mA 170mA
35_100MHz 35_100MHz
1.25*1*0.82mm 1.25*1*0.82mm

R353 NL/0 R354 NL/0

0402 Jumper_1/16W 0402 Jumper_1/16W
R355 NL/0 R356 NL/0
0402 Jumper_1/16W 0402 Jumper_1/16W

C Co-lay
B53
Co-lay
B54
C
C185 100nF DDI1_C_PAIR1+ 1 2 DDI1_CN_PAIR1+ C186 100nF DDI1_C_PAIR3+ 1 2 DDI1_CN_PAIR3+
[5] DDI1_PAIR1+ [5] DDI1_PAIR3+
0402 10%_16V 0402 10%_16V

C187 100nF DDI1_C_PAIR1- 4 3 DDI1_CN_PAIR1- C188 100nF DDI1_C_PAIR3- 4 3 DDI1_CN_PAIR3-

[5] DDI1_PAIR1- [5] DDI1_PAIR3-
0402 10%_16V 0402 10%_16V
170mA 170mA
35_100MHz 35_100MHz
1.25*1*0.82mm 1.25*1*0.82mm

R357 NL/0 R358 NL/0

0402 Jumper_1/16W 0402 Jumper_1/16W
R359 NL/0 R360 NL/0
0402 Jumper_1/16W 0402 Jumper_1/16W

DP2
CAD Note:
ESD Diode place them close to connector
D17 DDI2_CN_PAIR0+ P21 DISPLAYPORT1B
DDI2_CN_PAIR0+ 1 ESD Diode P22
TMDS_CH1- DDI2_CN_PAIR0- P23
DDI2_CN_PAIR0- 2 DDI2_CN_PAIR1+ P24
TMDS_CH1+ 20
P25
3 DDI2_CN_PAIR1- P26
8 GND1 DDI2_CN_PAIR2+ P27 19
GND2 10 DDI2_CN_PAIR0+ P28
DDI2_CN_PAIR1+ 4 NC_4 9 DDI2_CN_PAIR0- DDI2_CN_PAIR2- P29 H5
D18 TMDS_CH2- NC_3 7 DDI2_CN_PAIR1+ DDI2_CN_PAIR3+ P30 H6
DDI2_CN_PAIR1- 5 NC_2 6 DDI2_CN_PAIR1- P31 H7
DDI2_HPD 1 6 DDI2_DDC_AUX_SEL +V3.3_DP TMDS_CH2+ NC_1 DDI2_CN_PAIR3- P32 H8
IP4294CZ10-TBR R361 0 0402 DDI2_R_DDC_AUX_SEL P33
[5] DDI2_DDC_AUX_SEL DDI2_CNF2
2 5 5.5V Jumper_1/16W P34
P35
DDI2_CTRLCLK_AUX+ 3 4 DDI2_CTRLDATA_AUX- [5] DDI2_CTRLCLK_AUX+ P36
D19 2
B C189
100nF
10%_16V
DDI2_CN_PAIR2+

DDI2_CN_PAIR2-
1

2
TMDS_CH1- ESD Diode

500mA
[5] DDI2_CTRLDATA_AUX-
[5] DDI2_HPD
P37
P38
P39
1
GND_DP B
AZC099-04S.R7G 0402 TMDS_CH1+ PS10 +V3.3_PW _DP2 B55 30_100MHz +V3.3_B_DP2 500mA P40
5.5A 3 +V3.3_DP 0603 1A Displayport_40H
8 GND1 SMD0603P050TF C190 C191 C192 R362 <Characteristic>
GND2 10 DDI2_CN_PAIR2+ 0.5A 22uF 22uF 100nF 0
NC_4 Displayport40P
DDI2_CN_PAIR3+ 4 9 DDI2_CN_PAIR2- 0603 6.3V 6.3V 10%_16V Jumper_1/16W
TMDS_CH2- NC_3 7 DDI2_CN_PAIR3+
NC_2
Itrip=1 (A) 0805 0805 0402 0402 Pin 13 : Config 1
DDI2_CN_PAIR3- 5 6 DDI2_CN_PAIR3-
TMDS_CH2+ NC_1 High : HDMI device detect
IP4294CZ10-TBR
Low : DP device detect
5.5V Oprerating Temperature: -40~85 degree

CAD Note:
Bead Bead place them close to connector

Co-lay Co-lay
B56 B57
C193 100nF DDI2_C_PAIR0+ 1 2 DDI2_CN_PAIR0+ C194 100nF DDI2_C_PAIR2+ 1 2 DDI2_CN_PAIR2+
[5] DDI2_PAIR0+ [5] DDI2_PAIR2+
0402 10%_16V 0402 10%_16V

C195 100nF DDI2_C_PAIR0- 4 3 DDI2_CN_PAIR0- C196 100nF DDI2_C_PAIR2- 4 3 DDI2_CN_PAIR2-

[5] DDI2_PAIR0- [5] DDI2_PAIR2-
0402 10%_16V 0402 10%_16V
170mA 170mA
35_100MHz 35_100MHz
1.25*1*0.82mm 1.25*1*0.82mm

R363 NL/0 R364 NL/0

0402 Jumper_1/16W 0402 Jumper_1/16W
R365 NL/0 R366 NL/0
0402 Jumper_1/16W 0402 Jumper_1/16W

Co-lay Co-lay
B58 B59
C197 100nF DDI2_C_PAIR1+ 1 2 DDI2_CN_PAIR1+ C198 100nF DDI2_C_PAIR3+ 1 2 DDI2_CN_PAIR3+

A [5] DDI2_PAIR1+
0402 10%_16V

DDI2_C_PAIR1- 4 3 DDI2_CN_PAIR1-
[5] DDI2_PAIR3+
0402 10%_16V

DDI2_C_PAIR3- 4 3 DDI2_CN_PAIR3-
A
C199 100nF C200 100nF
[5] DDI2_PAIR1- [5] DDI2_PAIR3-
0402 10%_16V 0402 10%_16V
170mA 170mA
35_100MHz 35_100MHz
1.25*1*0.82mm 1.25*1*0.82mm

R367 NL/0 R368 NL/0

0402 Jumper_1/16W 0402 Jumper_1/16W
R369 NL/0 R370 NL/0
0402 Jumper_1/16W 0402 Jumper_1/16W

Title
DP Conn. DDI port1-2
Size Document Number Rev
SOM-DB5830 A1
Monday, October 22, 2018
Date: Sheet 19 of 34
 5 4 3 2 1

SMART FAN SYSTEM FAN

+V3.3 +V5
D D

R372
10K
A101-1 D6 change Diode for
1% Phase Out for standardization.
0402

2
FANTACH R373 51.1 FANTACH_R2 R374 D21
[4] FANTACH
0402 1% Q24 10K LL4148

3
C202 NX7002AK 1% 0.15A
10nF D 0.3A/60V MINI-MELF +V5

1
5%_25V SOT-23 0402
G FANTACH_R1
0402 1
S A101-1 Phase Out
Follow SOM-DB5820 change Diode
A101-2 +V12 from 1300414800 to 1300005630-01.

2
Change C202 from 0.1uF to 0.01uF for FANTACH waveform abnormal.

FANTACH_R1

1
+V12 @ 2.2A (88mils) R371
C D20 C
4.7K MMBD4148TS
5% 75V

2
Change SMART_FAN1 from 1655004909-01 to 1655004347 for common part. 0402 SOD523
A101-2

SMART_FAN1 SYS_FAN1
1 1. GND SYS_FAN_SENSE 3
2 2. 12V 2
3 3. SENSE +V12 1
FANPWM R377 0 FANPWM_R 4 4. CONTROL
[4] FANPWM
0402 5% +V12 @ 2.2A (88mils) C201 W_3V_2.54mm
W_4V_2.54mm 100nF
<Characteristic> Cool Master FAN +V12 @ 0.45A 10%_16V
1655004347 0402

Operating Temperture = -55~125

B P/N: 1655004909-01 B
USD 0.0583
Update SMART_FAN1 PIN4 FANPWM schematic. P/N: 1655004347
A101-2 Operating Temperture = -25~85 degree
USD 0.0142
P/N: 1655004468-01
Operating Temperture = -25~85 degree
USD 0.00994

A A

Title
SYS FAN / SMART FAN
Size Document Number Rev
SOM-DB5830 A1
Monday, October 22, 2018
Date: Sheet 20 of 34
5 4 3 2 1
 5 4 3 2 1

BUZZER +V5 @ 50mA (2mils) GPIO CONN SD PWR

+V3.3
R519 need to mount for BUZZER function. +V5 GPIO1 J8(2-3)
GPI0 1 2 GPO0 GPIO_SDIO_SLT1
R519 0 GPI1 3 4 GPO1 1-2 SD Card
[4,12] SPKR 5 6
0402 5% GPI2 GPO2 2-3 GPIO MINIJUMPER_2_2.54mm R381
GPI3 7 8 GPO3 <Characteristic> 1K

1
A101-2 D22 R380 9 10 1%_1/16W A101-2
MMBD4148TS 100 J8 0402
75V 5% PH_3x1V_2.54mm
SOD523 0402 PH_5x2V_S2.54mm SDIO_CD#_DELAY R2036 0 SDIO_EN

2
BZ1 0402 Jumper_1/16W
D D
1 R2037 NL/0
[4] SD_PWR_EN_R

1
2
3
2 +

3
BUZZER BUZZER_Z SD_CD# 0402 Jumper_1/16W
- +V3.3 D Q26

3
PAC-WT-1205-P G NX7002AK
R382 1K BUZZER_Y 1 Q27 <Characteristic> SDIO_CD# 1 0.3A/60V C209 Add SD_PWR_EN to CN1 PIN A86 to control SD CONN PWR.
0402 5% MMBT3904LT1 S NL/1uF
0.2A 10%_6.3V

2
C205 1310390410 0402

2
100nF SOT-23
10%_16V
0402 A101-2

Change Q27 from 1310390410-02 to 1310390410 for duplicated part.

GPIO / SD colay +V3.3 +V3.3_SDIO @ 1A

Co-layout Co-layout
+V3.3 +V3.3_SDIO
R384 0 GPI0 R385 0 GPO0 U14
[4] GPI0_SD_DATA0 [4] GPO0_SD_CLK
0402 Jumper_1/16W 0402 Jumper_1/16W 9
R386 0 GPI1 R387 0 GPO1 VIN_2
[4] GPI1_SD_DATA1 [4] GPO1_SD_CMD
0402 Jumper_1/16W 0402 Jumper_1/16W 1 8
R388 0 GPI2 R389 0 GPO2 VIN_1 VOUT_2
[4] GPI2_SD_DATA2 [4] GPO2_SD_WP SDIO_EN
0402 Jumper_1/16W 0402 Jumper_1/16W 2 7
R391 0 GPI3 R392 0 GPO3 EN VOUT_1
[4] GPI3_SD_DATA3 [4] GPO3_SD_CD#
0402 Jumper_1/16W 0402 Jumper_1/16W 3 6 C206 4.7nF C211
C
VCC SR 0402 10%_50V 10uF C
C208 4 5 20%_6.3V
10uF GND BLEED 0402
R394 NL/0 SD_DATA0_R R395 NL/0 SD_CLK_R 20%_6.3V
0402 Jumper_1/16W 0402 Jumper_1/16W 0402 ON_NCP45521IMNTWG-H
R396 NL/0 SD_DATA1_R R397 NL/0 SD_CMD_R <Characteristic>
0402 Jumper_1/16W 0402 Jumper_1/16W +V3.3_SDIO
DFN8
R398 NL/0 SD_DATA2_R Micro SD card no WP pin
0402 Jumper_1/16W
R399 NL/0 SD_DATA3_R R400 NL/0 SD_CD#
0402 Jumper_1/16W 0402 Jumper_1/16W

Note: Coffee Lake MOW WW35

Suggest SD_DATA [3:0] and SD_CMD series resistance 22ohm.

Micro SD Card
MicroSD Card Socket: +V3.3
No Card SW1 --open--- SW2
Card Inserted SW1 --close-- SW2
C214 2.2uF +V3.3_SDIO
0402 20%_6.3V +V3.3_SDIO @ 1A (40mils) R409
+V3.3_DUAL @ 80mA (3.2mils) I2C C215 10uF
NL/5.1K
5%_1/16W
+V3.3_DUAL +V3.3_DUAL +V3.3_DUAL +V3.3_DUAL 0402 20%_6.3V CN2

I2C_CN_PWR +V3.3_DUAL @ 2mA (0.08mils) SW1 SD_CD#

SD_DATA2_R 1 SW1 SW2
B
C212 SD_DATA3_R 2 DAT2 SW2 B

100nF R401 R402 R403 C213 R404 R405 SD_CMD_R 3 CD/DAT3 SOM-DB5920 add Micro CRD ,No WP pin
10%_16V Address AEH 100nF 2.2K 2.2K 4 CMD H1 GPO3 Pull up resistor in module +V3.3A
4.7K 4.7K 4.7K VDD SMDFIX1
0402 1%_1/16W 1%_1/16W 1%_1/16W 10%_16V 1%_1/16W 1%_1/16W SD_CLK_R 5 H2
U15 CLK SMDFIX2
I2C1 0402 0402 0402 0402 0402 0402 6 H3
4 I2C_A0 1 8 SD_DATA0_R 7 VSS SMDFIX3 H4
3 I2C_A1 2 E0 VCC 7 SD_DATA1_R 8 DAT0 SMDFIX4
[4,21] I2C_CLK I2C_A2 E1 WC DAT1
2 3 6
[4,21] I2C_DAT E2 SCL I2C_CLK [4,21]
1 4 5 I2C_DAT [4,21] MicroSDCARD_8H
VSS SDA <Characteristic>
WB_4V_2.0mm R406 R407 R408
ST_M24C02-RMN6TP
NL/4.7K NL/4.7K NL/4.7K
1%_1/16W 1%_1/16W 1%_1/16W SOIC8
0402 0402 0402

+V3.3_DUAL @ 80mA (3.2mils)

+V3.3_DUAL SMB
SMB_CN_PWR
A A
C216
100nF
10%_16V
0402
SMB1
4
SMB_CLK 3
[4,13,14,15] SMB_CLK SMB_DAT 2 Title
[4,13,14,15] SMB_DAT
1 GPIO/SMBus/I2C/MicroSD/BZ
WB_4V_2.0mm Size Document Number Rev
SOM-DB5830 A1
Monday, October 22, 2018
Date: Sheet 21 of 34
5 4 3 2 1
 5 4 3 2 1

ESPI selection / BIOS selection

For COM.0 R3, the Module Carrier based BIOS options have been expanded to support
D eSPI devices. A third pin that affects the BIOS location, named ESPI_EN#, works in D
conjunction with BIOS_DIS1# and BIOS_DIS0# to define the BIOS boot path.

+V3.3_DUAL
+V3.3_DUAL

1 1 J10(1-X)
2 ESPI_SAFS 2
ESPI_SAFS [4] [4] ESPI_EN#
J9 3 3 J10
PH_3x1V_2.54mm PH_3x1V_2.54mm NL/MINIJUMPER_2_2.54mm
HD_3x1P_100_D <Characteristic> <Characteristic>
<Characteristic>

C C
1.The Carrier shall leave the ESPI_EN# unconnected on the
Carrier for LPC operation.
2. The Carrier shall tie ESPI_EN# to GND for eSPI operation.

BIOS_DIS0(2-3) BIOS_DIS1(2-3)

MINIJUMPER_2_2.54mm MINIJUMPER_2_2.54mm
<Characteristic> <Characteristic>

BIOS_DIS0 BIOS_DIS1
1 BIOS_DIS0# 1 BIOS_DIS1#
BIOS_DIS0# [4] BIOS_DIS1# [4]
2 2
3 3
B B
PH_3x1V_2.54mm PH_3x1V_2.54mm
<Characteristic> R412 <Characteristic> R413
100 100
5% 5%
0402 0402

A A

Title
BIOS / eSPI selection
Size Document Number Rev
SOM-DB5830 A1
Monday, October 22, 2018
Date: Sheet 22 of 34
5 4 3 2 1
 CLOSE THE CHIP R414 0 0402 LPC_PH_AD0
[4,23] LPC_AD0

LPC to PORT 80 +V3.3 Each pin place one Cap. LEDH1 LEDL1 [4,23] LPC_AD1
R415 0 0402 LPC_PH_AD1

3
R416 0 0402 LPC_PH_AD2
[4,23] LPC_AD2 LPC_PH_AD3
R417 0 0402

GND

GND
OUT

OUT
[4,23] LPC_AD3 LPC_PH_FRAME#
[4,23] LPC_FRAME# R418 0 0402

C221 C222 C223 C224

CAD Note: 100nF 100nF 100nF 100nF Co-layout Note :
Co-Layout use 3 PAD Shared. 10%_16V 10%_16V 10%_16V 10%_16V 3 PAD share
Place close to IC. +V3.3 @ 11.8mA (0.472mils) 0402 0402 0402 0402
R419 0 0402 SERIRQ_PH
+V3.3 [4,23] SERIRQ

DP

DP
G

G
C
D

C
D
A
B

A
B

E
F

F
From SOC [15,23] CLK33M_B_LPC R420 0 U18 R2031 NL/0 0402
LPC_DRQ0_ESPI_ALERT0# [4]
0402 5% 33 KCSC02-101 KCSC02-101

7
6
4
2
1
9
10
5

7
6
4
2
1
9
10
5
17 VCC_1 11 <Characteristic> <Characteristic>
R421 NL/0 CLK33M_80 39 CLK2/I VCC_2 6
From LPC Buffer [15] CLK33M_A_R_80 CLK0/I VCCOBANK0 Reserve ESPI signal connector
0402 5% 28
VCCOBANK1 HA R422 33 DHA DHA DLA
TP39 1RESET_LED 40 18 HA 0402 1% DHB DLB
TP28_PSM
TP40 1FRAME_LED
41
42
43
A0/OE0
A1
A2
B0
B1
B2
19
20
21
HB
HC
HB R423
0402
33
1%
DHB DHC
DHD
DLC
DLD LPC Pin Header
TP28_PSM HD HC R424 33 DHC DHE DLE
44 A3 B3 22 HE 0402 1% DHF DLF
A4 B5 CAD Note:
R425 0 0402 LPC_80P_AD0 2 24 HF HD R426 33 DHD DHG DLG
[4,23] LPC_AD0 LPC_80P_AD1 A5 B6 Co-Layout use 3 PAD Shared.
R427 0 0402 3 25 HG 0402 1% Place close to IC.
[4,23] LPC_AD1 LPC_80P_AD2 4 A6 B7 26 RUN_LED 1
R428 0 0402 TP41 HE R429 33 DHE
[4,23] LPC_AD2 LPC_80P_AD3 A7 B8
R430 0 0402 7 29 LA TP28_PSM 0402 1%
[4,23] LPC_AD3 LPC_80P_FRAME# A8 B9
[4,23] LPC_FRAME# R431 0 0402 8 30 LB HF R432 33 DHF R433 0 CLK33M_B_LPC [15,23] From SOC
9 A9 B10 31 LC 0402 1% 0402 5%
[4,13,14,23,24,25] PLTRST# A10 B11
13 35 LD HG R434 33 DHG
14 A12 B12 36 LE 0402 1% R435 NL/0
A13 B13 CLK33M_R_PH [15] From LPC Buffer
15 37 LF 0402 5%
16 A14 B14 38 LG A101-2
A15 B15/OE1 Change LPC_PH1 from 1653007220 to 1653007270-01 for DFM request.

1 27 LPC_PH1
10 TDI GNDBANK1 5 LA R436 33 DLA LPC CLK / ESPI_CLK CLK33M_PH 1 2 LPC_PH_AD1
23 TCK GNDBANK0 12 0402 1% LAD_0 / ESPI_IO_0 ESPI_LPC_RST# 3 4 LPC_PH_AD0
32 TMS GND_1 34 LB R437 33 DLB LAD_1 / ESPI_IO_1 LPC_PH_FRAME# 5 6
TDO GND_2 0402 1% LAD_2 / ESPI_IO_2 LPC_PH_AD3 7 8 +V3.3
LC R438 33 DLC LAD_3 / ESPI_IO_3 LPC_PH_AD2 9 10 R439 10K 0402
LATTICE_LC4032V-75T44C 0402 1% LFRAME# / ESPI_CS SERIRQ_PH 11 12 ESPI_LPC_RST# 1% +V3.3
TQFP44 LD R440 33 DLD SERIRQ / ESPI_ALERT 13 14
0402 1% LRESET# / ESPI_RESET# +V5_DUAL +V5
1420023230 LE R441 33 DLE PH(F)_7x2V_S2.00mm
0402 1% 1653007270-01
LF R442 33 DLF P/N: 1653007220 PH(F)7x2P-S2.00
LATTICE_LC4032V-75T44C P/N:14S8303240 0402 1% FEMALE HEADER 2x7P 2.00mm 180D(F) DIP 1240-010
LG R443 33 DLG J11
with Debug Codec P/N:1420023230 0402 1% P/N: 1653007270-01 3
Pin Header 2x7P 2.0mm 180D(F) SMD W/cap 22N8242 [4] ESPI_RESET# ESPI_LPC_RST# 2 J11(1-2)
1
[4,13,14,23,24,25] PLTRST#
PH_3x1V_2.54mm MINIJUMPER_2_2.54mm
PH3x1P-2.54 <Characteristic>
<Characteristic>

It's a little bit different between TPM2.0 FW5.51 and FW 5.61.

So co-lay to cover those FW. TPM2.0 +V3.3 @ 25mA (1mils)
+V3.3
SW_LPC_TPM1 Close to each VDD Pin.
U19 25 mA
1 8 TPM_A_LAD0 R444 0 0402Jumper_1/16W TPM_LAD0 27 1
[4,23] LPC_AD0 TPM_A_LAD1 TPM_LAD1 LAD0 VDD0
2 7 R446 0 0402Jumper_1/16W 24 9
[4,23] LPC_AD1 TPM_A_LAD2 TPM_LAD2 LAD1 VDD1
CAD Note: 3 6 R445 0 0402Jumper_1/16W 21 10 C225 C226 C227 C228 C229 C230
[4,23] LPC_AD2 4 5 TPM_A_LAD3 TPM_LAD3 19 LAD2 VDD2 20
Co-Layout use 3 PAD Shared. R447 0 0402Jumper_1/16W 100nF 100nF 100nF 100nF 100nF 1uF
[4,23] LPC_AD3 LAD3 VDD3
Place close to IC. 25 10%_16V 10%_16V 10%_16V 10%_16V 10%_16V 10%_6.3V
CHS-04TA2 TPM_CLK 22 VDD4 0402 0402 0402 0402 0402 0402
<Characteristic> LCLK
From SOC [15,23] CLK33M_B_LPC R448 0
0402 5% SW_LPC_TPM2 R449 0 0402Jumper_1/16W TPM_FRAME# 23 16 Control Carrier Board TPM_PP Control Module TPM_PP
LFRAME GND0 26 +V3.3 +V3.3
R450 NL/0 CLK33M_TPM 1 8 TPM_RST# 18 GND1 32
From LPC Buffer [15] CLK33M_R_TPM LRESET GND2
0402 5% 2 7 TPM_A_FRAME#
[4,23] LPC_FRAME# TPM_SERIRQ
3 6 28 33
[4,13,14,23,24,25] PLTRST# SERIRQ EPAD
[4,23] SERIRQ
4 5 R451 R453
NL/4.7K 4.7K
CHS-04TA2 R457 0 TPM_GPIO_FW5.61 4 5 input 1%_1/16W 1%_1/16W
<Characteristic> 0402 5% GPIO PP 0402 0402
R454 4.7K TPM_GPIO R452 NL/0 TPM_GPIO_FW5.51 2 13 TPM_PP_FW5.61 R458 0 CB_TPM_PP R456 NL/0 TPM_R_PP
+V3.3 5%_1/16W 0402 0402 5% 3 NC0 NC7 14 5% 0402 5% 0402
TPM_R_PP [4]
6 NC1 NC8 15 TPM_PP_FW5.51 R455 NL/0 R459 A101-2
7 NC2 NC9 17 5% 0402 4.7K J12 J13
8 NC3 NC10 29 1%_1/16W PH_2x1V_2.54mm PH_2x1V_2.54mm
11 NC4 NC11 30 0402 <Characteristic> <Characteristic>
12 NC5 NC12 31
A101-2 NC6 NC13
1 1 INFINEON_SLB9665XQ2.0 FW5.62 Change R459 from 33k to 4.7k for FAE recommend.
<-- <--

1
2

1
2
Change TPM(U19) from 1410028322-01(FW5.61) 1410028322-11 If not used H/W PP command,
to 1410028322-11(FW5.62). VQFPN32
<-- <-- please add 4.7k ohm then connect to GND.
J12(1-X) R460 J13(1-X) R461
<-- <-- INFINEON_SLB9665XQ2.0 FW5.51
0 0
5% 5%
<-- <-- PN:1410025840-11 NL/MINIJUMPER_2_2.54mm NL/MINIJUMPER_2_2.54mm
<Characteristic> 0402 <Characteristic> 0402
IC SLB9665XQ2.0 FW5.61
SW_LPC_TPM1 SW_LPC_TPM2 PN:1410028322-01
IC SLB9665XQ2.0 FW5.62
Physical Presence(PP) Pin31:
Default all OFF PN:1410028322-11
The TPM 2.0 device does not use this functionality.
For compatibility reasons (downgrade capability
to a TPM 1.2), the pin should be connected to a
jumper. The standard position of the jumper
should connect the pin to GND. ]If the pin is
Title
connected to VDD, some special commands are Port 80/ LPC PH / TPM
enabled for a TPM 1.2.
This pin does not have an internal pull-up or pull- Size Document Number Rev
down resistor and must not be left floating. SOM-DB5830 A1
Monday, October 22, 2018
Date: Sheet 23 of 34
 5 4 3 2 1

COM1 +V3.3
RS-232 Transceiver +V5
R462
+V5 @ 100mA (4mils) COM1 BOX HEADER
4.7K COM1
A101-2 5% Update COM1 of Q28 schematic for connect mistake.
0402 C231 1 2
B2B_M_RS1_TX 100nF COM1_R_RX R463 0 0402 5% COM1_RX 3 4
10%_16V COM1_R_TX R464 0 0402 5% COM1_TX 5 6
0402 7 8
+V3.3

4
9 10

26
Q28 U20 C233 C234

D1

S2
G2
2N7002KDW A101-3 180pF 180pF

VCC
Update Q28 P/N to 1310006408-01 C232 100nF 28 27 C235 100nF 50V 50V BH_5x2V_2.54mm
0402 10%_25V 24 C1+ V+ 0402 10%_25V 0402 0402 <Characteristic>
D
R465 C1- D

4.7K C236 100nF 1 3 C237 100nF

C2+ V-

G1

D2
S1
5% 0402 10%_25V 2 0402 10%_25V
0402 C2-

3
14 9
0.115A/60V RS1_TX RS1_A_TX RS1_A_TX T1IN T1OUT COM1_R_TX
R466 0 13 10
5% 0402 RS2_A_TX 12 T2IN T2OUT 11 COM2_R_TX
T3IN T3OUT
R467 4.7K
5% 0402
RS1_A_RX
RS2_A_RX
20
19
18
R2OUT
R1OUT R1IN
4
5
COM1_R_RX
COM2_R_RX
COM2 BOX HEADER
17 R2OUT R2IN 6
[4] B2B_Z_RS1_TX 16 R3OUT R3IN 7 COM2
15 R4OUT R4IN 8
R5OUT R5IN 1 2
R468 10K ONLINE# 23 22 SHDN# R469 0 COM2_R_RX R470 0 0402 5% COM2_RX 3 4
+V3.3 +V5 0402 1% ONLINE SHDN 0402 5%
PLTRST# [4,13,14,23,25] COM2_R_TX R471 0 0402 5% COM2_TX 5 6
21 7 8

GND
STATUS 9 10
C238 C239
R472 EXAR_SP3243EUEY-L 180pF 180pF

25
4.7K TSSOP28 50V 50V BH_5x2V_2.54mm
5% 0402 0402 <Characteristic>
0402

B2B_M_RS1_RX
4

6
S2

D1

Q29
G2

2N7002KDW
A101-3
Update Q29 P/N to 1310006408-01
D2

G1

S1
3

C C
0.115A/60V

RS1_RX R473 0 RS1_A_RX

5% 0402
R474 1K B2B_Y_RS1_RX
[4] B2B_Z_RS1_RX
0805 1%

COM2 (Default) / CAN (OPTIONAL) CAN Transceiver

A101-1 Fix CAN circuit
Modify Q18 and Q22 circuit based on COM Spec.
Change R238 from 1k to 0 ohm.
+V3.3 Change R475 to 2k and R481 to 1k for CAN_TX waveform abnormal.

A101-2
COM/CAN selection +V5 @ 65mA (2.6mils)
R475 A101-1 Fix CAN circuit
2K Add NOT Gate for CAN TX and RX. +V5 COM_CAN_TX(1-2) CAN_TX R476 0 5% 0402
U21
5%_1/16W
0402 1 VCC 5 10uA +V5
RS2_CAN_N_TX RS2_CAN_N_TX R477 0 RS2_CAN_N_R_TX 2 MINIJUMPER_2_2.54mm
0402 5% 3 4 RS2_CAN_TX <Characteristic> U22
GND 1 8
D RS
6

COM_CAN_TX 2 7 CAN1_D+
Q30 TI_SN74LVC1G14DCK PH_3x1V_2.54mm 3 GND CANH 6 CAN1_D-
D1

S2
G2

2N7002KDW SC70-5 <Characteristic> COM2 TX (Default) CAN_RX 4 VCC

R
CANL
VREF
5
1 RS2_A_TX
A101-3 VCC Supply voltage: Min. 1.65V ~ Max. 5.5V 2 RS2_CAN_TX TI_SN65HVD251DR
Update Q30 P/N to 1310006408-01 VI Input voltage = Min. 0 ~ Max. 5.5V 3 CAN_TX
VT+(3V)(input threshold) = Min. 1.5V ~ Max. 1.87V C240 R480 120
CAN TX (OPTIONAL)
G1

VT-(3V)(input threshold) = Min. 0.84 ~ Max. 1.14V

D2
S1

100nF 5%_1/8W
Vo Output voltage: 0~VCC (5V)
VOH(4.5V) ≒ 3.8V 10%_16V
1

B B
VOL(4.5V) ≒ 0.55V 0402
0.115A/60V

R481 1K
5% 0402

[4] B2B_RS2_CAN_TX +V3.3

10uA 5
U23
VCC 1
COM_CAN_RX(1-2)
CAN BOX HEADER
2 RS2_CAN_RX MINIJUMPER_2_2.54mm CAN1
RS2_CAN_N_RX RS2_CAN_N_RX R483 0 RS2_CAN_N_R_RX 4 3 <Characteristic>
0402 5% GND 1 2 CAN1_D-
COM_CAN_RX 3 4
4

TI_SN74LVC1G14DCK PH_3x1V_2.54mm 5 6
COM2 RX (Default) CAN1_D+
S2

D1

Q31 SC70-5 <Characteristic> 7 8

G2

2N7002KDW 1 RS2_A_RX 9 10
VCC Supply voltage: Min. 1.65V ~ Max. 5.5V 2 RS2_CAN_RX
VI Input voltage = Min. 0 ~ Max. 5.5V 3 CAN_RX
A101-3 VT+(3V)(input threshold) = Min. 1.5V ~ Max. 1.87V BH_5x2V_2.54mm
Update Q31 P/N to 1310006408-01 VT-(3V)(input threshold) = Min. 0.84 ~ Max. 1.14V CAN RX (OPTIONAL) <Characteristic>
D2

G1

S1

Vo Output voltage: 0~VCC (3.3V)

VOH(3V) ≒ 2.3V
VOL(3V) ≒ 0.4V
3

0.115A/60V

R485 0 B2B_R_RS2_CAN_RX
[4] B2B_RS2_CAN_RX
0805 1%_1/8W

A A

Title
COM Port 1-2 / CAN
Size Document Number Rev
SOM-DB5830 A1
Monday, October 22, 2018
Date: Sheet 24 of 34
5 4 3 2 1
 5 4 3 2 1

LED A101-1 20170906

Change R value for each LED brightness.
SCREW HOLE
SATA_LED1 H1 H2 H3 H4 H5
2 1 SATA_LED R493 1K 2 9 2 9 2 9 2 9 2 9
[4,26] SATA_ACT#
G 0402 1%_1/16W +V3.3 SATA LED 3 8 3 8 3 8 3 8 3 8
LTST-C191KGKT 0603 4 7 4 7 4 7 4 7 4 7
5 6 5 6 5 6 5 6 5 6
5V_SB_LED1
H4P9I8 H4P9I8 H4P9I8 H4P9I8 H4P9I8

1
2 1 5V_SB_LED R494 1.5K
D
Y 0402 1%_1/16W +V5SB +V5SB LED R488 R489 R490 R491 R492 D
LTST-C190KYKT 0603
0 0 0 0 0
3.3V_LED1 5% 5% 5% 5% 5%
2 1 3.3V_LED R495 1K
G 0402 1%_1/16W +V3.3 +V3.3 LED 0805 0805 0805 0805 0805

LTST-C191KGKT 0603

5V_LED1 H6 H7 H8 H9 H10
2 1 5V_LED R501 1.5K 2 9 2 9 2 9 2 9 2 9
G 0402 1%_1/16W +V5 +V5 LED 3 8 3 8 3 8 3 8 3 8
LTST-C191KGKT 0603 4 7 4 7 4 7 4 7 4 7
5 6 5 6 5 6 5 6 5 6
12V_LED1
2 1 12V_LED R502 2.2K H4P9I8 H4P9I8 H4P9I8 H4P9I8 H4P9I8
+V12 +V12 LED

1
G 0402 5%_1/16W
LTST-C191KGKT0603
R496 R497 R498 R499 R500
VDC_LED1 0 0 0 0 0
2 1 VDC_LED R503 2.2K 5% 5% 5% 5% 5%
G 0402 5%_1/16W +VDC +VDC LED 0805 0805 0805 0805 0805
LTST-C191KGKT 0603

GND_AUD

PROBE
Probe1 Probe2 Probe3 Probe4 Probe5
[4,13,14,23,24] PLTRST#
C 1 1 1 1 1 C
1

CB_RESET_LED1 2 2 2 2 2
G

R505 1K 1 2 3 2
+V3.3_DUAL 0402 1%_1/16W Q33 CB_RESET#_LED PH_2x1V_5.08mm PH_2x1V_5.08mm PH_2x1V_5.08mm PH_2x1V_5.08mm PH_2x1V_5.08mm
D

G
0603 LTST-C191KGKT <Characteristic> <Characteristic> <Characteristic> <Characteristic> <Characteristic>
NX7002AK 0.3A/60V

[4,26] SLP_S3#
1

SLP_S3_LED1
Button / Pin Header / Switch
G

R506 1K 1 2 3 2
+V3.3_DUAL 0402 1%_1/16W Q34 SLP_S3_LED Power button LID Switch THRM button
D

G
0603 LTST-C191KGKT
NX7002AK 0.3A/60V [4,26] PWRBTN# [4] LID# [4] EXT_THRM#

1
2

1
2
[4] SLP_S4# C241 C242
1uF PWRBTN1 1uF LID1 EXT_THRM1
1

10%_6.3V DTSM-62NQRAA 10%_6.3V 1 ESD101E65Z DTSM-62NQRAA

0402 SW4PSMD 0402 <Characteristic> SW4PSMD
SLP_S4_LED1
G

3
4

3
4
R507 1K 1 2 3 2
+V3.3_DUAL SLP_S4_LED

2
0402 1%_1/16W Q35
D

G
0603 LTST-C191KGKT
NX7002AK 0.3A/60V

B [4] SLP_S5# B
Reset button Sleep button WAKE button
1

[4,26] PM_EXTRST# [4] SLEEP# [4] PM_WAKE#

SLP_S5_LED1
G

1
2

1
2

1
2
R508 1K 1 2 3 2 C243 C244
+V3.3_DUAL 0402 1%_1/16W Q36 SLP_S5_LED 1uF SYS_RESET1 1uF SLEEP1 WAKE1
D

G
0603 LTST-C191KGKT 10%_6.3V DTSM-62NQRAA 10%_6.3V DTSM-62NQRAA DTSM-62NQRAA
NX7002AK 0.3A/60V 0402 SW4PSMD 0402 SW4PSMD SW4PSMD

3
4

3
4

3
4
A101-1 20170906
Change R value for each LED brightness.

RAPID button
2 2
[26,27,28] RAPID_SHUTDOWN# [4] BATLOW# [4] SMB_ALT#
1 1

1
2
C245
1uF RAPID1 BATLOW1 SMB_ALT1
10%_6.3V DTSM-62NQRAA PH_2x1V_2.54mm PH_2x1V_2.54mm
0402 SW4PSMD <Characteristic> <Characteristic>

3
4
BATLOW1(1-X) SMB_ALT1(1-X)

NL/MINIJUMPER_2_2.54mm NL/MINIJUMPER_2_2.54mm
<Characteristic> <Characteristic>
FM/PCB Follow SOM-DB5920 Follow SOM-DB5920
A
2 BATLOW# 從BTN SMB_ALT# 從BTN A

PCB1 [5] PEG_LAN_RV# 可改Jumper 可改Jumper

1
FM1 FM2 FM3 FM4
PEG_LAN_RV1
PEG_LAN_RV1(1-X) PH_2x1V_2.54mm
Fiducial Fiducial Fiducial Fiducial COM Express <Characteristic>
19A6583001-01 R509
NL/MINIJUMPER_2_2.54mm 1K Title
<Characteristic> 5%
LED/SCREW/PROBE/BTN/PCB/FM
0402 Size Document Number Rev
SOM-DB5830 A1
Monday, October 22, 2018
Date: Sheet 25 of 34
5 4 3 2 1
 E D C B A

PSON1 Power Setting

+V5 +V3.3 +V3.3 +V5SB +V5SB 1-2 AT Mode
2-3 ATX Mode
+V12 @ 24A ATX12V PSON1(2-3)

POWER R510 R511 PSON1

+V5 @ 15A 4.7K
0402
4.7K
0402
PH_3x1V_2.54mm
<Characteristic>
MINIJUMPER_2_2.54mm
<Characteristic>

1
2
3
ATX1 5% 5%
+V3.3 @ 20A 1 13 +V3.3_DUAL
3.3V_1 3.3V_3 RAPID_SHUTDOWN# [25,26,27,28]
-V12 not used Q37
+V5SB @ 2.5A 2
3.3V_2 -12V
14 NX7002AK
+V3.3_DUAL

1
J14(1-2)
0.3A/60V
3 15
GND_1 GND_4 SOT-23 R512

G
4 16 CN_PSON# 3 2 4.7K MINIJUMPER_2_2.54mm
4 5V_1 PSON PSON# [27] 4
5% <Characteristic>

S
U24

3
5 17 0402
GND_2 GND_5 Q38 D 5 VCC 1 TYPE2
6 18 NX7002AK 2 XOR Gate Table
5V_2 GND_6 G TYPE_PSON SLP_S3# [4,25,26]
0.3A/60V 1 R513 0 4 3 2 J14
7 19 S 0402 Jumper_1/16W GND 1 PH_2x1V_2.54mm Pin1Pin2Out
GND_3 GND_7 <Characteristic>
PWR_OK 8 20 TI_SN74LVC1G08DCK
0 0 0

2
POK NC SC70-5

TYPE2_A
9 21 +V3.3_DUAL 0 1 1
+V5SB 5VSB 5V_3 +V5 TYPE_A_PSON R514 NL/0 SLP_S3# [4,25,26]
10 22 0402 Jumper_1/16W 1 0 1
+V12 12V_1 5V_4

3
11 23 4.7K 1 1 0
12V_2 5V_5 D R515 +V3.3_DUAL
12 24 Q39 5%
3.3V GND_8 G
NX7002AK 1 0402
26 25 0.3A/60V S
26 25 SOT-23
ATX_12x2V_4.2mm Type2# Type1# Type0# COMe R3.0 SOM-DB5830 remark +V3.3_DUAL R2038 R2739

2
4.7K 4.7K
support Type 5% 5%
0402 0402

3
X X X Pin-out Type10 Support U121
Layout note: Placement close ATX1 Q161 D 5 VCC 1
TYPE2# [5]
NX7002AK 2
G TYPE0# [5]
NC NC NC Pin-out Type2 Does not support A101-2 0.3A/60V 1 4 3
+V12 +V5 +V3.3 +V5SB SOT-23 S GND

TI_SN74AHC1G86
GND NC NC Pin-out Type6 Support SOT-23-5

2
C246 C247 C248 C249 C250 C251 C252 C253
270uF 100nF 560uF 100nF 560uF 100nF 560uF 100nF GND NC GND Pin-out Type7 Does not support
20%_16V 10%_16V 20%_6.3V 10%_16V 20%_6.3V 10%_16V 20%_6.3V 10%_16V
0402 0402 0402 0402
Add schematic for TYPE2# & TYPE0# select.

3 3

+V5
+V5@16A +V5_DUAL@16A A101-1 20170906
Reserve those pin header after RD internal meeting.
24D14 VIA *16 24D14 VIA *16

1
2
3
S S S
G
4 Q40
+V5SB +V12 PE632BA
53A/30V
PDFN8 +V5_DUAL
PWRBTN Pin Header SYS RESET Pin Header
D D D D

5
6
7
8
9
R516 R517 [4,25] PWRBTN# 2 [4,25] PM_EXTRST# 2
4.7K 4.7K 1 1
1
2
3
S S S
5%_1/16W 5%_1/16W C254 C255
5VDUAL_GATE
G
0402 0402 4 Q41 560uF 100nF PWRBTN_PH1 SYS_RESET_PH1
PE537BA 20%_6.3V 10%_16V PH_2x1V_2.54mm PH_2x1V_2.54mm
C256 -33A/-30V 0402 <Characteristic> <Characteristic>
100nF PDFN8
3

D D D D
10%_16V
5
6
7
8
9

D Q42 0402 PWRBTN_PH1(1-X) SYS_RESET_PH1(1-X)

G NX7002AK
+V3.3 1 0.3A/60V
S SOT-23 NL/MINIJUMPER_2_2.54mm NL/MINIJUMPER_2_2.54mm
3

U25 <Characteristic> <Characteristic>

1 VCC 5 C257 100nF D Q43 +V5SB_CB
2

PWR_OK 2 0402 10%_16V NX7002AK

G
3 4 1 0.3A/60V
GND S SOT-23
TI_SN74LVC1G17DCKR
SC70-5 R520 SATA ACT# Pin Header Power LED Pin Header
2

<Characteristic> 100K
1%_1/16W
2
0402 +V3.3 +V5 2

[4,27] CB_PWROK

R522 R518
Follow SOM-DB5920 +V5_SB add Soft Start circuit 330 330
to fix +V5SB inrush current issue. 5% 5%
R523 NL/0 0402 0402
+V5SB 1210 Jumper_1/2W +V5SB_CB
A101-1 Phase Out for standardization HDD_LED 2 PWR_LED 2
Change from 1310003915 to 1310005815-01. 1 1
[4,25] SATA_ACT#
Q44 SATA_ACT_PH1 PWR_LED_PH1
+V5SB from PWR Supply PE537BA
9
PH_2x1V_2.54mm
<Characteristic>
PH_2x1V_2.54mm
<Characteristic>
3 8 +V5SB_CB +V5SB_CB @ 2.5A
S S S

D D D D

+V5SB @ 2.5A +V5SB 2

1
7
6
SATA_ACT_PH1(1-X)
PWR_LED_PH1(1-X)
VIA24D14 Via X 3
VIA24D14 Via X 3 5
C258 R524 NL/MINIJUMPER_2_2.54mm
G

4.7uF 1M -33A/-30V Rds(on)Max=8.5m Ohm @ -10V <Characteristic> NL/MINIJUMPER_2_2.54mm

4

10%_25V 1%_1/16W PDFN8 Rds(on)Max=14m Ohm @ -4.5V <Characteristic>

0603 0402
V5SB_GATE# 文文文文文文文
+V5SB

R525 R526
4.7K 20K
0402 1%_1/16W
5% 0402
1 1
3

D Q45
G NX7002AK
1 0.3A/60V
[25,26,27,28] RAPID_SHUTDOWN#
S SOT-23
2

Title
ATX power / +V5_DUAL
Size Document Number Rev
SOM-DB5830 A1
Monday, October 22, 2018
Date: Sheet 26 of 34
E D C B A
 5 4 3 2 1

+V5_DUAL
+V5_DUAL@ Max. 2.5A
C259 C260 C1139
+V5_DUAL@ 1.25A 100nF
10%_16V
10uF
20%_6.3V
100uF
20%_6.3V
+V3.3_DUAL@ Max. 3A
0402 0402 1206

+V5_DUAL FAE suggestion

+V3.3_DUAL@ 1.6A

2
U26
D D

VIN
R527
10K 1 8 +V3.3_DUAL
NC PGND
1%_1/16W 3.3V_LX
7 L11 2.2uH
0402 LX_1 9 8A 6.95*6.6*2.8mm
D23 1 2 RB751S40 EN_+V3.3_DUAL 6 LX_2 C261 C262
[25,26,28] RAPID_SHUTDOWN# EN
0.2A SOD-523 100nF 330uF
1300003754 10%_16V 20%_6.3V
C263 3.3V_COMP 5 4 3.3V_FB R528 31.6K 0402
COMP FB PC-7.3*4.3*1.8mm

AGND
1uF 0402 1%_1/16W
Add D23 for rapid discharge 10%_6.3V C264 27pF
0402 R529 0402 5%_50V
56.2K

3
1%_1/16W ANPEC_APW7145KAI-TRG
0402 <Characteristic>
SOP8 R530 Vout=0.8(1+(31.6/10))=3.328V
C265 10K
470pF 1%_1/16W
5%_50V 0402
0402

C C

+VDC +VDC +VDC

J16(1-2) DCIN1 DCIN2

+VDC=8.5V~19V 4 2
+VDC_MOS 1
MINIJUMPER_2_2.54mm 3 1
<Characteristic> 2
5
6
7
8
9

D D D D D
J16 Q46 ATX_2x2V_4.2mm 3
1 FDMS6681Z

2
1-2: +V12 2 +VDC_MOS_R_GATE# R531 4.7K +VDC_MOS_GATE# 4 -49A/-30V Placement close DCIN1 4
2-3: +VDC 3 0402 5%_1/16W G POWERPAK SO8 D24
S S S P6SMBJ24A
1
2
3

PLUG_4_5.00mm 24V

1
<Characteristic> <Characteristic>
PH_3x1V_2.54mm +VDC_MOS PLUG4P-5.00
1
2
3

S S S
G
4 Q47
FDMS6681Z Q48
-49A/-30V -49A/-30V
POWERPAK SO8 FDMS6681Z
D D D D D (Normal:+V12 @ 12A)
5
6
7
8
9

9
3 8
(Min.:+V4.75 @ 30A)

S S S

D D D D D
+VIN_GATE 2 7 +VIN_OUT R532 2m
1 6 2512 5%_2W +VIN
5

2
C266 C267 C1142 C1165
5
6
7
8
9

G
D D D D D POWERPAK SO8 D25 10uF 22uF 100uF 100uF

4
B B
Q49 P6SMBJ24A 10%_25V 20%_25V 20%_25V 20%_25V
J17(1-2) FDMS6681Z R533 1M CN_A_PSON# 24V 0805 0805
EC-φ6.3*7.7mm EC-φ6.3*7.7mm

1
+V12_MOS 4 -49A/-30V 0402 1%_1/16W
G POWERPAK SO8
MINIJUMPER_2_2.54mm S S S C268 10uF R534
1
2
3

<Characteristic> 0805 10%_25V 10K A101-2

J17 +V12_MOS 1%_1/16W Add C1142 & C1165 for +VIN low voltage power ripple.
1
2
3

S S S
3 change form 1uF to 10uF 0402
+V12_MOS_R_GATE# +V12_MOS_GATE# to fix +VIN inrush current issue
G
1-2: +V12 2 R535 4.7K 4 Q50
2-3: +VDC 1 0402 5%_1/16W FDMS6681Z
-49A/-30V CB_PWROK_PSON#
D D D D D POWERPAK SO8
<Characteristic>
5
6
7
8
9

PH_3x1V_2.54mm
3

D Q51
G NX7002AK
[4,26] CB_PWROK 1 0.3A/60V
S

+V12
2

P-CH MOSFET FDMS6681Z

RDS(on):3.2m Ohm @ Vgs=-10V
RDS(on):5m Ohm @ Vgs=-4.5V
R536 10K PSON_CN_GATE
0402 1%_1/16W
3

D Q52
G NX7002AK
1 0.3A/60V
S
3

D Q53
2

G NX7002AK
A [26] PSON# 1 0.3A/60V A
S
2

Title
DC IN / +V3.3_DUAL
Size Document Number Rev
SOM-DB5830 A1
Monday, October 22, 2018
Date: Sheet 27 of 34
5 4 3 2 1
 5 4 3 2 1

Rapid Shutdown
+V5SB +V5SB +V5SB

R537 R538
4.7K 4.7K
0402 0402
5% 5% 10uA
U27
1 VCC 5 C269 100nF
D D
RAPID_SHUTDOWN_L 2 0402 10%_16V
3 4 RAPID_SHUTDOWN [5,11]
GND

TI_SN74LVC1G17DCKR

3
C270 <Characteristic>
From RAPID button D Q54 100nF SC70-5
G PJA3438 10%_16V
[25,26,27] RAPID_SHUTDOWN# 1 <Characteristic> 0402
S SOT-23-3
1310006311-01

2
A101-2
Change Q54 from 1315700210-04 to 1310006311-01 for clear CMOS issue.

+V12 +V12 +V5_DUAL +V5SB_CB

+V12 Rapid Shutdown +V5_DUAL Rapid Shutdown
CAD Note:
Place close to large value Cap.
R539
680
2512
5%_1W
R540
680
2512
5%_1W
+V5SB_CB Rapid Shutdown R541
120
1210
5%_1/2W
R542
120
1210
5%_1/2W
CAD Note:
DISCHARGE_F_+V12 DISCHARGE_S_+V12 DISCHARGE_+V5_DUAL DISCHARGE_+V5SB_CB
Place close to large value Cap.

3
D Q55 D Q56 D Q57 D Q58
G NX7002AK G NX7002AK G NX7002AK G NX7002AK
RAPID_SHUTDOWN R543 10K 1 0.3A/60V 1 0.3A/60V RAPID_SHUTDOWN R544 10K 1 0.3A/60V 1 0.3A/60V
C 0402 1%_1/16W S SOT-23 S SOT-23 0402 1%_1/16W S SOT-23 S SOT-23 C

C271 C272

2
1uF 1uF
10%_6.3V 10%_6.3V
0402 0402

RAPID_SHUTDOWN_+V12 RAPID_SHUTDOWN_+V5_DUAL_SB

+V3.3 +V5
+V3.3 Rapid Shutdown +V5 Rapid Shutdown
CAD Note: R545 CAD Note: R546
Place close to large value Cap. 33 Place close to large value Cap. 120
1210 0805
5%_1/2W 5%_1/8W

DISCHARGE_+V3.3 DISCHARGE_+V5
3

3
D Q59 D Q60
G NX7002AK G NX7002AK
RAPID_SHUTDOWN R547 10K RAPID_SHUTDOWN_+V3.3 1 0.3A/60V RAPID_SHUTDOWN R548 10K RAPID_SHUTDOWN_+V5 1 0.3A/60V
0402 1%_1/16W S SOT-23 0402 1%_1/16W S SOT-23
B B
C273 C274
2

2
1uF 1uF
10%_6.3V 10%_6.3V
0402 0402

+V3.3_DUAL +VBAT_C
+V3.3_DUAL Rapid Shutdown +VBAT Rapid Shutdown
R549 CAD Note: R550
CAD Note: 100 Place close to battery. 100
Place close to large value Cap. 0805 0805
5%_1/8W 5%_1/8W

DISCHARGE_+V3.3_DUAL DISCHARGE_+VBAT
3

3
D Q61 D Q62
G NX7002AK G NX7002AK
RAPID_SHUTDOWN R551 10K RAPID_SHUTDOWN_+V3.3_DUAL 1 0.3A/60V RAPID_SHUTDOWN R552 10K RAPID_SHUTDOWN_+VBAT 1 0.3A/60V
0402 1%_1/16W S SOT-23 0402 1%_1/16W S SOT-23

C275 C276
2

2
1uF 1uF
A 10%_6.3V 10%_6.3V A
0402 0402

Title
RAPID SHUTDOWN
Size Document Number Rev
SOM-DB5830 A1
Monday, October 22, 2018
Date: Sheet 28 of 34
5 4 3 2 1
 SOM-DB5830 A101-3 PCB:19A6583002-01, 96 BOM:96965830000 Date: 2018/10/03
SOM-DB5830 A1 01-1 PCB:19A6583000-01, 96 BOM:96965830000 Date: 2017/10/13
PG6: Change re-driver USB3.1 port 0/1.
SOM-DB5830 A1 01-2 PCB:19A6583001-01, 96 BOM:96965830000 Date: 2018/03/26
PG7: Change re-driver USB3.1 port 2/3.
PG21: R519 need to mount for BUZZER function.
PG8: Change re-driver USB3.1 port 0/1.
PG20: Change SMART_FAN1 from 1655004909-01 to 1655004347 for common part.
PG9: Change re-driver USB3.1 port 2/3.
PG27: Add C1142 & C1165 for +VIN low voltage power ripple.
PG17: Change component at PG17 for LVDS sequence.
PG18: Correct name error from SW_HMDI_EQ1 to SW_HDMI_EQ1.
PG04: change J1 from 1653006504-01 to 1653002200 for duplicated part.
PG20: Update SMART_FAN1 PIN4 FANPWM schematic.
PG20: Change C202 from 0.1uF to 0.01uF for FANTACH waveform abnormal.
PG24: Update COM1 of Q28 schematic for connect mistake.
PG24: Change R475 to 2k and R481 to 1k for CAN_TX waveform abnormal.
PG11: Change SATA1~SATA4 from 1654005955 to 1654013393-01 for DFM request.
PG11: Update schematic for two SPI BIOS ROM support.
PG11: Add J3(1-2) jumper for two SPI BIOS ROM support.
PG21: Add SD_PWR_EN to CN1 PIN A86 to control SD CONN PWR.
PG26: Add schematic for TYPE2# & TYPE0# select.
PG15: Swap U7 SMB_M_CLK and SMB_M_DAT for connect mistake.
PG17: Change R2033 from +V3.3 to +V5_DUAL for +VLVDS_PANEL_PWR discharge.
PG17: Change R2034 from 1.2Kohm to 52.3ohm for +VLVDS_PANEL_PWR discharge.
PG23: Change TPM(U19) from 1410028322-01(FW5.61) to 1410028322-11(FW5.62).
PG23: Change R459 from 33k to 4.7k for FAE recommend.
PG23: Change LPC_PH1 from 1653007220 to 1653007270-01 for DFM request.
PG17: Reserve cap at LVDS signals for SI and remove Common Mode Choke.
PG09: Change HW Strap setting of equalization and flat gain for USB3.1 GEN2 TX.
PG21: Change Q27 from 1310390410-02 to 1310390410 for duplicated part.
PGXX: Change 2N7002 from 1315700214 to 1315700214-01 for part shortage issue.
PG06: Reserve Common Mode Choke co-layout for USB3.1 RX Port 0/1 signal.
PG07: Reserve Common Mode Choke co-layout for USB3.1 RX Port 2/3 signal.
PG10: Change USB20 port 4~7 Common Mode Choke from 1212003587-01 to 1212001302.
PG06: Change USB20 port 0/1 Common Mode Choke from 1212003587-01 to 1212001302.
PG07: Change USB20 port 2/3 Common Mode Choke from 1212003587-01 to 1212001302.
PG10: Change USB20 CONN USB2.0_1 from 1654012279-01 to 1654009643.
PG29: Change C84/C85/C88/C89 from X7R 4.7uF 10% 10V SMD 0805 to
X5R 4.7uF 10% 25V SMD 0603 for capacitance shortage issue.

Title
PG17: Unmount C155 for LVDS sequence. Revision History
Size Document Number Rev
PG28: Change Q54 from 1315700210-04 to 1310006311-01 for clear CMOS issue. SOM-DB5830 A1
Monday, October 22, 2018
Date: Sheet 29 of 34