Lecture-1-02.01.2025
Lecture-1-02.01.2025
COMPUTING
Memory Hierarchy Designs: Cache Recap, Virtual Memory Review, Address Translation
Cache Optimization Techniques- Improving Hit Time, Reducing Miss Penalty, Miss rate reduction techniques,
Software and Hardware Prefetching Techniques to reduce Miss Penalty
Instruction Level Parallelism: Basics, Dependences and Hazards, Dynamic Scheduling, Branch Prediction,
Hardware Speculation
Thread Level Parallelism: Software and Hardware Multithreading, Block Multithreading, Interleaved
Multithreading and Simultaneous Multithreading
Memory Centric Computing: Processing Near Memory, Emerging Memory Technology, Flash Memory, Solid State
Drives
Main Memory
Input/Output (I/O)
System Interconnection
ARITHMETIC AND LOGIC CONTROL UNIT – TAKES REGISTERS – CONTAIN
UNIT – DATA DATA, SEND IT TO DATA USED FOR
PROCESSING FUNCTIONS PROCESSING AND SEND EXECUTION
OF A COMPUTER IT TO THE OUTPUT
Motherboard
Memory System
Technique used by the operating system to provide an illusion of very large memory to the processor.
• Program and data are actually stored on secondary memory that is much larger.
• Transfer parts of program and data from secondary memory to main memory only when needed.
Thank you