HCF4099B

8 BIT ADDRESSABLE LATCH

■ SERIAL DATA INPUT - ACTIVE PARALLEL

OUTPUT
■ STORAGE REGISTER CAPABILITY -
MASTER CLEAR
■

■
CAN FUNCTION AS DEMULTIPLEXER
QUIESCENT CURRENT SPECIFIED UP TO
( s )
ct
20V DIP SOP
■ STANDARDIZED SYMMETRICAL OUTPUT
CHARACTERISTICS
d u
■ INPUT LEAKAGE CURRENT
II = 100nA (MAX) AT VDD = 18V TA = 25°C
ORDER CODES
r o
■ 100% TESTED FOR QUIESCENT CURRENT
PACKAGE

e P TUBE T&R

■ MEETS ALL REQUIREMENTS OF JEDEC

JESD13B "STANDARD SPECIFICATIONS
DIP
SOP
l e t HCF4099BEY
HCF4099BM1 HCF4099M013TR
FOR DESCRIPTION OF B SERIES CMOS
DEVICES"
s o
DESCRIPTION
O b
WRITE DISABLE is high, data entry is inhibited;
however, all 8 outputs can be continuously read
HCF4099B is a monolithic integrated circuit
) - independent of WRITE DISABLE and address

(s
fabricated in Metal Oxide Semiconductor inputs. A master RESET input is available, which

c t
technology available in DIP and SOP packages.
HCF4099B, an 8-bit addressable latch, is a
resets all bits to a logic "0" level when RESET and
WRITE DISABLE are at a high level. When

d u
serial-input, parallel output storage register that
can perform a variety of functions. Data is input to
RESET is at a high level, and WRITE DISABLE is
at a low level, the latch acts as a 1-of-8

r o
a particular bit in the latch when that bit is demultiplexer ; the bit that is addressed has an

e P
addressed (by means of input A0, A1, A2) and
when WRITE DISABLE is at a low level. When
active output which follows the data input, while all
unaddressed bits are held to a logic "0" level.

l e t
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PIN CONNECTION

October 2002 1/14

HCF4099B

IINPUT EQUIVALENT CIRCUIT PIN DESCRIPTION

PIN No SYMBOL NAME AND FUNCTION

5, 6, 7 A0 to A2 Address Inputs
9, 10, 11, 12,
Q0 to Q7 Latch Outputs
13, 14, 15, 1
3 DATA Data Inputs
2 RESET Reset Input
WRITE
4 Write Disable Input
DISABLE
8 VSS Negative Supply Voltage
16 VDD Positive Supply Voltage

( s )
u ct
FUNCTIONAL DIAGRAM
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P r
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(s )
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TRUTH TABLE r o
e P
let
SELECT INPUTS
LATCH ADDRESSED
C B A

s o L L L Q0

Ob L
L
L
H
H
L
Q1
Q2
L H H Q3
H L L Q4
H L H Q5
H H L Q6
H H H Q7

INPUTS OUTPUTS OF
EACH OTHER
ADDRESSED FUNCTION
WRITE DISABLE RESET OUTPUT
LATCH
L L D Qi0 ADDRESSABLE LATCH
L H Qi0 Qi0 MEMORY
H L D L DEMULTIPLEXER
H H L L CLEAR ALL BITS TO "0"
D: The level at the data input ; Qi0 The level before the indicated steady state input conditions were established, (i=0, 1,...7)

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 HCF4099B

LOGIC DIAGRAM

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TIMING CHART

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 HCF4099B

ABSOLUTE MAXIMUM RATINGS

Symbol Parameter Value Unit

VDD Supply Voltage -0.5 to +22 V
VI DC Input Voltage -0.5 to VDD + 0.5 V
II DC Input Current ± 10 mA
PD Power Dissipation per Package 200 mW
Power Dissipation per Output Transistor 100 mW
Top Operating Temperature -55 to +125 °C
Tstg Storage Temperature -65 to +150 °C
Absolute Maximum Ratings are those values beyond which damage to the device may occur. Functional operation under these conditions is
not implied.
All voltage values are referred to VSS pin voltage.

( s )
RECOMMENDED OPERATING CONDITIONS

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Symbol Parameter
d
Value

o
Unit

Pr
VDD Supply Voltage 3 to 20 V
VI Input Voltage 0 to VDD V
Top Operating Temperature

e t e -55 to 125 °C

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) -
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 HCF4099B

DC SPECIFICATIONS

Test Conditions Value

Symbol Parameter TA = 25°C -40 to 85°C -55 to 125°C Unit

VI VO IO VDD
(V) (V) (µA) (V)
Min. Typ. Max. Min. Max. Min. Max.
IL Quiescent Current 0/5 5 0.04 5 150 150
0/10 10 0.04 10 300 300
µA
0/15 15 0.04 20 600 600
0/20 20 0.08 100 3000 3000
VOH High Level Output 0/5 <1 5 4.95 4.95 4.95
Voltage 0/10 <1 10 9.95 9.95 9.95 V
0/15 <1 15 14.95 14.95 14.95

( s )
ct
VOL Low Level Output 5/0 <1 5 0.05 0.05 0.05
Voltage 10/0 <1 10 0.05 0.05 0.05 V
15/0 <1 15 0.05
d
0.05u 0.05
VIH High Level Input 0.5/4.5 <1 5 3.5 3.5
o 3.5

Pr
Voltage 1/9 <1 10 7 7 7 V
1.5/18.5 <1 15 11 11 11
VIL Low Level Input 0.5/4.5 <1 5

e t e
1.5 1.5 1.5
Voltage 9/1
1.5/18.5
<1
<1
10
15
o l 3
4
3
4
3
4
V

IOH Output Drive

Current
0/5 2.5 5
b s
-1.36 -3.2 -1.1 -1.1

-O
0/5 4.6 5 -0.44 -1 -0.36 -0.36
mA
0/10 9.5 10 -1.1 -2.6 -0.9 -0.9

IOL Output Sink

0/15
0/5
13.5

(
0.4
s ) 15
5
-3.0
0.44
-6.8
1
-2.4
0.36
-2.4
0.36

ct
Current 0/10 0.5 10 1.1 2.6 0.9 0.9 mA

II Input Leakage
d u
0/15 1.5 15 3.0 6.8 2.4 2.4

Current
r o 0/18 any input 18 ±10-5 ±0.1 ±1 ±1 µA

CI

e P
Input Capacitance any input 5 7.5 pF

l e t
The Noise Margin for both "1" and "0" level is: 1V min. with VDD =5V, 2V min. with VDD=10V, 2.5V min. with VDD=15V

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HCF4099B

DYNAMIC ELECTRICAL CHARACTERISTICS (Tamb = 25°C, CL = 50pF, RL = 200KΩ, tr = tf = 20 ns)

Test Condition Value (*) Unit

Symbol Parameter
VDD (V) See Timing Chart Min. Typ. Max.
tPLH tPHL Propagation Delay Time 5 200 400
(Data to Output) 10 (1) 75 150 ns
15 50 100
tPLH tPHL Propagation Delay Time 5 200 400
(Write Disable to Output) 10 (2) 80 160 ns
15 60 120
tPLH tPHL Propagation Delay Time 5 225 450

(s)
(Address to Output) 10 (9) 100 200 ns
15 75 150
tPHL Propagation Delay Time 5
c
175 t 350
(Reset to Output) 10
15
(3)

d u80
65
160
130
ns

tTHL tTLH Transition Time 5

r o 100 200
(any output) 10

e P 50 100 ns

tW Pulse WIdth (Data)

15
5
l e t 200
40
100
80

10
15
s o
(4) 100
80
50
40
ns

tW Pulse WIdth (Address) 5

10
O b (8)
400
200
200
100 ns
15
) - 125 65

(s
tW Pulse WIdth (Reset) 5 150 75

ct
10 (5) 75 40 ns

u
15 50 25
tsetup Setup Time

o
(Data to Write Disable)d 5 100 50

Pr
10 (6) 50 25 ns
15 35 20
thold Hold Time 5 150 75

e t e
(Data to Write Disable) 10 (7) 75 40 ns

o l 15 50 25

s
(*) Typical temperature coefficient for all VDD value is 0.3 %/°C.

b
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 HCF4099B

TEST CIRCUIT

( s )
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o d
CL = 50pF or equivalent (includes jig and probe capacitance)
RL = 200KΩ
P r
RT = ZOUT of pulse generator (typically 50Ω)

e te
WAVEFORM 1 : PROPAGATION DELAY TIME (f=1MHz; 50% duty cycle)
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 HCF4099B

WAVEFORM 2 : PROPAGATION DELAY TIME (f=1MHz; 50% duty cycle)

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WAVEFORM 3 : MINIMUM PULSE WIDTH, SETUP AND HOLD TIME (f=1MHz; 50% duty cycle)

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 HCF4099B

WAVEFORM 4 : MINIMUM PULSE WIDTH (f=1MHz; 50% duty cycle)

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WAVEFORM 5 : SETUP AND HOLD TIME (f=1MHz; 50% duty cycle)

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 HCF4099B

WAVEFORM 6 : INPUT WAVEFORMS (f=1MHz; 50% duty cycle)

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TIPICAL APPLICATIONS
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 HCF4099B

TIPICAL APPLICATIONS

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 HCF4099B

Plastic DIP-16 (0.25) MECHANICAL DATA

mm. inch
DIM.
MIN. TYP MAX. MIN. TYP. MAX.

a1 0.51 0.020

B 0.77 1.65 0.030 0.065

b 0.5 0.020

b1 0.25 0.010

( s )
D 20

u ct 0.787

E 8.5
d
0.335

o
Pr
e 2.54 0.100

e3 17.78

e t e 0.700

ol
F 7.1 0.280

bs
I 5.1 0.201

L 3.3

- O 0.130

( s ) 1.27 0.050

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P001C

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 HCF4099B

SO-16 MECHANICAL DATA

mm. inch
DIM.
MIN. TYP MAX. MIN. TYP. MAX.
A 1.75 0.068
a1 0.1 0.2 0.003 0.007
a2 1.65 0.064
b 0.35 0.46 0.013 0.018
b1 0.19 0.25 0.007 0.010
C 0.5 0.019
( s )
c1 45˚ (typ.)

u ct
d
D 9.8 10 0.385 0.393

o
Pr
E 5.8 6.2 0.228 0.244
e 1.27 0.050

ete
e3 8.89 0.350

ol
F 3.8 4.0 0.149 0.157
G
L
4.6
0.5
5.3

b
1.27s 0.181
0.019
0.208
0.050
M
- O
0.62 0.024
S

(s ) 8 ˚ (max.)

c t
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PO13H

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 HCF4099B

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consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from
its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications
mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information
previously supplied. STMicroelectronics products are not authorized for use as critical components in life support devices or
systems without express written approval of STMicroelectronics.
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