DEE, CEME (NUST), Rawalpindi EE-330 Digital Signal Processing

PRACTICAL WORK BOOK

For The Course
EE-330 Digital Signal Processing

For
B.E. Electrical Engineering

Group Members

Degree Syndicate

Complied By: Checked By:

Lecturer Furqan Haider Asst. Prof. Qasim Umar Khan

DEPARTMENT OF ELECTRICAL ENGINEERING

College of Electrical & Mechanical Engineering (CEME), NUST-Pakistan

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DEE, CEME (NUST), Rawalpindi EE-330 Digital Signal Processing

LIST OF EXPERIMENTS

S.NO. TITLE OF EXPERIMENT Page No.

01 Make the generalized code to generate basic signals, and 04
perform operations to check their properties.
02 Convolution of Discrete Time Systems using Flip and 17
Drag Method & implementation of Difference Equation.
03 Z-Transform and Discrete Fourier Transform. 23
04 Design of FIR filter, and System Analysis using fdatool 31
and fvtool.
05 Up-sampling and Down-sampling on Voice signals. 39
06 Introduction to Code Composer Studio and DSKC6713. 43
07 Data Acquisition, Usage and Operation of I/O Available 53
on DSKC6713.
08 Square and sine wave generation via DSK C6713. 59
09 Linear Convolution via DSKC6713. 61
10 Human Speech Analysis with LPF and HPFvia 64
DSKC6713.
11 Impulse response of first order and second order systems 66
via DSK C6713.
12 Implementation of N-point FFT on a given sequence via 70
DSK C6713.
13 Implementation of High pass and Low Pass Filtervia DSK 73
C6713.
14 Implementation of Band Pass and Band Stop Filtervia 76
DSK C6713.

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DEE, CEME (NUST), Rawalpindi EE-330 Digital Signal Processing

LIST OF EQUIPMENT

Hardware Tools Required:

1. A computer with windows XP or higher operating system.
2. DSP Starter Kit TMS320C6713 / DSP Starter Kit TMS320C6414

Software Tools Required:

1. MatLab Release 2010a or higher.
2. Code Composer Studio 5.3.0.00090

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DEE, CEME (NUST), Rawalpindi EE-330 Digital Signal Processing

Lab1(Matlab): Make the generalized code to

generate basic signals, and perform
operations to check their properties

Aim:
Aim of this lab is to get familiar with writing user friendly, generalized code to
generate all type of signals. To check causality, stability, and LTI system
properties. Also to perform shifting and flipping of signals.

Task Breakdown Marks

Write code for generating Delta, Unit step, Exponential and Sinusoidal Signal 4

Write Generalized program for shifting of signal 2

Check Causality and Stability of signals 1

Perform Flipping on Original signal 1

Plot following functions: 2

f(n) = u(n)−u(n−4)

g(n) = n·u(n)−2(n−4)·u(n−4) + (n−8)·u(n−8)

x(n) = δ(n)−2 δ(n−4)

y(n) = (0.9)n (u(n)−u(n−20))

v(n) = cos(0.12 πn) u(n)

Theory
2.2 And 2.3 topics are covered from Discrete-Time Signal Processing, 2nd Edition by
Oppenheim

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DEE, CEME (NUST), Rawalpindi EE-330 Digital Signal Processing

Explanation
Unit Step Function
The unit step function u(t) is defined as:

u(t) =1, t ≥ 0

u(t) =0, t < 0

Also known as the Heaviside step function. Alternate dentitions of value exactly at zero,

such as 1/2.

Sinusoidal Function
A sinusoidal signal is of the form

x(t) = cos(ωt + θ).

where the radian frequency is ω, which has the units of radians/s. Also very commonly
written as

x(t) = Acos(2πft + θ).

where f is the frequency in Hertz. We often refer to ω as the frequency, but it must be kept
in mind that it is really the radian frequency, and the frequency is actually f.The period of
the sinsuoid is

T =1 f=2πω

with the units of seconds.

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DEE, CEME (NUST), Rawalpindi EE-330 Digital Signal Processing

The phase or phase angle of the signal is θ, given in radians.

Exponential Function
An exponential signal is given by

x(t) = e^σt

If σ< 0 this is exponential decay. If σ> 0 this is exponential growth.

Stability
If a bounded input |x(t)|≤ Mx <∞ always results in a bounded output

|y(t)|≤ My <∞, where Mx and My are finite positive numbers, the system is Bounded Input
Bounded Output (BIBO) stable.

Causality
A causal system is one that is nonanticipative ; that is, the output may depend on current
and past inputs, but not future inputs. All ”real-time” systems must be causal, since they can
not have future inputs available to them. One may think the idea of future inputs does not
seem to make much physical sense; however, we have only been dealing with time as our
dependent variable so far, which is not always the case. Imagine rather that we wanted to
do image processing. Then the dependent variable might represent pixels to the left and

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DEE, CEME (NUST), Rawalpindi EE-330 Digital Signal Processing

right (the”future”) of the current position on the image, and we would have a noncausal
system.

Equipment:
PC installed with MATLAB

Task 1:
Write code for generating Delta, Unit step, Exponential and Sinusoidal
function, as it’s been explained above.
Don’t use Heaviside or delta function commands. Instead generate Unit step
and delta by using command of “ones” and “zeros”.

Task 2:
Take any input sequence, and starting index from user.

Input shifting index from user.

Shift sequence by using entered shifting index. (You may add “Zeros” equal to
length of shifting index)

Plot the original and shifted sequence.

Task 3:
Check Causality and Stability of sequence entered by user.

For checking causality, use “if-else” condition to check starting index, and
indices of sequence.

Display whether the sequence is Causal, Anti-causal or Non-causal.

Also calculate abs(sum) of sequence to check stability.

Task 3:
Enter original sequence, and it’s starting index from user.

Flip heights of sequence, also indices by using “fliplr”.

Note that for flipping indices use “–fliplr” command.

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DEE, CEME (NUST), Rawalpindi EE-330 Digital Signal Processing

Plot original and flipped sequences.

Task 4:
Use already made functions of delta and unit step.

Make new variables to store outputs of following functions:

f(n) = u(n)−u(n−4)

g(n) = n·u(n)−2(n−4)·u(n−4) + (n−8)·u(n−8)

x(n) = δ(n)−2 δ(n−4)

y(n) = (0.9)n (u(n)−u(n−20))

v(n) = cos(0.12 πn) u(n)

Plot all of them.

Conclusion:
In this lab MATLAB was used to write generalized codes to generate delta, unit
step, exponential, and sinusoidal sequences. Shifting, flipping, causality
checking and stability was also calculated.

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DEE, CEME (NUST), Rawalpindi EE-330 Digital Signal Processing

Lab2(Matlab): Convolution of Discrete Time

Systems using Flip and Drag Method &
Implementation of Difference Equation
Aim
Aim of this lab is to perform basic linear convolution in MATLAB using flip and method,
also to see how difference equation helps in performing the same.

Theory

Topic 2.3 &2.5of Discrete-Time Signal Processing 2ndEdition by Oppenheim, Schafer and
John R.Buck

Equipment
PC with MATLAB installed

Task Breakdown Marks

1) Convolution by flip and drag method using MATLAB code 5

2) Implement difference equation using MATLAB 5

Explanation
Convolution:
The convolution operation is implemented in MATLAB by the command conv,
provided the two sequences to be convolved are of finite length. For example, the output
sequence of an FIR system can be computed by convolving its impulse response with a given
finite-length input sequence.

Difference Equation:
The difference equation is a formula for computing an output sample at time based on
6.1
past and present input samples and past output samples in the time domain. We may write
the general, causal, LTI difference equation as follows:

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DEE, CEME (NUST), Rawalpindi EE-330 Digital Signal Processing

where is the input signal, is the output signal, and the

constants , are called the coefficients
As a specific example, the difference equation

specifies a digital filtering operation, and the coefficient

sets and fully characterize the filter. In this example, we

have .
When the coefficients are real numbers, as in the above example, the filter is said to be real.
Otherwise, it may be complex.
Notice that a filter of the form of Eq. (5.1) can use ``past'' output samples (such
as ) in the calculation of the ``present'' output . This use of past output

samples is called feedback. Any filter having one or more feedback paths ( ) is
called recursive. (By the way, the minus signs for the feedback in Eq. (5.1) will be
explained when we get to transfer functions in §6.1.)

More specifically, the coefficients are called the feedforward coefficients and

the coefficients are called the feedback coefficients.

A filter is said to be recursive if and only if for some . Recursive filters are
also called infinite-impulse-response (IIR) filters. When there is no feedback

( ), the filter is said to be anonrecursive or finite-impulse-response

(FIR) digital filter.
When used for discrete-time physical modeling, the difference equation may be referred to
as an explicit finite difference scheme.6.2
Showing that a recursive filter is LTI (Chapter 4) is easy by considering its impulse-response
representation (discussed in §5.6). For example, the recursive filter

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has impulse response , . It is now straightforward to

apply the analysis of the previous chapter to find that time-invariance, superposition, and
the scaling property hold.

Task 1
Write Generalized MATLAB code for performing convolution. Your code must
consist of following steps:

Take input x[n] from user

Take starting index of x[n]

Input impulse response h[n]

Ask for starting index of h[n]

Convolve x[n] and h[n]

Plot original, as well as convolved output signal

Use “conv” command to compare results of your convolved output with actual
output calculated by built in command.

Task 2
By using MATLAb write code for implementing following equations:

y1=3.*Step(10,-1)-6*Step(10,10)

y2=6.*Impulse(10,0)+3.*Impulse(10,-10)+2.*Impulse(10,1)

y3=2.*Step(100,100)+3.*Impulse(100,-100)

Note: Don’t use Heaviside or delta, built in commands.

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Lab3(Matlab): Z-Transform and Discrete

Fourier Transform.
Aim
Aim of this lab is to verify the properties of Fourier Transform

Theory
1) Topic 2.7,2.8 and 2.9of Discrete-Time Signal Processing 2ndEdition by
Oppenheim, Schafer and John R.Buck

Equipment
PC with MATLAB installed

Task Breakdown Marks

3) Computation of DTFT of Sinouside 3

4) Prove of all 7 properties of DTFT 7

Explanation
The discrete-time Fourier transform (DTFT) X(ejω ) of a sequence x[n] is a
continuous function of ω. Since the data in MATLAB is in vector form, X(ejω ) can only be
evaluated at a prescribed set of discrete frequencies. Moreover, only a class of the DTFT that
is expressed as a rational function in e−jω in the form

can be evaluated. In the following two projects you will learn how to evaluate and
plot the DTFT and study certain properties of the DTFT using MATLAB.

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DEE, CEME (NUST), Rawalpindi EE-330 Digital Signal Processing

DTFT Computation
The DTFT X(ejω ) of a sequence x[n] of the form of Eq. (5.1) can be computed easily

at a prescribed set of L discrete frequency points ω = ω₃ using the MATLAB function freqz.

Since X(ejω ) is a continuous function of ω, it is necessary to make L as large as possible so

that the plot generated using the command plot provides a reasonable replica of the actual
plot of the DTFT. In MATLAB, freqz computes the L-point DFT of the sequences {p0 p1 . . .
PM } and {d0 d1 . . . dM }, and then forms their ratio to arrive at X(ejωl ), l = 1, 2, . . . , L. For
faster computation, L should be chosen as a power of 2, such as 256 or 512.

Most of the properties of the DTFT can be verified using MATLAB. Since all data in
MATLAB have to be finite-length vectors, the sequences being used to verify the properties
are thus restricted to be of finite length.

Following table shows some of the commonly used properties of DTFT:

Time Frequency R
Property
domain x[n] domain X(eiω) emarks

Linearity ax[n] + by[n] aX(eiω) + bY(eiω)

in
Shift in time x[n−k] X(eiω)e−iωk
teger k

re
Shift in frequency
al
(modulation)
number a

Time reversal x[−n] X(e-iω)

Time conjugation x[n]* X(e−iω)*

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DEE, CEME (NUST), Rawalpindi EE-330 Digital Signal Processing

Time reversal &

x[−n]* X(eiω)*
conjugation

Convolve in time

Task 1

Write Generalized MATLAB code for calculation DTFT of a sinousidal signal.

Implement formula of DTFT shown as:

Take x[n] as sin(n), by taking range of n from user.

Task 2

Write MATLAB code to prove all above mentioned properties of DTFT.

Plot Magnitude and Phase plots of calculated DTFT, by using abs, and angle
command respectively.

Write down difference between original plots of mag,and phase with one, on which
you have applied properties.

Conclusion:
In this lab we learned how to calculate DTFT of any given discrete signal, moreover
some of the more commonly used properties of DTFT were successfully verified using
MATLAB.

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Lab 4(Matlab): Design of FIR filter, and

System Analysis using fdatool and fvtool

Aim
Aim of this lab is to design FIR and IIR filters using MATLAB

Theory
2) Topic 7.1-7.6of Discrete-Time Signal Processing 2ndEdition by Oppenheim,
Schafer and John R.Buck

Equipment
PC with MATLAB installed

Task Breakdown Marks

5) Computation of DTFT of Sinusoide 3

6) Prove of all 7 properties of DTFT 7

Explanation
There are different parameters on the bases of which we can analyze a system or signal in
DSP, some of them are listed below:

o Magnitude Response

o Phase Response

o Impulse Response

o Group Delay

o Pole Zero Plot

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DEE, CEME (NUST), Rawalpindi EE-330 Digital Signal Processing

Magnitude Response:

The amplitude response of an LTI filter is defined as the magnitude (or

modulus) of the (complex) filter frequency response , i.e.,

Another common name for the amplitude response is magnitude frequency response.

The real-valued amplitude response specifies the amplitude gain that

the filter provides at each frequency .No digital filter is ideal and
therefore they will always a have smooth (rather than a clearly defined
or discontinuous) transition between the pass and stop bands at the cutoff

frequency .

Figure 2: Amplitude response of different filter types.

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DEE, CEME (NUST), Rawalpindi EE-330 Digital Signal Processing

The cutoff frequency is typically defined as the frequency at which the power
transmitted by the filter drops to one-half (by -3 dB) of the maximum power
transmitted in the passband.

Phase Response:
In signal processing and electrical engineering, phase response is the relationship
between the phase of a sinusoidal input and the output signal passing through any
device that accepts input and produces an output signal, such as an amplifier or
a filter.

Amplifiers, filters, and other devices are often categorized by their amplitude and/or
phase response. The amplitude response is the ratio of output amplitude to input,
usually a function of the frequency. Similarly, phase response is the phase of the
output with the input as reference. The input is defined as zero phase. A phase
response is not limited to lying between 0° and 360°, as phase can accumulate to
any amount of time.

Group Delay:
In signal processing, group delay is a measure of the time delay of the
amplitude envelopes of the various sinusoidal components of a signal through
a device under test, and is a function of frequency for each component. Phase
delay is a similar measure of the time delay of the phase, instead of the delay of the
amplitude envelope, of each sinusoidal component.

All frequency components of a signal are delayed when passed through a device
such as an amplifier, a loudspeaker, or propagating through space or a medium,
such as air. This signal delay will be different for the various frequencies unless the
device has the property of being linear phase. (Linear phase and minimum phase are
often confused. They are quite different.) The delay variation means that signals
consisting of multiple frequency components will suffer distortion because these
components are not delayed by the same amount of time at the output of the device.
This changes the shape of the signal in addition to any constant delay or scale
change. A sufficiently large delay variation can cause problems such as
poor fidelity in audio or intersymbol interference(ISI) in the demodulation of digital

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information from an analog carrier signal. High speed modems use adaptive
equalizers to compensate for non-constant group delay.

Pole-Zero Plots:
In mathematics, signal processing and control theory, a pole–zero plot is a graphical
representation of a rational transfer function in the complex plane which helps to
convey certain properties of the system such as:

o Stability

o Causal system / anticausal system

o Region of convergence (ROC)

o Minimum phase / non minimum phase

A pole-zero plot shows the location in the complex plane of the poles and zeros of
the transfer function of a dynamic system, such as a controller, compensator, sensor,
equalizer, filter, or communications channel. By convention, the poles of the system
are indicated in the plot by an X while the zeroes are indicated by a circle or O.

A pole-zero plot can represent either a continuous-time (CT) or a discrete-time (DT)

system. For a CT system, the plane in which the poles and zeros appear is the s
plane of the Laplace transform. In this context, the parameter s represents
the complex angular frequency, which is the domain of the CT transfer function. For
a DT system, the plane is the z plane, where z represents the domain of the Z-
transform.

Infinite impulse response (IIR):

Infinite impulse response (IIR) is a property applying to many linear time-invariant
systems. Common examples of linear time-invariant systems are
most electronic and digital filters. Systems with this property are known as IIR
systems or IIR filters, and are distinguished by having an impulse response which
does not become exactly zero past a certain point, but continues indefinitely. This is
in contrast to a finite impulse response in which the impulse
response h(t) does become exactly zero at times t > T for some finite T, thus being of
finite duration.

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DEE, CEME (NUST), Rawalpindi EE-330 Digital Signal Processing

In practice, the impulse response even of IIR systems usually approaches zero and
can be neglected past a certain point. However the physical systems which give rise
to IIR or FIR responses are dissimilar, and therein lies the importance of the
distinction. For instance, analog electronic filters composed of resistors, capacitors,
and/or inductors (and perhaps linear amplifiers) are generally IIR filters. On the
other hand, discrete-time filters (usually digital filters) based on a tapped delay
line employing no feedback is necessarily FIR filters. The capacitors (or inductors) in
the analog filter have a "memory" and their internal state never completely relaxes
following an impulse. But in the latter case, after an impulse has reached the end of
the tapped delay line, the system has no further memory of that impulse and has
returned to its initial state; its impulse response beyond that point is exactly zero

Although almost all analog electronic filters are IIR, digital filters may be either IIR
or FIR. The presence of feedback in the topology of a discrete-time filter (such as the
block diagram shown below) generally creates an IIR response. The z
domain transfer function of an IIR filter contains a non-trivial denominator,
describing those feedback terms. The transfer function of an FIR filter, on the other
hand, has only a numerator as expressed in the general form derived below. All of
the coefficients (feedback terms) are zero and the filter has no finite poles.

The transfer functions pertaining to IIR analog electronic filters have been
extensively studied and optimized for their amplitude and phase characteristics.
These continuous-time filter functions are described in the Laplace domain. Desired
solutions can be transferred to the case of discrete-time filters whose transfer
functions are expressed in the z domain, through the use of certain mathematical
techniques such as the bilinear transform, impulse invariance, or pole–zero
matching method. Thus digital IIR filters can be based on well-known solutions for
analog filters such as the Chebyshev filter, Butterworth filter, and Elliptic filter,
inheriting the characteristics of those solutions.

Finite Impulse Response (FIR):

In signal processing, a finite impulse response (FIR) filter is a filter whose impulse
response (or response to any finite length input) is of finite duration, because it

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settles to zero in finite time. This is in contrast to infinite impulse response (IIR)
filters, which may have internal feedback and may continue to respond indefinitely
(usually decaying).

The impulse response of an Nth-order discrete-time FIR filter (i.e., with a Kronecker
delta impulse input) lasts for N + 1 samples, and then settles to zero.

FIR filters can be discrete-time or continuous-time, and digital or analog.

Task 1
Write a MATLAB code which implements

i. Butterworth Low Pass Filter

ii. FIR High pass filter

And show its magnitude and phase response and also display its pole zero plot.

Task 2
Using MATLAB command “fvtool” analyze the following properties of a system given
its coefficients:

 Magnitude response

 Phase Response

 Group Delay

 Pole Zero Plot

 Impulse Response

 Unit Step Response

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Lab 5(Matlab): Up-sampling and Down-

sampling on Voice signals

Aim
Aim of this lab is to implement up sampling and down sampling of a sampled signal
in time domain.

Theory
Topic 4.2 & 4.3of Discrete-Time Signal Processing 2ndEdition by Oppenheim,
Schafer and John R.Buck

Equipment
PC with MATLAB installed

Task Breakdown Marks

Implantation of Decimation by any integer value on voice signal 5

Implantation of Interpolation by any Non-integer value on voice signal 5

Explanation

Upsampling is the process of increasing the sampling rate of a signal. The

upsampled signal satisfies the Nyquist-Shannon sampling theorem if the

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original signal does. Consider a discrete signalf(k) on a radian frequency

digital frequency range.

Let L denote the upsampling factor.

1. Add L-1 zeros between each sample in f(k). Or, equivalently define
2. Filter with a low-pass filter which, theoretically, should be the sinc filter
with frequency cut off at pi/L.

Downsampling (or "subsampling") is the process of reducing the sampling rate

of a signal. This is usually done to reduce the data rate or the size of the data.

If the sampling theorem is not satisfied then the resulting digital signal will
have aliasing. To ensure that the sampling theorem is satisfied, a low-pass
filter is used as an anti-aliasing filter to reduce the bandwidth of the signal
before the signal is downsampled.

Let M denote the downsampling factor.

1. Filter the signal to ensure that the sampling theorem is satisfied. This
filter should, theoretically, be the sinc filter with frequency cutoff at
pi/M. Let the filtered signal be denoted g(k).
2. Reduce the data by picking out every Mth sample: h(k) = g(Mk). Data
rate reduction occurs in this step.

Task 1
Record your own voice for 5 sec.

Sample it at 6k and 8kHz

Plot its spectrum

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Dowasample it by any integer value

Replay the downsampled signal

Plot the spectrum and compare both plots

Task 2
Record your own voice for 5 sec.

Sample it at 6k and 8kHz

Plot its spectrum

Upsample it by any Non-integer value

Replay the Upsampled signal

Plot the spectrum and compare both plots

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Lab 6(DSP Kit): Introduction to Code

Composer Studio and DSKC6713

Aim:
Aim of this lab is to get the basic knowledge and understanding of DSP Processors and the
bases of working on Code Composer Studio

Task Breakdown Marks

Understanding of DSP Processor, Code composer Studio 10

Equipment:
 Operating System - Windows XP
 Software - CC STUDIO 3
 DSK 6713 DSP Trainer kit.
 USB Cable
 Power supply

Theory:
A digital signal processor (DSP) is an integrated circuit designed for high-speed data
manipulations, and is used in audio, communications, image manipulation, and other data-
acquisition and data-control applications. The microprocessors used in personal computers
are optimized for tasks involving data movement and inequality testing. The typical
applications requiring such capabilities are word processing, database management, spread
sheets, etc. When it comes to mathematical computations the traditional microprocessor are
deficient particularly where real-time performance is required. Digital signal processors
are microprocessors optimized for basic mathematical calculations such as additions and
multiplications.

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Fixed versus Floating Point:

Digital Signal Processing can be divided into two categories, fixed point and floating point
which refer to the format used to store and manipulate numbers within the devices. Fixed
point DSPs usually represent each number with a minimum of 16 bits, although a different
length can be used. There are four common ways that these 216 i.e., 65,536 possible bit
patterns can represent a number. In unsigned integer, the stored number can take on any
integer value from 0 to 65,535, signed integer uses two's complement to include negative
numbers from -32,768 to 32,767. With unsigned fraction notation, the 65,536 levels are
spread uniformly between 0 and 1 and the signed fraction format allows negative numbers,
equally spaced between -1 and 1. The floating point DSPs typically use a minimum of 32
bits to store each value. This results in many more bit patterns than for fixed point, 232 i.e.,
4,294,967,296 to be exact. All floating point DSPs can also handle fixed point numbers, a
necessity to implement counters, loops, and signals coming from the ADC and going to the
DAC. However, this doesn't mean that fixed point math will be carried out as quickly as the
floating point operations; it depends on the internal architecture.

C versus Assembly:

DSPs are programmed in the same languages as other scientific and engineering
applications, usually assembly or C. Programs written in assembly can execute faster, while
programs written in C are easier to develop and maintain. In traditional applications, such
as programs run on PCs and mainframes, C is almost always the first choice. If assembly is
used at all, it is restricted to short subroutines that must run with the utmost speed.

How fast are DSPs?

The primary reason for using a DSP instead of a traditional microprocessor is speed: the
ability to move samples into the device and carry out the needed mathematical operations,
and output the processed data. The usual way of specifying the fastness of a DSP is: fixed
point systems are often quoted in MIPS (million integer operations per second). Likewise,
floating point devices can be specified in MFLOPS (million floating point operations per
second).

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The DSK is USB port interfaced platform that allows to efficiently develop and test
applications for the C6713. With extensive host PC and target DSP software support, the
DSK provides ease-of-use and capabilities that are attractive to DSP engineers. The 6713
DSP Starter Kit (DSK) is a low-cost platform which lets customers evaluate and develop
applications for the Texas Instruments C67X DSP family. The primary features of the DSK
are:
 225 MHz TMS320C6713 Floating Point DSP
 AIC23 Stereo Codec
 Four Position User DIP Switch and Four User LEDs
 On-board Flash and SDRAM

TI‟s Code Composer Studio development tools are bundled with the 6713DSK providing the
user with an industrial-strength integrated development environment for C and assembly
programming. Code Composer Studio communicates with the DSP using an on-board JTAG
emulator through a USB interface. The TMS320C6713 DSP is the heart of the system. It is a
core member of Texas Instruments‟ C64X line of fixed point DSPs whose distinguishing
features are an extremely high performance 225MHz VLIW DSP core and 256Kbytes of
internal memory. On-chip peripherals include a 32-bit external memory interface (EMIF)
with integrated SDRAM controller, 2 multi-channel buffered serial ports (McBSPs), two on-
board timers and an enhanced DMA controller (EDMA). The 6713 represents the high end
of TI‟s C6700 floating point DSP line both in terms of computational performance and on-
chip resources.
The 6713 has a significant amount of internal memory so many applications will have all
code and data on-chip. External accesses are done through the EMIF which can connect to
both synchronous and asynchronous memories. The EMIF signals are also brought out to

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standard TI expansion bus connectors so additional functionality can be added on daughter

card modules. DSPs are frequently used in audio processing applications so the DSK
includes an on-board codec called the AIC23. Codec stands for coder/decoder,the job of the
AIC23 is to code analog input samples into a digital format for the DSP to process, then
decode data coming out of the DSP to generate the processed analog output. Digitial data is
sent to and from the codec on McBSP1.

DSK hardware installation

 Shut down and power off the PC
 Connect the supplied USB port cable to the board
 Connect the other end of the cable to the USB port of PC
 Plug the other end of the power cable into a power outlet
 Plug the power cable into the board
 The user LEDs should flash several times to indicate board is operational
 When you connect your DSK through USB for the first time on a Windows loaded
PC the new hardware found wizard will come up. So, Install the drivers (The CCS
CD contains the require drivers for C6713 DSK).
 Install the CCS software for C6713 DSK
 Digital Signal Processing Lab Manual Page 62 DSK hardware installation
 Shut down and power off the PC
 Connect the supplied USB port cable to the board
 Connect the other end of the cable to the USB port of PC

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DEE, CEME (NUST), Rawalpindi EE-330 Digital Signal Processing

 Plug the other end of the power cable into a power outlet
 Plug the power cable into the board
 The user LEDs should flash several times to indicate board is operational
 When you connect your DSK through USB for the first time on a Windows loaded
PC the new hardware found wizard will come up. So, Install the drivers (The CCS
CD contains the require drivers for C6713 DSK).
 Install the CCS software for C6713 DSK

Troubleshooting DSK Connectivity

If Code Composer Studio IDE fails to configure your port correctly, perform the following
steps:
Test the USB port by running DSK Port test from the start menu

Use Start Programs Texas Instruments Code Composer Studio Code

Composer Studio C6713 DSK Tools C6713 DSK Diagnostic Utilities
Select 6713 DSK Diagnostic Utility Icon from Desktop

Select Start Option

Utility Program will test the board
After testing Diagnostic Status you will get PASS

Software Installation

You must install the hardware before you install the software on your system. The
requirements for the operating platform are;
Insert the installation CD into the CD-ROM drive

An install screen appears; if not, goes to the windows Explorer and run setup.exe
Choose the option to install Code Composer Studio

If you already have C6000 CC Studio IDE installed on your PC,do not install DSK software.
CC Studio IDE full tools supports the DSK platform Respond to the dialog boxes as the
installation program runs The Installation program automatically configures CC Studio IDE
for operation with your DSK and creates a CCStudio IDE DSK icon on your desktop. To
install, follow these instructions:

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Introduction to Code Composer Studio

Code Composer is the DSP industry's first fully integrated development environment (IDE)
with DSP-specific functionality. With a familiar environment liked MS-based C++TM, Code
Composer lets you edit, build, debug, profile and manage projects from a single unified
environment. Other unique features include graphical signal analysis, injection/extraction
of data signals via file I/O, multi-processor debugging, automated testing and customization
via a C-interpretive scripting language and much more.

Code Composer Features Include:

 IDE
 Debug IDE
 Advanced watch windows
 Integrated editor
 File I/O, Probe Points, and graphical algorithm scope probes
 Advanced graphical signal analysis
 Interactive profiling
 Automated testing and customization via scripting
 Visual project management system
 Compile in the background while editing and debugging
 Multi-processor debugging
 Help on the target DSP

Useful Types of Files

You will be working with a number of files with different extensions. They include:
1. file.pjt: to create and build a project named file.
2. file.c: C source program.
3. file.asm: assembly source program created by the user, by the C compiler,or by the
linear optimizer.
4. file.sa: linear assembly source program. The linear optimizer uses file.sa as input to
produce an assembly program file.asm.
5. file.h: header support file.
6. file.lib: library file, such as the run-time support library file rts6701.lib.

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DEE, CEME (NUST), Rawalpindi EE-330 Digital Signal Processing

7. file.cmd: linker command file that maps sections to memory.

8. file.obj: object file created by the assembler.
9. file.out: executable file created by the linker to be loaded and run on the processor.

Procedure to work on code composer studio

1. Click on CCStudio 3.1 on the desktop

Now the target is not connected in order to connect Debug connect

2. To create project, Project → New

3. Give project name and click on finish.

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DEE, CEME (NUST), Rawalpindi EE-330 Digital Signal Processing

4. Click on File New Source File, To write the Source Code Enter the source
code and save the file with “.C” extension.
5. To add the c program to the project Project → Add files to project→<source file>

6. To add hello.cmd to the project Project → Add files to project → hello.cmd Path:
C:\CCstudio\tutorial\dsk6713\hello1\hello.cmd Note: Select Linker command file
(*.cmd) in Type of file

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7. To add hello.cmd to the project Project → Add files to project → hello.cmd Path:
C:\CCstudio\tutorial\dsk6713\hello1\hello.cmd Note: Select Linker command file
(*.cmd) in Type of file

8. To compile Project → Compile file (or use icon or ctrl+F7)

9. to build or link Project→ build (or use F7) (which will create a .out file in project
folder)
10. To load the program: File → Load Program →<select the .out file in debug folder in
project folder> this will load our program into the board.
11. To run the program Debug → Run
12. Observe the output in output window.
13. To see the Graph go to View and select time/frequency in the Graph, and give the
correct Start address provided in the program, Display data can be taken as per user

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Task:

No specific task for this lab except reading and practice of the tutorial

Conclusion:
In this lab DSP kits were discussed, along with their advantage, versatility and flexibility.
Introduction to Code Composer Studio was completed along with a sample example.

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Lab 7(DSP Kit): Data Acquisition, Usage

and Operation of I/O Available on
DSKC6713

Introduction to the TMS320C6713 DSP Device

The Texas Instruments TMS320C6000 DSP platform of high-performance digital

signal processors (DSPs) now includes the TMS320C6713. The C6713 brings the
highest level of performance in the C6000 DSP platform of floating-point DSPs. At
the initial clock rate of 225 MHz, the C6713 can process information at a rate of 1.35
giga-floating-point operations per second (GFLOPS). Introduced in February 1997,
the C6000 DSP platform is based on TI’s VelociTI architecture, an advanced very-
long-instruction-word (VLIW) architecture for DSPs. Advanced features of the
VelociTI architecture include instruction packing, conditional branching, and pre-
fetched branching, all of which overcome problems that were associated with
previous VLIW implementations. The architecture is highly deterministic, with few
restrictions on how or when instructions are fetched, executed, or stored. This
architectural flexibility is key to the breakthrough efficiency levels of the C6000
compiler.

TMS320C6000 Compatibility
All C6000 DSP platform devices are code-compatible with one another, with the exception
that there are some floating-point instructions that are only valid on the floating-point
(TMS320C67x ) members. The C67x DSP core employs the VelociTI architecture that is
designed to achieve high performance through increased instruction-level parallelism.
VelociTI provides eight execution units, including two multipliers and six arithmetic logic
units (ALUs). Out of eight functional units, six (L1, L2, S1, S2, M1, and M2) can perform six
floating-point operations every cycle. These functional units operate in parallel and can
perform up to eight instructions, including six floating-point operations during a single clock
cycle—up to 1800 million instructions per second (MIPS), or 1.35 GFLOPS at 225 MHz
initial device clock speed. The common architecture allows designers to begin development
with existing C6000 software tools for those devices currently in development. This also
allows for migration from one C6000 processor to another, as design specifications require.
In addition to the DSP core, many of the on-chip peripherals are common between C6000
devices. Figure 2 shows a block diagram of the C6713 device. The blocks in white are
common among members of C6700 generation of floating-point DSPs. The blocks in gray are
new peripheral/improved features available on the C6713 device.

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C6713 DSP Processor

• 32-bit Processor
• Floating Point Processor
• clock rate is 225MHz
• 1800 MIPS
• 1350 MFLOPS
• Internal Memory
– L1 264kB
– L2 256kB

AIC23 CODEC
The DSK uses a Texas Instruments AIC23 (part #TLV320AIC23) stereo codec for input
and output of audio signals. The codec samples analog signals on the microphone or
line inputs and converts them into digital data so it can be processed by the DSP.
When the DSP is finished with the data it uses the codec to convert the samples back
into analog signals on the line and headphone outputs so the user can hear the output.
The codec communicates using two serial channels, one to control the codec’s internal
configuration registers and one to send and receive digital audio samples. McBSP0 is
used as the unidirectional control channel. It should be programmed to send a 16-bit
control word to the AIC23 in SPI format. The top 7 bits of the control word should
specify the register to be modified and the lower 9 should contain the register value.
The control channel is only used when configuring the codec, it is generally idle when

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DEE, CEME (NUST), Rawalpindi EE-330 Digital Signal Processing

audio data is being transmitted, McBSP1 is used as the bi-directional data channel. All audio
data flows through the data channel. Many data formats are supported based on the three
variables of sample width, clock signal source and serial data format. The DSK examples
generally use a 16-bit sample width with the codec in master mode so it generates the frame
sync and bit clocks at the correct sample rate without effort on the DSP side. The preferred
serial format is DSP mode which is designed specifically to operate with the McBSP ports on
TI DSPs.
The codec has a 12MHz system clock. The 12MHz system clock corresponds to USB
sample rate mode, named because many USB systems use a 12MHz clock and can
use the same clock for both the codec and USB controller. The internal sample rate
generate subdivides the 12MHz clock to generate common frequencies such as
48KHz, 44.1KHz and 8KHz. The sample rate is set by the codec’s SAMPLERATE
– register. The figure below shows the codec interface on the C6713 DSK.

DipSwitch / LEDs

Four user dip switches on the DSK board can read from a program and
provides the user with a feedback control interface. Four LEDs can be
activated/deactivated from the program.

Daughter Card Interface

The DSK provides three expansion connectors that can be used to accept plug-in
daughter cards. The daughter card allows users to build on their DSK platform to
extend its capabilities and provide customer and application specific I/O. The
expansion connectors are for memory, peripherals, and the Host Port Interface (HPI)

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DEE, CEME (NUST), Rawalpindi EE-330 Digital Signal Processing

The memory connector provides access to the DSP’s asynchronous EMIF signals to
interface with memories and memory mapped devices. It supports byte addressing on
32 bit boundries. The peripheral connector brings out the DSP’s peripheral signals like
McBSPs, timers, and clocks. Both connectors provide power and ground to the
daughter card The HPI is a high speed interface that can be used to allow multiple DSPs to
communicate and cooperate on a given task. The HPI connector brings out the HPI
specific control signals. Most of the expansion connector signals are buffered so that the
daughter card cannot directly influence the operation of the DSK board. The use of TI low
voltage, 5V tolerant buffers, and CBT interface devices allows the use of either +5V or
+3.3V devices to be used on the daughter card.
Other than the buffering, most daughter card signals are not modified on the board.
However, a few daughter card specific control signals like DC_RESET and
DC_DET exist and are accessible through the CPLD DC_REG register. The DSK
also multiplexes the McBSP0 and McBSP1 of on-board or external use. This function
is controlled through the CPLD MISC register.

Code Composer Studio

Code Composer is the DSP Fully integrated development environment

(IDE) with DSP-specific functionality. Code Composer lets you edit,
build, debug, profile and manage projects from a single unified
environment. Other unique features include graphical signal analysis,
injection/extraction of data signals via C-interpretive scripting language
and much more.

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Lab 8(DSP Kit): Square and Sine Wave

Generation via DSK C6713

Aim:-
To generate a sine wave and square wave using C6713 simulator

Task Breakdown Marks

Generate Sine and Square wave by using DSP kit 10

Equipment:
 Operating System - Windows XP
 Software - CC STUDIO 3
 DSK 6713 DSP Trainer kit.
 USB Cable
 Power supply

Task:
Using CCS and DSK6713 generate the following
a. Sine Wave
b. Square Wave
And visualize it using the graph facility in CCS.

Procedure:
1. Open Code Composer Setup and select C6713 simulator, click save and quit
2. Start a new project using Project New pull down menu, save it in a separate
directory (C:\My projects) with file name sinewave.pjt
3. Create a new source file using File New Source file menu and save it in the
project folder(sinewave.c)

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DEE, CEME (NUST), Rawalpindi EE-330 Digital Signal Processing

4. Add the source file (sinewave.c) to the project Project Add files to Project Select
sinewave.c
5. Add the linker command file hello.cmd Project Add files to Project (path:
C:\CCstudio\tutorial\dsk6713\hello\hello.cmd)
6. Add the run time support library file rts6700.lib Project Add files to Project (path:
C\CCStudio\cgtools\lib\rts6700.lib)
7. Compile the program using “project Compile” menu or by Ctrl+F7
8. Build the program using “project Build” menu or by F7
9. Load the sinewave.out file (from project folder lcconv\Debug) using File Load
Program
10. Run the program using “Debug Run” or F5
11. To view the output graphically Select View Graph Time and Frequency
12. Repeat the steps 2 to 11 for square wave

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DEE, CEME (NUST), Rawalpindi EE-330 Digital Signal Processing

Lab 9(DSP Kit): Linear Convolution via DSK

C6713

Aim:
Aim of this lab is to use DSK6713 to verify the Linear Convolution using CCS.

Task Breakdown Marks

Implement Linear Convolution using DSP kit 10

Equipment:
 Operating System - Windows XP
 Software - CC STUDIO 3
 DSK 6713 DSP Trainer kit
 USB Cable
 Power supply

Task:
Use DSP kit to perform the operation of Linear Convolution

Procedure:
1. Open Code Composer Setup and select C6713 simulator, click save and quit
2. Start a new project using Project New pull down menu, save it in a separate
directory (C:\My projects) with file name linearconv.pjt
3. Create a new source file using File New Source file menu and save it in
the project folder (linearconv.c)
4. Add the source file (linearconv.c) to the project Project Add files to
Project Select linearconv.c
5. Add the linker command file hello.cmd Project Add files to Project (path:
C:\CCstudio\tutorial\dsk6713\hello\hello.cmd)

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DEE, CEME (NUST), Rawalpindi EE-330 Digital Signal Processing

6. Add the run time support library file rts6700.lib Project Add files to Project
(Path: C\CCStudio\cgtools\lib\rts6700.lib)
7. Compile the program using„project Compile menu or by Ctrl+F7
8. Build the program using project Build menu or by F7
9. Load the linearconv.out file (from project folder impulse response\Debug) using
File Load Program
10. Run the program using „Debug Run or F5
11. To view the output graphically Select View Graph Time and Frequency
12. Observe the values in the output window

Precautions:

1) Switch ON the computer only after connecting USB cable and make sure the DSP kit is
ON.
2) Perform the diagnostic check before opening code composer studio.
3) All the connections must be tight.

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Lab 10(DSP Kit): Human Speech Analysis with LPF

and HPF via DSK C6713

Aim:
Aim of this lab is to use DSK6713 to analyze human speech behavior with lowpass and
highpass filtering.

Task Breakdown Marks

Analyze Human Speech in real time with LowPass Filter and then High Pass Filter. 10

Equipment:
 Operating System - Windows XP
 Software - CC STUDIO 3
 DSK 6713 DSP Trainer kit
 USB Cable
 Power supply

Task:
Use DSP kit to perform real time convolution of human speech with lowpass filter and high
pass filter.

Procedure:
13. Open Code Composer Setup and select C6713 simulator, click save and quit
14. Start a new project using Project New pull down menu, save it in a separate
directory (C:\My projects) with file name speech.pjt
15. Design Lowpass Filter and a High Pass filter in Matlab using fdatool.
16. Import filter co-efficients to Code Composer Studio.
17. Connect mic and headphone to the DSP kit.
18. Write down code to perform real time filtering of human speech.

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DEE, CEME (NUST), Rawalpindi EE-330 Digital Signal Processing

Lab 11(DSP Kit): Impulse response of first

order and second order systems via DSK
C6713

Aim:
Aim of this lab is to use DSK6713 for complex signal processing application via finding
Impulse response of a first order and second order system.

Task Breakdown Marks

Find impulse Response of first and second order systems using DSP kit 10

Equipment:
 Operating System - Windows XP
 Software - CC STUDIO 3
 DSK 6713 DSP Trainer kit
 USB Cable
 Power supply

Task:
Write a code in C which implements
1. Impulse response of a first order system
2. Impulse response of a second order system
And implement these codes on DSK6713

Procedure:
1. Open Code Composer Setup and select C6713 simulator, click save and quit
2. Start a new project using Project New pull down menu, save it in a separate
directory (C:\My projects) with file name impulseresponse.pjt

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DEE, CEME (NUST), Rawalpindi EE-330 Digital Signal Processing

3. Create a new source file using File New Source file menu and save it in the
project folder (firstorder.c)
4. Add the source file (firstorder.c) to the project Project Add files to
Project Select firstorder.c
5. Add the linker command file hello.cmd Project Add files to Project (path:
C:\CCstudio\tutorial\dsk6713\hello\hello.cmd)
6. Add the run time support library file rts6700.lib Project Add files to Project (Path:
C\CCStudio\cgtools\lib\rts6700.lib)
7. Compile the program using project Compile‟ menu or by Ctrl+F7
8. Build the program using project Build‟ menu or by F7
9. Load the firstorder.out file (from project folder impulse response\Debug) using
File Load Program
10. Run the program using Debug Run or F5
11. To view the output graphically Select View Graph Time and Frequency
12. Repeat the steps 2 to 11 for second order

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DEE, CEME (NUST), Rawalpindi EE-330 Digital Signal Processing

Lab-12(DSP Kit): Implementation of N-point FFT

on a given sequence via DSK C6713

Aim:
To observe Magnitude Response of DFT by applying N-point FFT algorithm on a pure
sinusoid and composite signals.

Task Breakdown Marks

Apply N-FFT on a sinusoid and plot magnitude responce 10

Equipment:
 Operating System - Windows XP
 Software - CC STUDIO 3
 DSK 6713 DSP Trainer kit.
 USB Cable
 Power supply
 Speaker

Task:
Using DSK6713 and CCS compute N – FFT of a sinusoid.

Theory:

A Fast Fourier transform (FFT) is an algorithm to compute the discrete Fourier transform (DFT)
and its inverse. Fourier analysis converts time (or space) to frequency (or wavenumber) and vice
versa; an FFT rapidly computes such transformations by factorizing the DFT matrix into a
product of sparse (mostly zero) factors.[1] As a result, fast Fourier transforms are widely used
for many applications in engineering, science, and mathematics. The basic ideas were
popularized in 1965, but some algorithms had been derived as early as 1805.
 The DFT requires N2 (NxN) complex multiplications:
 Each X(k) requires N complex multiplications.
 Therefore to evaluate all the values of the DFT ( X(0) to X(N-1) ) N2
multiplications are required.
 The DFT also requires (N-1)*N complex additions:
 Each X(k) requires N-1 additions.

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DEE, CEME (NUST), Rawalpindi EE-330 Digital Signal Processing

 Therefore to evaluate all the values of the DFT (N-1)*N additions are required.

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DEE, CEME (NUST), Rawalpindi EE-330 Digital Signal Processing

Lab-13(DSP Kit): Implementation of High

pass and Low Pass Filter via DSK C6713

Aim:
To implement HPF and LPF using TMS320C6713 DSK

Task Breakdown Marks

Implement LPF and HPF using DSP kit 10

Equipment:
 Operating System - Windows XP
 Software - CC STUDIO 3
 DSK 6713 DSP Trainer kit.
 USB Cable
 Power supply
 Speaker
Procedure for REAL TIME TASKS:

Task:
Using DSK6713 and CCS implement High pass and Low Pass filter

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DEE, CEME (NUST), Rawalpindi EE-330 Digital Signal Processing

Lab14(DSP Kit): Implementation of Band

Pass and Band Stop Filter via DSK C6713

Aim:
To implement Band Pass and Band Stop Filter using TMS320C6713 DSK

Task Breakdown Marks

Implement BPF and BSF using DSP kit 10

Equipment:
 Operating System - Windows XP
 Software - CC STUDIO 3
 DSK 6713 DSP Trainer kit.
 USB Cable
 Power supply
 Speaker
Procedure for REAL TIME TASKS:

Task:
Using DSK6713 and CCS implement Band Pass and Band Stop filter

49