Debug
Debug
""
### reqres
"[]"
### compres
"False 11528"
### rrsp
""
### reqres
"[]"
### compres
"False 11528"
### rrsp
""
### reqres
"[]"
### compres
"False 11528"
### rrsp
""
### reqres
"[]"
### compres
"False 11528"
### rrsp
""
### reqres
"[]"
### compres
"False 11528"
### rrsp
""
### reqres
"[]"
### compres
"False 11528"
### rrsp
""
### reqres
"[]"
### compres
"False 11528"
### rrsp
""
### reqres
"[]"
### compres
"False 11528"
### rrsp
""
### reqres
"[]"
### compres
"False 11528"
### rrsp
""
### reqres
"[]"
### compres
"False 11528"
### rrsp
""
### reqres
"[]"
### compres
"False 11528"
### rrsp
""
### reqres
"[]"
### compres
"False 11528"
### rrsp
""
### reqres
"[]"
### compres
"False 10170"
### rrsp
""
### reqres
"[]"
### compres
"False 10628"
### rrsp
""
### reqres
"[]"
### compres
"False 10848"
### rrsp
""
### reqres
"[]"
### compres
"False 10170"
### rrsp
""
### reqres
"[]"
### compres
"False 10628"
### rrsp
""
### reqres
"[]"
### compres
"False 10848"
### rrsp
""
### reqres
"[]"
### compres
"False 11528"
### rrsp
""
### reqres
"[]"
### compres
"False 11528"
### rrsp
""
### reqres
"[]"
### compres
"False 11528"
### rrsp
""
### reqres
"[]"
### compres
"False 11528"
### rrsp
""
### reqres
"[[u'7A1003UDS22F1A0', 'NR:12:NR: SubFunction Not Supported', '0'],
[u'7A10C0STD_B2180', '61 80 35 39 30 33 52 01 31 35 33 32 35 37 35 52 34 4D 45 00
4F 83 01 01 01 88 00', '0'], [u'0410C0STD_B2180', '61 80 35 37 33 38 52 04 33 37 33
30 32 30 37 52 D2 01 12 00 00 00 02 01 00 88 00', '1'], [u'0110C0STD_B2180', '61 80
31 33 37 34 52 04 30 33 37 32 36 35 30 52 16 61 02 30 00 12 02 01 00 88 00', '2'],
[u'2710C0STD_B2180', '61 80 38 38 36 39 52 04 34 31 34 38 31 39 37 52 C8 50 90 64
00 00 02 01 00 88 00', '7'], [u'5110C0STD_B2180', '61 80 35 36 31 36 52 10 41 4E 43
31 33 37 38 52 00 62 08 05 01 00 02 01 00 88 00', '0'], [u'2610C0STD_B2180', '61 80
35 36 33 39 52 04 30 30 31 30 30 30 30 30 14 19 0B 75 0B 75 02 01 00 88 FF', '0'],
[u'0E10C0STD_B2180', '61 80 34 31 31 35 52 55 41 46 4B 30 30 30 30 30 00 17 00 02
07 D4 01 00 00 88 02', '0'], [u'0E1003UDS22F1A0', 'NR:12:NR: SubFunction Not
Supported', '0'], [u'2C10C0STD_B2180', '61 80 31 33 38 39 52 04 41 4D 52 30 30 32
32 30 04 70 04 70 00 36 01 00 00 88 00', '0'], [u'2C1003UDS22F1A0', 'NR:7F:NR:
Service Not Supported In Active Session', '0'], [u'2910C0STD_B2180', '61 80 30 32
34 30 52 04 30 34 32 30 39 36 36 52 03 04 06 04 98 16 02 01 00 88 04', '1'],
[u'291003UDS22F1A0', 'NR:12:NR: SubFunction Not Supported', '1'],
[u'C010C0STD_B2180', '61 80 38 31 31 39 52 04 30 30 31 31 34 37 33 52 14 20 07 60
07 60 02 01 00 88 FF', '0']]"
### compres
"False 11528"
### rrsp
""
### reqres
"[[u'7A1003UDS22F1A0', 'NR:12:NR: SubFunction Not Supported', '0'],
[u'7A10C0STD_B2180', '61 80 35 39 30 33 52 01 31 35 33 32 35 37 35 52 34 4D 45 00
4F 83 01 01 01 88 00', '0'], [u'0410C0STD_B2180', '61 80 35 37 33 38 52 04 33 37 33
30 32 30 37 52 D2 01 12 00 00 00 02 01 00 88 00', '1'], [u'0110C0STD_B2180', '61 80
31 33 37 34 52 04 30 33 37 32 36 35 30 52 16 61 02 30 00 12 02 01 00 88 00', '1'],
[u'2710C0STD_B2180', '61 80 38 38 36 39 52 04 34 31 34 38 31 39 37 52 C8 50 90 64
00 00 02 01 00 88 00', '0'], [u'5110C0STD_B2180', '61 80 35 36 31 36 52 10 41 4E 43
31 33 37 38 52 00 62 08 05 01 00 02 01 00 88 00', '0'], [u'2610C0STD_B2180', '61 80
35 36 33 39 52 04 30 30 31 30 30 30 30 30 14 19 0B 75 0B 75 02 01 00 88 FF', '0'],
[u'0E10C0STD_B2180', '61 80 34 31 31 35 52 55 41 46 4B 30 30 30 30 30 00 17 00 02
07 D4 01 00 00 88 02', '0'], [u'0E1003UDS22F1A0', 'NR:12:NR: SubFunction Not
Supported', '0'], [u'2C10C0STD_B2180', '61 80 31 33 38 39 52 04 41 4D 52 30 30 32
32 30 04 70 04 70 00 36 01 00 00 88 00', '0'], [u'2C1003UDS22F1A0', 'NR:7F:NR:
Service Not Supported In Active Session', '0'], [u'2910C0STD_B2180', '61 80 30 32
34 30 52 04 30 34 32 30 39 36 36 52 03 04 06 04 98 16 02 01 00 88 04', '1'],
[u'291003UDS22F1A0', 'NR:12:NR: SubFunction Not Supported', '1'],
[u'C010C0STD_B2180', '61 80 38 31 31 39 52 04 30 30 31 31 34 37 33 52 14 20 07 60
07 60 02 01 00 88 FF', '0']]"
### compres
"False 11528"