Analog Electronic Circuits (EC2.

103) : Assignment-4
Spring 2024, IIIT Hyderabad, Due date : Tue 5-Mar-2024 (18:00 Hrs)
Instructor: Prof. Abhishek Srivastava, CVEST, IIIT Hyderabad

Instructions:

1. Submit your assignment as a single pdf (Name RollNo.pdf) at moodle on or before the due date

2. Hand-written/typed (latex/word/notion/others) submissions are allowed

3. Report should be self explanatory and must carry complete solution - Answers with schematics,
SPICE directives, annotated waveforms, inference/discussion on results

4. Post your queries on moodle. Discussions are highly encouraged on moodle

1. BJT characterization

(a) Take BC547B npn transistor from the LTSPICE library and make a circuit as shown in
Fig. 1(a). Use VCC = 12 V , sweep IB from 0 to 100 µA in step size of 10 µA and plot
VBE with respect to IB . What is the forward bias emitter-base junction (EBJ) voltage
obtained from the plot? Repeat experiment for VCC = 0 to 12 V in step size of 2 V and
give superimposed plots for different VCC on same graph.
(Hint: .dc IB 0 100u 10u VCC 0 12 2)

IC1 IC2

+
+ VCE
IB VBE + V + V − + V
− CC − BE − CC
−

(a) (b)

Figure 1

(b) Use the schematic shown in Fig. 1(b) in LTSPICE and plot IC vs VBE for VCC = 12 V at
20° C, 30° C, 40° C, 50° C by sweeping VBE from 0 to 0.7 V in step size of 0.01 V. All
plots should overlay on same graphical axis.
(Hint: .dc VBE 0 0.7 0.01, .step TEMP 20 50 10 or .step TEMP LIST 20 30 40 50)
(c) For Fig. 1(a), plot IC vs VCE by sweeping VCC from 0 to 12 V in step size of 0.01 V and
sweeping IB = 0 µA to 100 µA in step size of 10 µA. Clearly mark cut-off, saturation
and active modes in your characteristic plot. Find and tabulate incremental current gain
∆IC
β = ∆I B
in saturation (at VCE = 100 mV) and active (at VCE = 600 mV) modes for
IB1 = 50 µA to IB1 = 60 µA. Comment on the reason for the difference observed.
Tabulate the current gain β = IIBC at VCE = 1 V for different values of IB . Do you observe
Early effect. Estimate the value of early voltage (VA ) from your simulations.
(Hint: slope at a point = y/x = IC /(VA + VCE ))
(d) In your exams, I will ask similar plots for a pnp transistor. Therefore practise and repeat
above experiments for pnp transistor also. (No need to submit this part)
 (e) Practise problems: All solved examples and exercise problems of Chapter-4/5 of the
reference textbook Microelectronics by Razavi. (No need to submit this part)

2. BJT amplifier analysis and design

Fig. 2 shows a common emitter (CE) voltage amplifier. Given that VCC = 12 V , CB = 10 µF ,

VCC +
−
R1 RC
CC
C
CB + vout
B
+ V CE RL
vin VBE −
− E

R2 RE CE

Figure 2

CC = 10 µF , CE = 100 µF , R1 = 18.46 kΩ, R2 = 2.24 kΩ, RE = 2 kΩ, RC = 30.3 kΩ,

RL = 1 kΩ and vin = Vm sin(2πf0 t) V, where f0 = 1 kHz. Implement the given circuit using
BC547B (NXP) in LTSPICE and simulate following:

(a) Draw the DC picture of the given circuit and calculate theoretically VC , VB , VE , IC and
IB . Find the mode of operation of BJT in the given circuit.
(Hint: For DC picture: AC sources are replaced with its internal resistance and capacitors
act as open (why?). In forward active mode, VBE is fixed (≈ 0.7 V ), IC = βIB , β for
547B you know from previous problem.)
(b) Run operating point simulation (.op) and verify your theoretical values with the simulated
values. Give a table showing theoretical and simulated values of different parameters.
(c) Calculate small signal parameters gm , rπ and r0 for the transistor.
(d) Draw the signal picture and small signal equivalent of the circuit.
(Hint: Capacitors should be replaced by its impedance values at the given frequency.)
vout
(e) Derive the expression for the small signal voltage gain (Av = vin
).
(f) Run transient analysis (.tran 50m) and plot vin and vout for Vm = 10 mV . Verify the gain
from transient simulations with the calculated gain in the previous part.
(g) Plot FFT of vout and report differences of 2nd , 3rd and 4th harmonics from the fundamental
(1 kHz) component.
(Hint: To plot FFT: on waveform viewer, right click - view - FFT)
(h) By using the parametric sweep, vary the amplitude (Vm ) of the input signal and report
total harmonic distortion from the spice error log file. Report corresponding FFT plots
also. You might observe that with increasing value of Vm , THD increases and FFT also
shows prominent harmonics. Why does it happen? Briefly comment with supporting
calculations.
(Hint: For parametric sweep: define vin = SINE(0 {Vm} 1k) (NOTE THAT ‘{}’ is must)
and use spice directive .step param Vm 10m 200m 50m. For THD: right click on schematic
editor - view - SPICE Error Log. For more details and help refer LTSPICE manual shared
earlier.)

2
 (i) Run AC analysis (.ac dec 10 1m 1G), plot magnitude and phase of Av = vvout
in
and report
DC gain (dB) and -3 dB bandwidth of the amplifier.
(Hint: Comment .tran and other analysis, For vin source in your simulation setup, give
Vm a constant value, give AC amplitude = 1)
(j) Now parametrize the resistance RC and sweep its value from 28 kΩ to 40 kΩ in step size
of 2 kΩ and run ac simulation to plot |Av | = vvout
in
. Give a table showing DC gain for
different values of RC ? Why the gain is changing? Compare two cases (30 kΩ and 40
kΩ) quantitatively and justify your answers.

3. Redesign (give values of CB , CC , CE , R1 , R2 , RE , RC , IC , IB ) the CE amplifier shown in Fig.

2 to achieve same voltage gain with same RL = 1 kΩ and same bandwidth but with reduced
supply of 5 V, that is VCC = 5 V . Show design procedure with detailed calculations and report
DC, transient and AC simulation results to verify your design. Compare the total DC power
(PDC = VCC × IDrawn ) consumed for VCC = 12 V and 5 V .