Single Phase Full Wave Silicon Controlled Rectifier with R Load
Single Phase Full Wave Silicon Controlled Rectifier with R Load
During the negative half-cycle of the AC input, the bottom two thyristors conduct, allowing
the negative half of the voltage to pass through the load, reversing the polarity of the output.
By controlling thyristor timing, the DC output voltage can be adjusted. The output is
pulsating DC with ripples, which can be reduced using capacitors or inductors for a smoother
DC supply.
These rectifiers are used in AC motor control, UPS systems, battery charging, and adjustable
DC power supplies.
1. Single Phase Full Wave Controlled Rectifier - R Load
Operation:
Positive Half-Cycle:
T1 and T2 are forward biased and triggered together.
Current flows through T1 → Load → T2 → Source.
Negative Half-Cycle:
T3 and T4 are forward biased and triggered together.
Current flows through T3 → Load → T4 → Source.
Commutation:
T1, T3 and T2, T4 are triggered at the same firing angle (α) in each cycle.
When supply voltage reaches zero, current stops, and thyristors turn off naturally
(natural commutation).
The voltage and current waveforms illustrate this operation shown in Fig. 2.
When the SCR changes from the conductive state to the off state, the load will generate energy to
maintain that SCR continue to conduct. Therefore, after the polarity of the voltage is reversed
and there is no control pulse, then the output voltage Vo < 0.
These thyristors are turned on, so the supply voltage appears across the output
terminals, forcing a constant load current Idc.
This current flows from line to neutral (defined as positive).
2. At π (Half-Cycle Transition):
3. At π + α:
4. Output Behavior:
This results in a periodic output voltage waveform that changes polarity as different pairs of
thyristors conduct, while the load current remains constant.
1. Positive Half-Cycle:
Thyristors TH1 and TH3 are forward biased and start conducting at ωt = α.
The load current flows through TH1, the motor, and TH3.
2. Beyond ωt = π:
3. Negative Half-Cycle:
Between ωt = π and ωt = 2π, thyristors TH3 and TH4 are forward biased.
At ωt = π + α, TH2 and TH4 are triggered, which reverse biases TH1 and TH3 and
naturally commutates them off.
The load current then transfers from TH1 and TH3 to TH2 and TH4.
This process repeats every cycle, and due to the high L/R ratio, the load current
remains nearly constant.
5. With an R, L, E Load:
When an SCR is conducting, the output waveform looks the same as in an RL load
rectifier.
When no SCR is conducting (Io = 0), the output voltage equals the back EMF E (i.e.,
Vo = Vdc).