M2.

Signal conditioning circuits, biopotential

amplifiers, and analog-to-digital conversion
M2.1. Why signal conditioning circuits
M2.2. First look at Operational Amplifiers (OAs)
M2.3. Inverting, follower and non-inverting OA configurations
M2.4. Common-mode voltage and difference-mode voltage
M2.5. Common-Mode Rejection Ratio (CMRR)
M2.6. Difference amplifiers
M2.7. Instrumentation amplifiers
M2.8. The Wheatstone bridge
M2.9. Current sources and transimpedance amplifiers
M2.10. The Schmitt trigger (Hysteresis)
M2.11. Square wave oscillator
M2.12. Active filters
M2.13. Analog integration and differentiation with OPAMPs
M2.14. Biopotential amplifiers
M2.15. The digital abstraction
M2.16. Computer number formats
M2.17. Analog-to-digital converters
M2.18. Basic post-ADC and pre-ADC filtering

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 M2.15. Biopotential amplifiers
The human body produces electrical signals which are of interest for medical practice. In
most cases the origin of those signals is the combination of action potentials from excitable
tissues (neurons and muscle cells). These signals are picked up by means of electrodes
which can be non-invasive (e.g. surface ECG electrodes) or invasive (e.g. needles for
electromyography)

(source: “Medical Devices and Systems”, ed. J. D. Bronzino)

(EKG)*

potentials

resistance

*(from Greek: kardia, meaning heart)

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Biopotential signals hugely vary in amplitude and frequency ranges.

(source: “Medical Devices and Systems”, ed. J. D. Bronzino)

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However, although biopotential signals hugely vary in amplitude and frequency ranges, the
problems (and solutions) for recording them are quite similar. In most cases, recording
systems only differ in gain and filtering stages.

Thus, despite we are going to focus our discussion on the electrocardiogram case, what we
will see can be extrapolated to other biopotential signals.

(image source: http://www.healthcentral.com/heart-disease/h/types-of-ecg.html)

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 A little bit about ECG…
(from Wikipedia “Electrocardiography”)
Usually, more than two electrodes are used, and they can be combined into a number of pairs (For
example: left arm (LA), right arm (RA) and left leg (LL) electrodes form the three pairs LA+RA, LA+LL,
and RA+LL). The output from each pair is known as a lead (derivació). Each lead looks at the heart
from a different angle. Different types of ECGs can be referred to by the number of leads that are
recorded, for example 3-lead, 5-lead or 12-lead ECGs (sometimes simply "a 12-lead"). A 12-lead ECG
is one in which 12 different electrical signals are recorded at approximately the same time and will often
be used as a one-off recording of an ECG, traditionally printed out as a paper copy.

(images source: Wikipedia)

Placement of the electrodes for the precordial leads
Placement of limb electrodes
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Lead I = LA-RA

(images source: Wikipedia)

(Twelve-lead ECG of a 26-year-old male)

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Schematic representation of normal
ECG (from Wikipedia)

(source: http://www.ivline.info/2010/05/quick-guide-to-ecg.html)
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BIS 2024-2025
M2.b: 8/48

(source: http://www.ivline.info/2010/05/quick-guide-to-ecg.html)
 Going back to electronics…
Therefore, from an electrical point of view, for recording ECG what we need is to measure
the potential difference between two electrodes. And, indeed, you will find small battery-
powered ECG systems that only employ two electrodes. However, desktop ECG systems
powered from the mains require that at least three electrodes are connected to the patient,
why? Because of interferences from the mains. In the next slides, we will find out how this
interferences appear. (The chest strap
transmitter contains two
electrodes)

The hand-held ECG monitor by OMRON is an example of a Wireless EKG heart rate monitors are also examples
two-electrode biopotential system of two-electrode biopotential measurements
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 Let’s model first the case of a battery-powered system with very short wires:

Line conductor of the mains

ECG voltage signal across
the two electrodes

This is ground (earth) Parasitic capacitances

are low because wires
are very short

Note that the two electrodes are simply modeled as resistors and that the human body
is also modeled with resistors.
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 The signal at the ECG recorder (V(+)-V(-)) looks very good

(original signal)

(signal at recorder
input)

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Now let’s assume longer wires:

Parasitic capacitances
now are significantly
larger (100)

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The recorded signal still looks very good

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But now let's assume the parasitic capacitances are not matched, which is very likely…

we modify this to 2 pF

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And now the mains starts to interfere:

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Interference appears because impedance mismatching between both wires causes a
voltage difference from the mains voltage (unbalanced voltage dividers).

Voltage from the mains

here (through the
voltage divider) is
larger than here

(As we will see in the next slides, the interference does not come directly from the mains, it comes from
the voltage that appears across the patient due to the mains.)
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Such mismatching greatly increases if the ECG system is powered from the mains
because a new path is established to earth. Even including an isolation transformer the
interference will be very significant…

This is the ECG

recorder ground

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Now the interference is really disruptive:

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Note that even if we suppress the parasitic capacitances of the wires, the presence of
coupling between the ECG system ground and the earth is going to be disruptive due
to the voltage from the mains at the patient.
The way to solve this is to use differential amplification, which implies three wires (and
electrodes).

Now these two wires

have the same
impedance to earth
(and it is very high)
+
VD/2

Common mode
voltage due to
mains coupling at +
patient
VD/2

VC

ground of the ECG system

CPATIENT-EARTH
CISOLATION

M2.b: 20/48
And indeed, with an ideal differential amplifier it works perfectly:

BIS 2024-2025
Due to limited CMRR and limited input impedances, a real differential amplifier (an
instrumentation amplifier) won’t work so nicely:

BIS 2024-2025
It needs to be taken into account that the common mode voltage at the patient can be
transformed into differential voltage at the amplifier input due to impedance mismatches
(particularly at the electrodes). Let’s see a numerical example (exercise) that analyzes
both mechanisms of interference at the output of biopotential amplifier…

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A patient is attached to an encephalograph (EEG) recorder. Three identical electrodes are used: two
of them for picking up the differential voltage due to the EEG and one as the ground electrode.
Previously, it has been measured that these electrodes have a contact impedance of 1000  with an
tolerance of ±50%. The input impedance of each differential input of the EEG machine to ground is
10 M, and the instrument has a CMRR of 80 dB. The power-line displacement current through the
patient is measured and has an amplitude of 400 nA. The amplitude of the patient’s EEG is 10 μV

Exercise: Calculate the maximum power-line interference seen on the patients’ EEG due to common-
mode voltage at patient caused by the power-line displacement current through the patient (assume
tissue impedances are 0 ; as seen in the above drawings).
BIS 2024-2025
 1. The first thing we need to compute is the
maximum common-voltage at the patient (VCM).
According to the circuit on the right this voltage will
be:

VCM = REGMAX  power_line_displacement_current

= 1500   400 nA = 0.6 mV

Due to the unbalance between the RE1/Rin+ and

RE2/Rin- voltage dividers (because RE1 RE2),
this common-voltage VCM will cause a differential
voltage at the differential input of the EEG machine
which will be amplified (amplification factor not
specified). In the worst scenario (maximum
difference between RE1 and RE2) we will have
that the differential voltage created by this common
voltage is:

 Rin + Rin − 
VD = V 
CM _ MAX  −  = ...
 Rin + + REMIN Rin + + REMAX
VCM


 10M 10M 
... = 0.6mV −  = 0.06 μV
 10M + 0.5k 10M + 1.5k 

Thus, this interference magnitude (0.06 μV) may be considered negligible if compared with the
magnitude of the signal (10 μV) which is only slightly attenuated by the voltage dividers.
BIS 2024-2025
 2. In addition to the transformation from
common-mode voltage to differential voltage
at the input of the amplifier due to electrode
impedance mismatches, we will also have the
contribution of the limited CMRR of the
amplifier (80 dB). The ratio between the
differential gain (Gd) and the common-mode
gain (Gc) will be:

CMRR 80
GD
= 10 20
= 10 20
= 10 4 = 10000
GC

That is, the common voltage at the input (0.6 mV) will be attenuated 10000 times with respect to the
differential signal. Thus, the 0.6 mV of common voltage would be equivalent to a differential
interference signal of 0.06 μV at the input. Again this interference magnitude (0.06 μV) may be
considered negligible if compared with the magnitude of the signal (10 μV).

BIS 2024-2025
The common mode voltage at the patient can be minimized by “driving” the reference
electrode connected to the patient.

(source: “Medical Devices and Systems”, ed. J. D. Bronzino)

Here the voltage is the
common voltage with
respect to the ECG
ground

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Such strategy is for instance suggested at the LT1167 datasheet for implementing a nerve
recording amplifier:

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Let’s see the effect of modeling the “driving” the reference electrode connected to the patient:

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Without “driving” the reference electrode connected to the patient:

“Driving” the reference electrode connected to the patient:

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 M2.15. The digital abstraction
Voltage and current signals are continuous in time and value. However, their values can be
discretized into sets of values. That is, the signal values that fall within some interval can
be lumped into a single value (level) that can be associated to a numeric symbol. This
simple idea forms the basis of digital electronics. Among other important advantages
compared to analog electronics, digital electronics provides much better noise
immunity for data transmission.

(source: “Foundations of Analog and Digital Electronic Circuits”)

Only two levels are currently used in digital electronics. These levels are represented by
the Boolean logic levels “0” and “1” (or alternatively by “FALSE” and “TRUE”) M2.b: 31/48
 M2.16. Computer number formats
A sequence of binary values (i.e. sequence of bits) in a digital line or a combination of
binary values from a bundle of digital lines can represent an unsigned integer. That is,
groups of bits can represent numbers.
value

I0 0 (LSB)
I0
I2 1
I3 0
time
0 1 0 1 1 (MSB)
I4
(LSB) (MSB)

In these examples the number 1010 (10 in decimal representation) is transmitted in

series (left) and in parallel (right)

(MSB: most significant bit; LSB: least significant bit)

The binary representation is simply a string of 1s an 0s that are understood to multiply

successive powers of 2:

Decimal representation: 1340 = 1×103 + 3×102 + 4×101 + 0×100 = 134010

Binary representation: 11012 = 1×23 + 1×22 + 0×21 + 1×20 = 810+ 410 + 010 + 110 = 1310

This binary (or base-2) number has 4 bits.

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Binary representation: 11012 = 1×23 + 1×22 + 0×21 + 1×20 = 810+ 410 + 010 + 110 = 1310

To convert a number from decimal notation to binary notation divide repeatedly the number
by 2 and annotate the reminders in inverse order.

13/2 = 6 reminder 1,
6/2 = 3 reminder 0,
3/2 = 1 reminder 1,
1/2 = 0 reminder 1,

1310 = 11012

(Most scientific calculators allow conversions from decimal to binary and vice versa)

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 Hexadecimal representation

Because binary numbers can be inconveniently long, it is common to write them in

hexadecimal representation (base 16) in groups of 4 bits. The letters A to F are used to
represents the values 10 to 15.
70710 = 10110000112 = (0010 1100 00112) = 2C3h (=0x2C3)

12ABCDEFh=000100101010101111001101111011112
= (0001 0010 1010 1011 1100 1101 1110 11112)

From “The Art of Electronics”, 3rd edition: “Hexadecimal representation is well suited to the
popular “byte” (8-bit) organization of computers, which are most often organized as 16,
32, or 64-bit computer “words”; a word is then 2, 4, or 8 bytes. So in hexadecimal, each
byte is 2 hex digits, a 16-bit word is 4 hex digits, etc. For example, the memory locations in
a microcontroller with 65,536 (“64K”) bytes of memory can be identified by a 2-byte
address, because 216=65,536; the lowest address in hex is 0000h (the trailing “h” means
hex), the highest address is FFFFh, the second half of memory begins at 8000h, and the
fourth quarter of memory begins at C000h.”

Nibble: term used sometimes to refer to a group of four bits (half of a byte).
Byte: group of 8 bits (an octet). Standards specify “B” (upper case) as the symbol for the
byte (as opposed to “b” lower case for the bit)
Word: group of bits of a fixed size. Nowadays it usually corresponds to 16 bits (2 bytes).
The terms “double word” or “dword” (4 bytes) and “quad word” or “qword” (8 bytes) are
also used. M2.b: 34/48
BIS 2024-2025
 Character encoding

From “The Art of Electronics”, 3rd edition: “A byte sitting somewhere in computer memory
can represent an integer number, or part of a number. But it can also represent other
things: for example, an alphanumeric character (letter, number, or symbol) is commonly
represented as one byte. In the widely used ASCII representation, lowercase “a” is
represented as ASCII value 01100001 (61h), “b” is 62h, etc. Thus the word “nerd” could be
stored in a pair of 16-bit words whose hex values are 6E65h and 7264h”

Although it is highly inefficient, in some cases it may be interesting to store and transmit
the digits of the number as characters. For instance, instead of sending 1210 ( = 11002) we
would send the characters “1” and “2” which would correspond to 4910 and 5010
(001100012 and 001100102)

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BIS 2024-2025 M2.b: 36/48
 Two’s complement representation

Two’s complement representation is the most common method to represent signed

integers on computers.

The 2’s complement of a N-bit number is:

▪ If positive (or zero), the 2’s complement is simply the unsigned binary representation
▪ If negative, complement (switch 0s to 1s and vice versa) all bits of the magnitude in
binary format and add 1. Example: -210 = 101+001 =1102’s comp

Two's-complement has the advantage that operations of addition, subtraction, and

multiplication are identical to those for unsigned binary numbers.

Decimal 2’s comp

3 011
Example: -3+2=-1
2 010
101 (-310)
1 001 +010 ( 210)
0 000 111 (-110)
-1 111

-2 110

-3 101

-4 100
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 M2.17. Analog-to-digital converters

Stimulus

conversion into amplification vin #

sensor voltage signal + range shift filtering ADC

Vref #
Signal conditioning

vin

ADC input range

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 Quantization
ADCs quantize the input signal (generally a voltage) into digital values.

Quantization implies limited resolution → resolution uncertainty → quantization uncertainty

± 0.5 LSB
1LSB (least significant bit) = VFSR/2N,
where VFSR is the full-scale range and N is the resolution of the ADC in bits
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 VIN

0.5 LSB
QUANTIZATION
ERROR
(due to limited -0.5 LSB
resolution)

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(from “Introduction to Engineering Experimentation”, A.J. Wheeler and A. R. Ganji)
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Example: A 16-bit A/D converter has an input range of 0 to 5 V. Estimate the quantization
error for an input of 1.360000 V

According to the presented expressions, if the input voltage is 1.36 V then digital code will be:

 V − Vrl N  13.6 − 0 16 
D0 = int  i 2  = int  2  = int 17825.792 = 17826
 ru
V − V rl   5 − 0 

Which expressed in the binary number system would be 0100 0101 1010 0010
and in hexadecimal would be 45A2

This code would correspond to the following input:

V −V  5−0
Vi ' = D0  ru N rl  + Vrl = 17826 16  + 0 = 1.360015869140625 [V]
 2   2 

So, the error would be 15.87 μV which is 0.0011% of the reading.

Note that this error is within the uncertainty range due to the limited resolution of
the ADC = ± (1/2)*(5/2^16)= ±38.1 μV

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Example: A temperature sensor with a sensitivity of 10 mV/ºC will be used to measure temperatures between
0 ºC and 100 ºC. If a 0.1 ºC resolution is required, determine the input range and the minimum number of
bits for a suitable ADC

Since it is not otherwise indicated, we have to assume that the sensor has a linear transfer function of the type
S = a+b s
; where s is the stimulus (i.e. the temperature), S is the output (i.e. voltage), b is the sensitivity (10 mV/ºC)
and a is the zero (i.e. the offset). Then, since no offset is indicated, we have to assume a=0 V

Therefore, the maximum and minimum voltages given by the sensor will be
Vm ax = a + b sm ax = 0 + 0.01 V/º C 100 º C = 1 V
Vmin = a + b smin = 0 + 0.01 V/º C  0º C = 0 V
And this (0 to 1 V) will be the required input range for the ADC.

A change of 0.1ºC, which is the requested resolution for the system, will produce a voltage change of

V = b s = 0.01 V/º C  0.1 º C = 0.001V

 Vru − Vrl 
Thus , the resolution of the ADC, which is   has to be smaller than 1 mV
 
N
2
 Vru − Vrl   1   1 
   0.001   N   0.001   2 
N

 2  2   0.001 
N

log 2 (1000)  N 
log 10 1000 3
N  N  N  9.96
log10 2 0.30103
And since N has to be an integer then Nmin=10. In conclusion, it is required a 10 bit ADC with an input
range from 0 to 1 V.
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 Time sampling
Digital acquisition not only involves discrete (i.e. uncontinuous) amplitude values but also
discrete times.

Generally, time sampling is performed before amplitude quantification as most ADCs

require stable inputs in order to operate properly.

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 Sample & Hold circuit

Transistor gate
(a voltage activated switch)

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 M2.18. Basic post-ADC and pre-ADC filtering
The most common post-ADC signal processing step consists in averaging the signal in
order to remove as much noise as possible from the signal.
Averaging is a case of low-pass digital filtering.

Simple averaging
(a special case of FIR filtering)

Note that averaging filters have notches at regular intervals. These notches
can be put to good use in filtering out strong signals such as power-line interference.
(from http://www.ti.com/lit/ml/slap103/slap103.pdf)

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 “Exponential” averaging
(a special case of IIR filtering)

The response of an exponential filter can easily be varied from weak filtering with a quick step response
(fast settling time) to strong filtering with a slow step response by varying the alpha coefficient.
This is a useful feature for many measurement systems. For example, in weigh scales, it is desirable to
obtain a reading right away when a weight is placed on the scale. As more samples are taken, however,
the weight can be determined more precisely by further averages. The exponential averager can be set to
a high alpha when the scale is first loaded, and over time the alpha can be decreased to obtain more
precise results.
(from http://www.ti.com/lit/ml/slap103/slap103.pdf)

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 Aliasing phenomenon in low frequency data acquisition

(Frequency spectrum the

original continuous signal)

Frequency spectrum of
a sampled signal

“If a function x(t) contains no frequencies higher than B Hz, it is completely determined by
giving its ordinates at a series of points spaced 1/(2B) seconds apart.” (Nyquist-Shannon Theorem)

Thus, the bandwidth of the input

signal before sampling must be
filtered to remove components at Frequency spectrum
frequencies larger than (1/2TS) so of a sampled signal
that aliasing is prevented. affected by aliasing

But, when sampling very low frequency signals (B << FS), as it will be the case in most
measurement systems, is it necessary or convenient to include a anti-aliasing LPF filter before
the ADC?
Yes, otherwise, noise and interferences at frequencies FS and above will be overlapped with
the low frequency signal of interest.
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