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MJD243-D

The document provides specifications for the MJD243 (NPN) and MJD253 (PNP) complementary silicon power transistors, designed for low voltage, low-power, high-gain audio amplifier applications. Key features include high DC current gain, low collector-emitter saturation voltage, and compliance with AEC-Q101 for automotive applications. Maximum ratings and thermal characteristics are detailed, along with electrical characteristics and safe operating area curves for reliable operation.

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0% found this document useful (0 votes)
13 views

MJD243-D

The document provides specifications for the MJD243 (NPN) and MJD253 (PNP) complementary silicon power transistors, designed for low voltage, low-power, high-gain audio amplifier applications. Key features include high DC current gain, low collector-emitter saturation voltage, and compliance with AEC-Q101 for automotive applications. Maximum ratings and thermal characteristics are detailed, along with electrical characteristics and safe operating area curves for reliable operation.

Uploaded by

isanio200
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PDF, TXT or read online on Scribd
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DATA SHEET

www.onsemi.com

Complementary Silicon 4.0 A, 100 V, 12.5 W


POWER TRANSISTOR
Plastic Power Transistors
COMPLEMENTARY
DPAK−3 for Surface Mount Applications
COLLECTOR COLLECTOR
MJD243(NPN), 2, 4 2, 4

MJD253(PNP) 1 1
Designed for low voltage, low−power, high−gain audio amplifier BASE BASE
applications.
3 3
EMITTER EMITTER
Features
 High DC Current Gain
4
 Lead Formed for Surface Mount Applications in Plastic Sleeves
(No Suffix)
4
 Straight Lead Version in Plastic Sleeves (“−1” Suffix)
 Low Collector−Emitter Saturation Voltage 1
1 2
2
 High Current−Gain − Bandwidth Product 3 3
 Annular Construction for Low Leakage IPAK DPAK−3
 Epoxy Meets UL 94 V−0 @ 0.125 in CASE 369D CASE 369C
STYLE 1 STYLE 1
 NJV Prefix for Automotive and Other Applications Requiring
Unique Site and Control Change Requirements; AEC−Q101
MARKING DIAGRAM
Qualified and PPAP Capable
 These Devices are Pb−Free, Halogen Free/BFR Free and are RoHS
Compliant
AYWW AYWW
MAXIMUM RATINGS J253G J2x3G

Rating Symbol Value Unit


Collector−Base Voltage VCB 100 Vdc IPAK DPAK

Collector−Emitter Voltage VCEO 100 Vdc


A = Assembly Location
Emitter−Base Voltage VEB 7.0 Vdc Y = Year
Collector Current − Continuous IC 4.0 Adc WW = Work Week
x = 4 or 5
Collector Current − Peak ICM 8.0 Adc
G = Pb−Free Package
Base Current IB 1.0 Adc
Total Device Dissipation PD ORDERING INFORMATION
@ TC = 25C 12.5 W
Derate above 25C 0.1 W/C See detailed ordering and shipping information in the package
dimensions section on page 6 of this data sheet.
Total Device Dissipation PD NOTE: Some of the device on this data sheet have been
@ TA = 25C (Note 2) 1.4 W DISCONTINUED. Please refer to the table on page 6.
Derate above 25C 0.011 W/C
Operating and Storage Junction TJ, Tstg −65 to +150 C
Temperature Range
ESD − Human Body Model HBM 3B V
ESD − Machine Model MM C V
Stresses exceeding those listed in the Maximum Ratings table may damage the
device. If any of these limits are exceeded, device functionality should not be
assumed, damage may occur and reliability may be affected.
1. When surface mounted on minimum pad sizes recommended.

 Semiconductor Components Industries, LLC, 2013 1 Publication Order Number:


December, 2024 − Rev. 18 MJD243/D
MJD243 (NPN), MJD253 (PNP)

THERMAL CHARACTERISTICS

ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ Characteristic Symbol Value Unit

ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
Thermal Resistance
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
Junction−to−Case
Junction−to−Ambient (Note 2)
RqJC
RqJA
10
89.3
C/W

2. When surface mounted on minimum pad sizes recommended.

ELECTRICAL CHARACTERISTICS (TC = 25C unless otherwise noted)


Characteristic Symbol Min Max Unit

OFF CHARACTERISTICS
Collector−Emitter Sustaining Voltage (Note 3) VCEO(sus) Vdc
(IC = 10 mAdc, IB = 0) 100 −

Collector Cutoff Current ICBO


(VCB = 100 Vdc, IE = 0) − 100 nAdc
(VCB = 100 Vdc, IE = 0, TJ = 125C) − 100 mAdc

Emitter Cutoff Current IEBO nAdc


(VBE = 7.0 Vdc, IC = 0) − 100

DC Current Gain (Note 3) hFE −


(IC = 200 mAdc, VCE = 1.0 Vdc) 40 180
(IC = 1.0 Adc, VCE = 1.0 Vdc) 15 −

Collector−Emitter Saturation Voltage (Note 3) VCE(sat) Vdc


(IC = 500 mAdc, IB = 50 mAdc) − 0.3
(IC = 1.0 Adc, IB = 100 mAdc) − 0.6

Base−Emitter Saturation Voltage (Note 3) VBE(sat) Vdc


(IC = 2.0 Adc, IB = 200 mAdc) − 1.8

Base−Emitter On Voltage (Note 3) VBE(on) Vdc


(IC = 500 mAdc, VCE = 1.0 Vdc) − 1.5

DYNAMIC CHARACTERISTICS
Current−Gain − Bandwidth Product (Note 4) fT MHz
(IC = 100 mAdc, VCE = 10 Vdc, ftest = 10 MHz) 40 −

Output Capacitance Cob pF


(VCB = 10 Vdc, IE = 0, f = 0.1 MHz) − 50
Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product
performance may not be indicated by the Electrical Characteristics if operated under different conditions.
3. Pulse Test: Pulse Width = 300 ms, Duty Cycle [ 2%.
4. fT = hFE ftest.

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2
MJD243 (NPN), MJD253 (PNP)

TA TC
2.5 25 10
500ms
5

IC, COLLECTOR CURRENT (AMPS)


100ms
PD, POWER DISSIPATION (WATTS)

2 20 2 1ms
1

1.5 15 0.5 5ms dc


TA (SURFACE MOUNT)
0.2 BONDING WIRE LIMITED
1 10 0.1 THERMALLY LIMITED @ TC = 25C
TC (SINGLE PULSE)
0.05 SECOND BREAKDOWN LIMITED
0.5 5 CURVES APPLY BELOW
0.02
RATED VCEO
0 0 0.01
25 50 75 100 125 150 1 2 5 10 20 50 100
VCE, COLLECTOR-EMITTER VOLTAGE (VOLTS)
T, TEMPERATURE (C)
Figure 2. Active Region Maximum
Figure 1. Power Derating Safe Operating Area

There are two limitations on the power handling ability of The data of Figure 2 is based on TJ(pk) = 150C; TC is
a transistor: average junction temperature and second variable depending on conditions. Second breakdown pulse
breakdown. Safe operating area curves indicate IC − VCE limits are valid for duty cycles to 10% provided TJ(pk)
limits of the transistor that must be observed for reliable  150C. TJ(pk) may be calculated from the data in Figure 3.
operation; i.e., the transistor must not be subjected to greater At high case temperatures, thermal limitations will reduce
dissipation than the curves indicate. the power that can be handled to values less than the
limitations imposed by second breakdown.

1
0.7
D = 0.5
0.5
RESISTANCE (NORMALIZED)
r(t), TRANSIENT THERMAL

0.3 0.2
0.2 0.1 P(pk)
RqJC(t) = r(t) qJC
0.05 RqJC = 10C/W MAX
0.1 D CURVES APPLY FOR POWER
0.07 PULSE TRAIN SHOWN t1
0.02
0.05 READ TIME AT t1 t2
0.01
TJ(pk) - TC = P(pk) qJC(t)
0.03 DUTY CYCLE, D = t1/t2
0 (SINGLE PULSE)
0.02

0.01
0.02 0.05 0.1 0.2 0.5 1 2 5 10 20 50 100 200
t, TIME (ms)

Figure 3. Thermal Response

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3
MJD243 (NPN), MJD253 (PNP)

NPN PNP
MJD243 MJD253

500 200
TJ = 150C VCE = 1.0 V TJ = 150C VCE = 1.0 V
300 VCE = 2.0 V
VCE = 2.0 V 100
200
70 25C
hFE, DC CURRENT GAIN

hFE, DC CURRENT GAIN


25C 50
100
-55C -55C
70 30
50 20

30
10
20
7.0
5.0
10
7.0 3.0
5.0 2.0
0.04 0.06 0.1 0.2 0.4 0.6 1.0 2.0 4.0 0.04 0.06 0.1 0.2 0.4 0.6 1.0 2.0 4.0
IC, COLLECTOR CURRENT (AMP) IC, COLLECTOR CURRENT (AMP)
Figure 4. DC Current Gain

1.4 1.4
TJ = 25C TJ = 25C
1.2 1.2

1.0 1.0
V, VOLTAGE (VOLTS)

V, VOLTAGE (VOLTS)

VBE(sat) @ IC/IB = 10
0.8 VBE(sat) @ IC/IB = 10 0.8

0.6 VBE @ VCE = 1.0 V 0.6 VBE @ VCE = 1.0 V

0.4 IC/IB = 10 0.4 IC/IB = 10


5.0 5.0
0.2 0.2
VCE(sat) VCE(sat)
0 0
0.04 0.06 0.1 0.2 0.4 0.6 1.0 2.0 4.0 0.04 0.06 0.1 0.2 0.4 0.6 1.0 2.0
4.0
IC, COLLECTOR CURRENT (AMP) IC, COLLECTOR CURRENT (AMP)
Figure 5. “On” Voltages

+2.5
V, TEMPERATURE COEFFICIENTS (mV/ C)

V, TEMPERATURE COEFFICIENTS (mV/ C)

+2.0 *APPLIES FOR IC/IB  hFE/3


+1.5
+1.0 25C to 150C
+0.5 *qVC FOR VCE(sat)
0
-55C to 25C
-0.5
-1.0 25C to 150C -1.0 25C to 150C
-1.5 -1.5
-55C to 25C qVB FOR VBE
qVB FOR VBE -55C to 25C
-2.0 -2.0
-2.5 -2.5
0.04 0.06 0.1 0.2 0.4 0.6 1.0 2.0 4.0 0.04 0.06 0.1 0.2 0.4 0.6 1.0 2.0 4.0
IC, COLLECTOR CURRENT (AMP) IC, COLLECTOR CURRENT (AMP)

Figure 6. Temperature Coefficients

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4
MJD243 (NPN), MJD253 (PNP)

VCC
+30 V
1K
500
RC 300 tr
25 ms 200
+11 V SCOPE
RB
100
0

t, TIME (ns)
50
-9.0 V 51 D1
30
20
tr, tf  10 ns td VCC = 30 V
-4 V 10
DUTY CYCLE = 1.0% IC/IB = 10
5 TJ = 25C
RB and RC VARIED TO OBTAIN DESIRED CURRENT LEVELS NPN MJD243
3
D1 MUST BE FAST RECOVERY TYPE, e.g.: 2 PNP MJD253
1N5825 USED ABOVE IB  100 mA
MSD6100 USED BELOW IB  100 mA 1
0.01 0.02 0.03 0.05 0.1 0.2 0.3 0.5 1 2 3 5 10
FOR PNP TEST CIRCUIT, REVERSE ALL POLARITIES
IC, COLLECTOR CURRENT (AMPS)

Figure 7. Switching Time Test Circuit Figure 8. Turn−On Time

10K 200
5K VCC = 30 V TJ = 25C
3K ts IC/IB = 10
2K IB1 = IB2 100
C, CAPACITANCE (pF)

TJ = 25C Cib
1K 70
t, TIME (ns)

500
50
300
200
30
100
50 Cob
20
30 tf MJD243 (NPN)
20 NPN MJD243
PNP MJD253 MJD253 (PNP)
10 10
0.01 0.02 0.03 0.05 0.1 0.2 0.3 0.5 1 2 3 5 10 1.0 2.0 3.0 5.0 7.0 10 20 30 50 70 100
IC, COLLECTOR CURRENT (AMPS) VR, REVERSE VOLTAGE (VOLTS)

Figure 9. Turn−Off Time Figure 10. Capacitance

200
TJ = 25C

100
C, CAPACITANCE (pF)

70 Cib

50

30

20 Cob

10
1 2 3 5 7 10 20 30 50 70 100
VR, REVERSE VOLTAGE (VOLTS)

Figure 11. Capacitance

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5
MJD243 (NPN), MJD253 (PNP)

ORDERING INFORMATION
Device Package Type Package Shipping†
MJD243G DPAK−3 369C 75 Units / Rail
(Pb−Free)

MJD243T4G DPAK−3 369C 2,500 / Tape & Reel


(Pb−Free)

NJVMJD243T4G* DPAK−3 369C 2,500 / Tape & Reel


(Pb−Free)

MJD253T4G DPAK−3 369C 2,500 / Tape & Reel


(Pb−Free)

NJVMJD253T4G* DPAK−3 369C 2,500 / Tape & Reel


(Pb−Free)

DISCONTINUED (Note 5)
Device Package Type Package Shipping†
MJD253−1G IPAK 369D 75 Units / Rail
(Pb−Free)
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D.
5. DISCONTINUED: This device is not recommended for new design. Please contact your onsemi representative for information. The most
current information on this device may be available on www.onsemi.com.
*NJV Prefix for Automotive and Other Applications Requiring Unique Site and Control Change Requirements; AEC−Q101 Qualified and PPAP
Capable

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6
MECHANICAL CASE OUTLINE
PACKAGE DIMENSIONS

DPAK INSERTION MOUNT


CASE 369
ISSUE O
DATE 02 JAN 2000

SCALE 1:1
B C NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI
V R E Y14.5M, 1982.
2. CONTROLLING DIMENSION: INCH.

INCHES MILLIMETERS
4 DIM MIN MAX MIN MAX
A 0.235 0.250 5.97 6.35
A B 0.250 0.265 6.35 6.73
1 2 3 C 0.086 0.094 2.19 2.38
D 0.027 0.035 0.69 0.88
S E 0.033 0.040 0.84 1.01
−T− F
G
0.037 0.047
0.090 BSC
0.94 1.19
2.29 BSC
SEATING K H 0.034 0.040 0.87 1.01
PLANE
J 0.018 0.023 0.46 0.58
K 0.350 0.380 8.89 9.65
R 0.175 0.215 4.45 5.46
J S 0.050 0.090 1.27 2.28
F
H V 0.030 0.050 0.77 1.27

D 3 PL
G 0.13 (0.005) M T

STYLE 1: STYLE 2: STYLE 3: STYLE 4: STYLE 5: STYLE 6:


PIN 1. BASE PIN 1. GATE PIN 1. ANODE PIN 1. CATHODE PIN 1. GATE PIN 1. MT1
2. COLLECTOR 2. DRAIN 2. CATHODE 2. ANODE 2. ANODE 2. MT2
3. EMITTER 3. SOURCE 3. ANODE 3. GATE 3. CATHODE 3. GATE
4. COLLECTOR 4. DRAIN 4. CATHODE 4. ANODE 4. ANODE 4. MT2

Electronic versions are uncontrolled except when accessed directly from the Document Repository.
DOCUMENT NUMBER: 98ASB42319B Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red.

DESCRIPTION: DPAK INSERTION MOUNT PAGE 1 OF 1

onsemi and are trademarks of Semiconductor Components Industries, LLC dba onsemi or its subsidiaries in the United States and/or other countries. onsemi reserves
the right to make changes without further notice to any products herein. onsemi makes no warranty, representation or guarantee regarding the suitability of its products for any particular
purpose, nor does onsemi assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation
special, consequential or incidental damages. onsemi does not convey any license under its patent rights nor the rights of others.

© Semiconductor Components Industries, LLC, 2000 www.onsemi.com


MECHANICAL CASE OUTLINE
PACKAGE DIMENSIONS

4 DPAK (SINGLE GAUGE)


CASE 369C
ISSUE G
1 2
3 DATE 31 MAY 2023
SCALE 1:1

GENERIC
MARKING DIAGRAM*

XXXXXXG AYWW
ALYWW XXX
XXXXXG

IC Discrete

XXXXXX = Device Code


A = Assembly Location
L = Wafer Lot
STYLE 1: STYLE 2: STYLE 3: STYLE 4: STYLE 5: Y = Year
PIN 1. BASE PIN 1. GATE PIN 1. ANODE PIN 1. CATHODE PIN 1. GATE
2. COLLECTOR 2. DRAIN 2. CATHODE 2. ANODE 2. ANODE
WW = Work Week
3. EMITTER 3. SOURCE 3. ANODE 3. GATE 3. CATHODE G = Pb−Free Package
4. COLLECTOR 4. DRAIN 4. CATHODE 4. ANODE 4. ANODE
*This information is generic. Please refer to
STYLE 6: STYLE 7: STYLE 8: STYLE 9: STYLE 10: device data sheet for actual part marking.
PIN 1. MT1 PIN 1. GATE PIN 1. N/C PIN 1. ANODE PIN 1. CATHODE Pb−Free indicator, “G” or microdot “G”, may
2. MT2 2. COLLECTOR 2. CATHODE 2. CATHODE 2. ANODE
3. GATE 3. EMITTER 3. ANODE 3. RESISTOR ADJUST 3. CATHODE or may not be present. Some products may
4. MT2 4. COLLECTOR 4. CATHODE 4. CATHODE 4. ANODE not follow the Generic Marking.

Electronic versions are uncontrolled except when accessed directly from the Document Repository.
DOCUMENT NUMBER: 98AON10527D Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red.

DESCRIPTION: DPAK (SINGLE GAUGE) PAGE 1 OF 1

onsemi and are trademarks of Semiconductor Components Industries, LLC dba onsemi or its subsidiaries in the United States and/or other countries. onsemi reserves
the right to make changes without further notice to any products herein. onsemi makes no warranty, representation or guarantee regarding the suitability of its products for any particular
purpose, nor does onsemi assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation
special, consequential or incidental damages. onsemi does not convey any license under its patent rights nor the rights of others.

© Semiconductor Components Industries, LLC, 2011 www.onsemi.com


onsemi, , and other names, marks, and brands are registered and/or common law trademarks of Semiconductor Components Industries, LLC dba “onsemi” or its affiliates
and/or subsidiaries in the United States and/or other countries. onsemi owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property.
A listing of onsemi’s product/patent coverage may be accessed at www.onsemi.com/site/pdf/Patent−Marking.pdf. onsemi reserves the right to make changes at any time to any
products or information herein, without notice. The information herein is provided “as−is” and onsemi makes no warranty, representation or guarantee regarding the accuracy of the
information, product features, availability, functionality, or suitability of its products for any particular purpose, nor does onsemi assume any liability arising out of the application or use
of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. Buyer is responsible for its products
and applications using onsemi products, including compliance with all laws, regulations and safety requirements or standards, regardless of any support or applications information
provided by onsemi. “Typical” parameters which may be provided in onsemi data sheets and/or specifications can and do vary in different applications and actual performance may
vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. onsemi does not convey any license
under any of its intellectual property rights nor the rights of others. onsemi products are not designed, intended, or authorized for use as a critical component in life support systems
or any FDA Class 3 medical devices or medical devices with a same or similar classification in a foreign jurisdiction or any devices intended for implantation in the human body. Should
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Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner.

ADDITIONAL INFORMATION
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