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COAL Theory Outline Fall 2023

The document outlines the course details for CSCS3543: Computer Organization and Assembly Language at the University of Central Punjab for Fall 2023, including credit hours, assessment weights, and course objectives. It emphasizes the understanding of microprocessor organization and assembly language programming, with a focus on practical coding assignments and lab work. The course includes a structured syllabus with specific topics, learning outcomes, and required textbooks for students.

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A.Raffay Naeem
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0% found this document useful (0 votes)
22 views5 pages

COAL Theory Outline Fall 2023

The document outlines the course details for CSCS3543: Computer Organization and Assembly Language at the University of Central Punjab for Fall 2023, including credit hours, assessment weights, and course objectives. It emphasizes the understanding of microprocessor organization and assembly language programming, with a focus on practical coding assignments and lab work. The course includes a structured syllabus with specific topics, learning outcomes, and required textbooks for students.

Uploaded by

A.Raffay Naeem
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as DOCX, PDF, TXT or read online on Scribd
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University of Central Punjab

Faculty of Information Technology


Fall 2023

A. Course Description

Course Code CSCS3543


Course Title Computer Organization and Assembly Language (Theory)
Credit Hours 4(3+1)
Assessment Instruments with • Theory (3 credit hr.)
Weights (quizzes, midterms, final, Final Exam 40%
assignments, presentation, lab
work, etc.) Mid Term exam 20%
Assignments (4) 20%
Quizzes (6) 15%
Class Participation 05%
Theory Total 100%

• Lab (1 credit hr.)


Final Lab Exam 40%
Lab Midterm 20%
Graded Labs 35%
Class participation 05%
Lab Total 100%

Course Instructors Muhammad Zulkifl Hasan


Course Coordinator Dr. Adnan Ghafoor
Office Hours Friday 1030-12 PM
Plagiarism Policy All the parties involved in first cheating case in Midterm or Final
term will be awarded ‘F’ for the course.
Current Catalog Description The objective of this course is to understand the organization of
microprocessor for instance Intel x86 in terms of assembly language
instruction. This course primarily focuses on the detailed analysis and
working of microprocessor.
Textbook (Notes) Assembly language, Design and Interfacing 4th edition, Mazidi &
Mazidi
 https://bit.ly/3VqG76k
Reference Books  Assembly Language Intel based Computers, 4th Edition, by
KIP, R, IRVINE
 Intel Microprocessors, 8th edition, by Barry B. Brey
 Art of Assembly,
Teaching-Learning Methodology  More emphasis will be on coding assignments and practical
lab sessions. Regular and online quizzes will be held to help
students improving their understanding. Extra tutorial session
will be conducted to increase problem solving kills.
Course Learning Outcomes
(CLOs)
Topics Covered in the Course, Attached
with Number of Lectures on Each
Topic
1 NCEAC.FORM.001.C
Lab Projects Yes
Theory & Lab Exam
Class Time Spent on (in credit Theory Problem Solution Labs
hours) Analysis Design
1 1 1 1

CLO CLO Statement Bloom’s Taxonomy Level PLO


1 To develop the understanding, 1 2
working and organization of
microprocessors.

2 Implement assembly programs 3 4


for the intel 8088/8086
architecture.

3 Write assembly language 6 4


programs using 32-bit inline
assembly in C++.

Lecture Book Reference Relation


Week
# Contents (Sections) Assessment to CLO
Introduction to the Course Irvine: 2.1.1 CLO-1
Introduction to 8086 processor Art of Assembly: 3.1
Address and Data buses and their size Brey: 2.1
1
Control bus (Read Write and
Memory/IO signals) Mazidi: 0.2
Processor-Memory-I/O Model
1 Irvine: 2.2.2
Basic Computer Architecture Art of Assembly: 4.1
General purpose registers Brey: 2.1
2 Segment registers Mazidi: 1.2
Index registers
Purpose of these registers

Programing Model of X86 Irvine: 14.1.5


Assembler Directives
(.model, .stack, .data, .code, .exit), Mazidi: 1.4
Basic program structure, Mazidi: 2.1
3
Data movement among registers using
(MOV instruction) Irvine: 14.2.2
2

Register addressing mode Irvine: 12.3.6


Immediate addressing mode Art of Assembly: 4.6
4
Direct addressing mode Brey: 3.1 CLO2
Indirect addressing mode Art of Assembly: 4.7

2 NCEAC.FORM.001.C
Logical to Physical Address Conversion Mazidi: 1.6
Examples with MOV instruction

ALU instructions (ADD, SUB, AND, OR,


NOT, NEG, XOR, ADC, SBB)
5 MUL & DIV instructions Art of Assembly: 6.5 A1
Flag register Mazidi: 3.1,3.2 Q1
3
Programming practice questions
Data types Art of Assembly: 5.3
6 Variable declaration and initialization Mazidi: 2.5
ALU operations on variables
Arrays & Loops
(Labels and Loop instruction) Art of Assembly: 5.6.1
7 Base plus index addressing mode Brey: 6.1
4 Base relative plus index addressing
mode
Jump & Branch instructions Art of Assembly: 10.1
8
Irvine: 6.9.4
Bit Manipulation Art of Assembly: 6.6
9 Shift: Arithmetic and Logical Shift Mazidi: 3.5
Rotations
5 Bit Masking Irvine:
Selective Set Mazidi: 3.6
10
Selective Clear Art of Assembly: 9.6
Selective Complement Brey:
Stack
11 Introduction to Stack
Saving and restoring variable in stack
Subroutines A2
6
CALL and RET statements Q2
12 Simple subroutines Art of Assembly: 8.7
Parameter Passing through Stack Brey: 6.3
Return value
Subroutines
13 Parameter passing through stack

Software Interrupts
7
Basic introduction of interrupts Irvine: 14.1.4
14 BIOS and DOS interrupts for printing on
screen and reading keys
Mazidi: 4.1
Software Interrupts Mazidi: 14.1
8
15 Explain the concept of IVT (IVT)
Exceptions (Handling)

3 NCEAC.FORM.001.C
Hooking Divide by Zero & Overflow
exceptions
16 Programming Exercise
17 Hardware Interrupts
Art of Assembly: 23.1
18 Programmable Interrupt Controller
IRQs
Video Memory
19 Accessing video memory directly
Familiarize with ASCII and attribute
Interacting with I/O
10
IN & Out Instructions
20 Application: Sending data to virtual
printer
X86 programming
Introduction to x86 programming Q3
21 32-bit registers CLO-3
32-bit addressing modes
Inline assembly language programming
11
in Visual studio in C++
22 Accessing arrays and variables
32-bit programming exercise

Exploiting Hardware features: Multi-


Media eXtension (MMX)
23
MMX registers

12
Exploiting data-level parallelism using A3
MMX instruction set
24
MMX programming exercise

Writing library functions in assembly


and calling from high level language Q4
25

13

Programming exercise
26

Calling functions defined in high level


language in assembly language A4
27
14

28 Programming exercise

4 NCEAC.FORM.001.C
Programming exercise Q5
29
15
Programming exercise
30

31 Revision
16
32

5 NCEAC.FORM.001.C

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