DMA
DMA
DMA
DMA Controller is a hardware device that allows I/O devices to directly access
memory with less participation of the processor. DMA controller needs the
same old circuits of an interface to communicate with the CPU and
Input/Output devices.
Dual-Ended DMA: Dual-Ended DMA controllers can read and write from two
memory addresses. Dual-ended DMA is more advanced than single-ended
DMA.
Interleaved DMA: Interleaved DMA are those DMA that read from one
memory address and write from another memory address.
The figure below shows the block diagram of the DMA controller. The unit
communicates with the CPU through the data bus and control lines.
Through the use of the address bus and allowing the DMA and RS register
to select inputs, the register within the DMA is chosen by the CPU. RD and
WR are two-way inputs. When BG (bus grant) input is 0, the CPU can
communicate with DMA registers. When BG (bus grant) input is 1, the CPU
has relinquished the buses and DMA can communicate directly with the
memory.
Explanation: The CPU initializes the DMA by sending the given information
through the data bus.
•The starting address of the memory block where the data is available
(to read) or where data are to be stored (to write).
•It also sends word count which is the number of words in the memory
block to be read or written.
•Control to define the mode of transfer such as read or write.
•A control to begin the DMA transfer