Department of Electrical Engineering

Faculty Member: MS RAFIA AHMAD Dated: 28-JAN-2025

Semester: 2ND Section: BSDS-02A

Group No.:

EE-221: Digital Logic Design

Lab 1: FAM of Basic gates and ICs

PLO4/CLO4 PLO4/CLO4 PLO5/CLO5 PLO8/CLO6 PLO9/CLO7

Analysis Individual Total

Viva / Lab Modern Ethics and
Name Reg. No of data in Tool Usage and Team marks
Performance Safety
Lab Report Work Obtained

5 Marks 5 Marks 5 Marks 5 Marks 5 Marks 25 Marks

Anas Norani 501231

Hanan Majeed 519166

Mujtaba Umar 510196

Shehryar 520299

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Getting Started with Circuit Patching
Breadboard:
Breadboards are usually used for patching small circuits and prototypes. A typical breadboard would look like this.

The internal connections are as shown below:

The points in ABCDE (and FGHIJ) grid are vertically connected as indicated by red circle. So all 5 points are actually
the same point. It makes No difference whether you connect a wire on any one of these points. The next vertical
strip is a different point and so on. It should be noted that upper and lower grids are horizontally connected
indicated below. Each grid consists of 4 such separate horizontal strips:

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IC Placement on Breadboard
A typical 14 pin IC placement on such a bread board is shown below:

The upper and lower horizontal strips are normally served for power (+5V) and ground (0V) respectively. But it is
not necessary to do so.

Never place any IC such that its opposite pins are within (connected to) the same Node on the same
grid.

Procedure:

1. Make sure the trainer board is switched off while you are patching the circuit.
2. Make a neat schematic diagram clearly mentioning the IC numbers, PIN configurations and connections
between different ICs.
3. Place the IC(s) such that the Notch is towards the left.
4. Provide the ground connection(s) by connecting the GND pin(s) of the IC(s) to 0 V on your trainer board
power supply with the help of jumping wires. Make sure that all the ICs are properly grounded.

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5. Provide the VDD or operating voltage to each IC by connecting its VDD (or VCC) terminal to +5V on your
trainer board power supply.
6. Patch the circuit as per the schematic.
7. Connect the inputs of your circuit to the logic switches provided on your trainer board. Typically, there are
8 such switches provided. The low position of the switch indicates a 0 logic level (0V) and the high position
a logic level of 1(+5V).
8. Connect the output of your circuit to the logic probe provided on the trainer board.
9. Now switch on the trainer board and give the input sequence to your circuit with the help of logic switches.
It is a good practice to give the input sequence in ascending order like this:
000, 001, 010, 011, 100, 101, 110, 111 (Here No. of inputs is 3).
This pattern can be adopted for lesser or more No. of inputs.
10. Observe the output of your circuit against different inputs and record them in the truth table.
11. Compare with theoretical values and debug the circuit if needed.
12. Show your work for each lab task to your Lab Instructor.
13. Give your observations and conclusion.
IC Pin Numbers:

14. Most of the ICs have a Notch (or sometimes a dot) to denote the start of the PIN numbering. Place the IC
such that the Notch is on left side, then the lower left PIN is numbered 1 and the numbering continues in
the anticlockwise direction.
15. Datasheet:
16. The information about any IC (its number of pins and gates inside it) can be found by simply searching by its
name on internet. The document containing information about the IC is called its datasheet. Different
manufacturers of these chips have this information on their sites.

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 Lab1: Familiarization of Basic Gates and Digital ICs

This Lab Activity has been designed to familiarize the beginning students with logic gates and IC
chips, using breadboard and testing of gates and logic circuits.

Objectives:

1. Familiarize the students with ICs, their categories, and different logic families.
Identify ICs on the basis of series number as well as their functional behavior and pin
numbers.
2. Search data sheets of ICs from different sources and optimally use them in the design of
digital circuits.
3. Perform functional verification of basic logic gates by listing the truth tables and establishing
IN/OUT relationship.
4. Carry out best wiring practices in digital design.

Lab Instructions:

✔ This lab activity comprises three parts, namely Pre-lab, Lab tasks, and Post-lab viva session.
✔ The lab report will be uploaded on LMS before scheduled lab date. Each group to upload
completed lab report on LMS for grading.
✔ The students failing to complete Pre-lab will not be allowed to attend lab session.
✔ The students will start lab task and demonstrate design steps separately for step-wise
evaluation (teacher/lab engineer will sign each step after ascertaining functional verification).
Any report submitted without teacher/lab engineer signatures will not be accepted.
✔ Remember that a neat logic diagram with pins numbered and nicely patched circuit will simplify
trouble-shooting/fault diagnostic process.
✔ After completion of lab, the students are expected to unwire the circuit and deposit back
components to lab staff.
✔ The students will complete lab task within the prescribed time and submit complete report to
lab engineer before leaving the lab.
✔ There will be a viva session after demonstration for which students will be graded individually.

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Pre-Lab Tasks: (2.5 marks)

1. Digital ICs can be categorized according to the complexity of their circuits usually termed
as scale integration. The following are the six major categories. Give their full names and
range of gates available in each of them.

SSI MSI LSI VLSI ULSI GSI

2. Another categorization is with respect to the Logic Families of Digital ICs. The seven of these
are listed below. Give their full name and give their utilization in terms of speed, power, noise
margin and cost. (e.g. Low Power, High Speed).

RTL DTL ECL TTL ECL CMOS

3. Differentiate b/w Fan In and Fan Out of an IC.

4. Show the correct pin numbering and connection of gates inside these blank chips with the
help of their datasheets.

5. Mention the manufacturer whose datasheet you consulted.

7404

7408

7432

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Lab Task (6 Marks)

Verify the functioning of the following ICs (2 marks each)

7408, 7432, 7404

Procedure

1. Plug in all ICs in bread board and power the ICs providing ground and VCC=5V to
appropriate pins. The ground pin is to be connected first and then any other connections
are made.
2. By looking at pin configuration apply input signals from a switch on logic lab. Connect the
output to LED for display. (The operation of circuit is verified and results to be shown to
teacher or Lab Asst. For trouble shooting of circuit use the logic probe provided in the lab).
3. Attach snapshot of hardware for all 2 bit binary combinations.
4. Make the truth tables in the space provided below.
5. Mention the full name of each IC provided to you with the help of its datasheet and explain
the naming convention (You should be able to get this information from internet).
6. Make a schematic layout diagram in the space provided below, showing ICs pin numbers
and their connections to form the logic circuit.

IC 7408
Hardware Snapshot

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Truth Table

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Proteus Simulation

Full Name

Example:
Quad 2-Input AND Gates SN74 LS08P
SN Standard Prefix of TEXAS INSTRUMENT
Quad refers to 4 AND gates
74 refers to commercial grade IC
LS means Low Power Schottky
P Plastic Dual in-Line Package
08refers to AND gate

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IC 7432
Hardware Snapshot

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Truth Table

Full Name

• SN: Indicates it's from Texas Instruments, a common prefix used for their logic ICs.
• 74: Refers to the 74-series of logic ICs, which are a family of logic gates and related components.
• HC: Stands for High-Speed CMOS, which is a technology that offers low power consumption and
high-speed operation.
• 032: Refers to the specific function of the IC, which is a Quad 2-input OR Gate.
• N: Represents the package type, in this case, it's a DIP (Dual Inline Package).

So, SN74HC032N is a Quad 2-input OR Gate IC from the 74-series, utilizing High-Speed CMOS
technology, in a DIP package.

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Proteus Simulation

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IC 7404
Hardware
Snapshot

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Truth Table

Full Name

• SN: Indicates the part is from Texas Instruments.

• 74: Refers to the 74-series, which is a series of logic ICs used for digital applications.
• LS: Stands for Low Power Schottky, which refers to the technology used in the IC. Low Power
Schottky logic offers faster switching and lower power consumption compared to standard TTL logic.
• 04: Refers to the function of the IC, which is a Hex Inverter (six independent inverters).
• N: Denotes the package type, which is a DIP (Dual Inline Package).

So, SN74LS04N is a Hex Inverter IC from the 74-series, using Low Power Schottky (LS) technology, and
packaged in a DIP package.

Proteus Simulation

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Fill in the blanks (1.5 Marks)

1. The ICs in 7400 series are based on TTL logic family?

2. The commercial grade IC is denoted by 74 prefix.
3. The military grade IC is denoted by 54 prefix.

Conclusion/ Observation:

IN THIS LAB WE LEARN HOW TO INTEGRATE AND, OR, NOT GATE WITH
THE ICS AND CHECK THEIR TRUTH TABLE APPLICATIONS AS SHOWN IN
THE HARDWARE SNAPSHOTS.

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