5th Global Power, Energy and Communication Conference (IEEE GPECOM2023), June 14-16, 2023, Cappadocia/Turkey

Enhancement of Steady-State Performance of PFC

Boost Rectifier using Modulated Model Predictive
Control
Enis Kranda Mustafa Gokdag
Department of Electrical-Electronics Engineering Department of Electrical-Electronics Engineering
2023 5th Global Power, Energy and Communication Conference (GPECOM) | 979-8-3503-0198-4/23/$31.00 ©2023 IEEE | DOI: 10.1109/GPECOM58364.2023.10175713

Uskudar University Karabuk University

Istanbul, Turkey Karabuk, Turkey
[email protected] [email protected]

Ozan Gulbudak Natarajan Prabaharan

Department of Electrical-Electronics Engineering Department of Electrical-Electronics Engineering
Karabuk University SASTRA Deemed University
Karabuk, Turkey Tamil Nadu, India
[email protected] [email protected]

Abstract—This paper proposes a modulated-type predictive feasibility remains poor. Several PFC circuits have reported
current control strategy for a single-phase power factor several closed-loop strategies to regulate the control goals
corrected boost rectifier. The conventional model predictive dynamics [3]. The conventional approach consists of two
control strategy suffers from distorted input current and cascaded compensators where the former one (generally a PI
polluted power. Thus, a high sampling frequency is necessary to compensator) regulates the output voltage and the latter one
satisfy the utilization standards. However, the selection of a high (generally a type II compensator) regulates the grid current
sampling period demands significant computation power. [4]. This control strategy is adopted for different PFC
Motivated by the drawbacks of the traditional model predictive topologies and requires proper design of both compensators
control strategy, the modulation stage is added to the control
[5]. In [6], the predictive digital current programmed control
loop and releases the trade-off between high sampling frequency
strategy with slope compensation technique is proposed in
requirement and total harmonic distortion to achieve good
current quality. Fully benefits from the advantages of predictive order to use it instead of standard analog control one while
model control, such as ease of implementation and high-speed requiring relatively modest digital hardware resources for
dynamic response, are exploited while ensuring an acceptable implementation. But the strategy still requires relatively high
power quality on a lower sampling frequency. The theoretical sampling frequency (100 KHz or 200 KHz) to ensure the high
framework to support evidence-based practice is performance of the current loop. In [7], a digitally
comprehensively explained. The proposed closed-loop design implemented predictive current control law is introduced for
methodology is analytically revealed, and critical aspects of the boost PFC rectifier, and the strategy is modified to improve
proposed method are discussed. Numerous simulations work, current shaping in both DCM and CCM. In [8], a model
including steady-state and transient operations, are performed predictive control strategy with constant switching frequency
to demonstrate the superiority of the proposed method by is proposed for PFC boost rectifier. The linear extrapolation
comparing it with the traditional model predictive approach. approach is adopted to predict the two-step future current
Finally, experimental validation is conducted to prove the reference. The complete solution suffers from the high
feasibility of the proposed modulated predictive control method computational burden. In [9], the pulse train control strategy
in real time. is proposed to benefit from the decoupling ability between the
current and the voltage control loops. Thus, the design of the
Keywords—PFC boost rectifier, predictive current control,
high bandwidth voltage control loop becomes possible
constant switching frequency.
without increasing the unwanted current harmonics and leads
I. INTRODUCTION to the fast dynamic response for the voltage loop. It can be
considered as the disadvantage of the proposed method that it
In grid-connected converters, the input current is subject contains preset coefficients that should be adjusted according
to undesirable distortions due to the low-order harmonics. to the input power and voltage level. In [1], the sliding mode
Thus, the characteristics of these types of systems become current control strategy is presented to control single-phase
non-linear. In many cases, the controlled ac-dc converters three-level active rectifier. The computation of the sliding
with power factor correction capability are used to improve mode controller terms and the need for properly adjusted
the system's power factor. The power factor corrector (PFC) sliding coefficients can be considered as the poor side of this
circuit with a well regulation capability reduces the low-order strategy [10], [11], [12]. Among the informed strategies, the
harmonics and the phase shift between the input voltage and model predictive control (MPC) strategy is an encouraging
current. This capability of the PFC circuit remarkably technique due to its flexibility in including control goals and
improves the system's power quality while maintaining the nonlinearities in the closed-loop design. However, the
utilization profile. Due to these benefits of the PFC circuits, traditional MPC method suffers low grid current quality when
they are preferred instead of a traditional full bridge diode the sampling frequency is relatively low. At first glance, the
rectifier [1], [2]. selection of a high sampling does not seem problematic;
Regarding the control goals of the PFC circuits, drawing a however, it may hinder the applicability of traditional MPC in
sinusoidal grid current (inductor current) in phase with grid several power electronics systems [13], [14]. The choice of the
voltage is the main task. Furthermore, the power quality must high sampling frequency (also means that a lower sampling
satisfy the required grid codes; otherwise, the system's period) requires higher computation power which introduces
the limitation in the design stage. The increase in the

979-8-3503-0198-4/23/$31.00 ©2023 IEEE

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 5th Global Power, Energy and Communication Conference (IEEE GPECOM2023), June 14-16, 2023, Cappadocia/Turkey

computation complexity causes a negative influence on the TABLE I. DESIGN PARAMETERS FOR BOOST-TYPE PFC RECTIFIER
real-time implementation of the traditional MPC [15]. In Parameters Value
addition to poor current quality on the lower sampling
Input Voltage, , 110 , 50 Hz
frequency, the uncontrolled switching frequency is another
design goal that must be considered. The traditional MPC Output Voltage, 250 V
directly produces the control input signals, therefore, no
Output Power, 500 W
design stage is responsible for regulating the operating
frequency. The varying switching frequency causes practical Switching Frequency, 100 kHz
difficulties in designing passive filters. The average switching
Sampling Period, 50 kHz
frequency varies depending on the power level, converter
parameters, and other environmental conditions. Thus, an Inductor peak-to-average 0.3 A= 5% @ and full
current ripple, ∆ rated current
optimal filter design cannot be easily achieved due to the
6.25 V= 2.5% full
unpredicted operating frequency [16]. The other critical aspect Output capacitor peak-to-
rated voltage and full
of the MPC is that, unlike traditional control approaches, it average voltage ripple, ∆
load
predicts the future error value on the model-based manner and Load resistance, 125 Ω
takes action accordingly.
Inductance, 1 mH
By motivating the disadvantages of the traditional MPC
method, a modulated model predictive control (M2PC) is Output capacitor, 500 µF
proposed for PFC converter in this paper. The proposed
method's key benefit relaxes the traditional MPC method's
high sampling frequency condition. The closed-loop strategy Values of passive components are calculated using (1) and (2)
combines the modulator stage with the predictive current according to the design requirements and operating point
control method. The cost function of the conventional MPC values listed in Table I.
method is reformulated to comply with the modulator stage. _ _ − _
The grid present total harmonic distortions (THD) are = =
2∆ !10%%2
successfully reduced by 7% with the proposed method
155 !250 − 155% (1)
compared to the traditional controller. The improved steady- = 10() ≅ 1 ,-
state performance achieved by the proposed method decreases !10%%2 ∗ 500 ∗ 250
the required sampling frequency. Hence, the computational
complexity of the system is also reduced. The simulation and
experimental results show that similar steady-state 500
performance can be achieved on a lower sampling frequency = =
2. / 0 × 2∆ × 2.50 ∗ 2 ∗ 6.25 ∗ 250 (2)
when the proposed method is applied to the system. Thus the
effectiveness of the proposed method is proven by the ≅ 500 µ5
experimental and simulation works.
III. CONVENTIONAL AVERAGE CURRENT MODE (ACM)
The paper's outline is as follows: Section 2 presents the
fundamentals of the boost type PFC rectifier. Section 3 is CONTROL FOR PFC RECTIFIER
about the design procedure for the cascaded compensators The ACM-controlled PFC boost rectifier's block diagram
used in conventional average current mode control. Section 4 is shown in Fig. 2. An outer loop is employed to control the
explains the proposed M2PC technique. Section 5 reports the converter's output voltage. A voltage compensator 678 !9% is
experimental results and compares the THD performance of required to generate the reference value for inductor current
the different control strategies. Section 6 is the conclusion part magnitude in order to regulate the output voltage at a set point.
of the paper. This magnitude value is then multiplied with the normalized
version of the measured input voltage vg of the boost converter
II. FUNDAMENTALS OF BOOST TYPE PFC RECTIFIER in order to generate full-wave rectified sinusoidally varying
The boost type PFC rectifier is shown in Fig. 1. The boost reference control signal ic. An inner loop compensator 67 !9%
converter has two switching states where either the mosfet or is used to force the inductor current to be a sinusoid in phase
the diode conducts. When the mosfet is turned-on (it is with the full-wave rectified grid voltage.
anymore called as state 1 in this study), the inductor is charged In order to design inner loop current compensator 67 !9%
from the input source and the output capacitor supplies the and outer loop voltage compensator 678 !9%, the control-to-
inductor current 6 0 !9% and the control-to-output voltage
load. When the diode conducts (called as state 2 in this study),
680 !9% transfer functions of the boost converter are required
the inductor releases the stored energy to the output capacitor
and resistive load pair.
L
The selection of passive components is essential for the
proper operation of the converter with desired performance. iL
Diode rectifier

+ +
L vin vg Co vo RL
- -
+ iL
+
vin vg Co vo RL X ic -+ d
Vin_peak ÷ Gci(s) PWM
- X
iL_peak -
- Gcv (s) + Vref

Fig. 1. PFC Boost type rectifier Fig. 2. Average Current Mode Controlled PFC Boost Rectifier.

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 5th Global Power, Energy and Communication Conference (IEEE GPECOM2023), June 14-16, 2023, Cappadocia/Turkey

and they can be deduced from the averaged small-signal current. The z-domain expression of compensated loop
model of the boost converter as given in (3) and (4) [17]. function, 0 !K%, is also plotted in Fig. 3 in order to observe
9 the match between the analog one and digital one.
:̂ 1>
?@ 8 2? −4
6 0 !9% = = 6 0 <!J% = <!J − 1% > <!J − 2%
_7
<= 1>
1 9
>
9
2? >4 2? >4
_7 _7
A? ?
(3) 6 _7 ? _7 ?@_7 > 2
2 1>9 > L !J%
= 2 2? >4
B _7
1>9 >9
!1 − % !1 − % 26 _7 ? _7 ?@_7
> L !J − 1%
(6)
2? _7 >4

9 > L !J
C 1−
?@8,DEF
680 !9% = = 680 6 _7 ? _7 ?@_7 − 2
<= 1>
1 9
>
9 − 2%
A? 2? >4
? _7

1−9
(4) The outer voltage loop function 8 !9% can be easily
′
= written as in (7) by inspecting the loop in Fig. 2. The voltage
B
1>9 >9 compensator 678 !9% is designed to generate the amplitude of
!1 − % !1 − % the sinusoidal inductor current to regulate the output voltage
The inner loop function, !9% = 67 !9%6 0 !9%, must be at the reference value. However, it is desired that the voltage
loop has a very low gain at 100 Hz so that the voltage ripple
shaped such that the system has a smooth first-order response
at 100 Hz across the output capacitor does not affect the
without any ringing. For this purpose, it is desired that the loop
generated current reference and thus does not cause harmonic
function has a slope of -20 dB/dec and a phase angle of
distortion in the inductor current. Thus, the voltage loop does
approximately 67o around the crossover frequency. The
not sense changes at 100 Hz and does not produce a response
crossover frequency is chosen as 10 kHz (one-tenth of the
to it. The PI controller given (8) is used to compensate the
switching frequency) to obtain enough attenuation for the
voltage loop, the frequency response is shown in Fig. 4. The
switching ripples and its harmonics. A type-II compensator
difference equation is obtained as in (9) by applying the Tustin
(PI with high frequency pole), whose transfer function is given
transform.
in (5), is adequate for this application. The origin pole of this
compensator provides the required high gain for the low- 678 !9%67 !9%680 !9%
8 !9% =
frequency region in order to obtain the zero steady-state error. 1 > 67 !9%6 0 !9% (7)
The zero frequency, ?@_7 , of this compensator provides the
required phase margin and the high-frequency pole, ? _7 ,
rolls off the gain for the high-frequency region. For this
purpose, the zero frequency and the high-frequency pole are
9
located before and after the desired crossover frequency, ?@_78 1>
?@_78
respectively. The magnitude and phase plots of the 678 !9% = 6 _78 O1 > P = !6 _78 ?@_78 %
(8)
9 9
compensated current loop gain !9% is shown in Fig. 3.
?@_7 9 where @_78 = 66.78 -K, 6 _78 = 0.0262.
1> 1>
9 ?@_7
67 !9% = 6 _7 = 6 _7 ?@_7 _ !J% = _ !J − 1% > 6 _78 L8 !J% − L8 !J − 1%
9 9 (5)
6 _78 ?@_78
H1 > I 9 H1 > I
? _7 ? _7 > L8 !J% > L8 !J − 1%
(9)
2
where @_7 = 1.5 J-K, _7 = 50 J-K, 6 _7 = 0.5. where L8 is the error in output voltage, and is the
_
In order to implement the compensator on digital output of the compensator.
platforms, the difference equation must be derived. For this,
the equation is first moved to the z-domain using the Tustin IV. PROPOSED MODULATED MODEL PREDICTIVE CONTROL OF
bilinear mapping technique. So the difference equation (6) is PFC RECTIFIER
easily obtained. Here, < is the output of the compensator and The MPC technique has recently been increasingly used
the duty cycle of the compensator, and L is the error in in switching power converters. This method is based on

Fig. 3. Bode plot for compensated inner loop function !9% = Fig. 4. Bode plot for compensated outer loop function 8 !9%.
67 !9%6 0 !9%.

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 5th Global Power, Energy and Communication Conference (IEEE GPECOM2023), June 14-16, 2023, Cappadocia/Turkey

estimating the values of the state variables to be controlled for switching frequency is fixed, and the pulse width modulator is
each possible control input of the converter at the next included in the system. Here, the main task is to determine the
sampling time by using the discrete mathematical model of the duty cycle of the switch, < = <e , based on the model
converter topology. References to relevant state variables and prediction. Equation (16) can be written since the average
these estimates are evaluated in a cost function. The control current error over a switching period must be zero for good
input that provides the most cost-effective is selected and reference tracking.
applied during the next sampling period.
^e <e > ^ < = 0 (16)
Where ^e and <e represent the current error and duty
The model predictive control technique requires deriving
the discretized form of the continuous-time dynamical
cycle for the MOSFET on-state, and ^ and < imply the
equation of the converter. For this, the dynamic equation of
same terms for the diode on-state. The sum of the duty cycles
the boost converter in Fig. 1 needs to be derived. In boost PFC,
is equal to 1 in CCM operation as defined in (17).
since the inductor current is forced into a rectified sinusoidal
current in phase with the grid voltage, it is sufficient to obtain <e > < = 1 (17)
the discrete model only from the dynamic equation for the
inductor. Depending on whether the MOSFET or diode of the If (16) and (17) are simultaneously solved, the duty cycle
boost converter shown in Fig. 1 is in conduction, (10) and (11) < for the MOSFET can be calculated as in (18).
are written, respectively. −^
< = <e =
^e − ^ (18)
<
= / ST UVW5X SY − 9RZRL (10)
<R
V. EXPERIMENTAL VALIDATION
A 500 W rectifier prototype was built to verify the
<
= / − ST < S<L SY − 9RZRL (11)
proposed control strategy. The TMS320F28335 DSP control
<R board is used to implement the control algorithm. The
In order to obtain the discrete-time mathematical model of experimental setup is shown in Fig. 6.
the system, the Forward-Euler (FE) technique, which is Steady-state waveforms are shown in Fig. 7 for the case
widely used due to its ease of application, is preferred in this where the converter is operated with the proposed closed-loop
study. The FE approach is given in (12). By applying the FE control strategy. In this test, the input peak voltage is 155 V,
approach to (10) and (11), the expressions (13) and (14) are the load resistance is 210 Ω, and the output voltage is set to
obtained, respectively. 250 V. As observed from the waveforms, the input current is
< !J > 1% − !J% in phase with the grid voltage, and its THD is around 6.59%.
≈
<R (12)
The performance of the proposed control strategy is also
tested under step load changes. The step load increment
(210 Ω to 125 Ω) and decrement (125 Ω to 210 Ω) are applied
\
!J > 1% = !J% > ! / !J%% (13) to the converter, respectively. The resulting waveforms are

Resistive load

]
!J > 1% = !J% > / !J% − !J% (14)
In this equation, is the sampling period and expresses
the time elapsed at two consecutive sampling times. / !J%, Variac

!J%, and !J% represent input voltage, output voltage and

PFC rectifier
+ TMS320F28335

inductor current measurements for the kth sampling moment.

Equations (13) and (14) are used to predict the inductor
current values for the two switching states of the boost
converter. These two predictions are used to calculate the
corresponding error terms for these states as in (15). Fig. 6. Experimental setup for PFC boost rectifier.

^_ = ` − __ !J
(15) > 1% a ∈ {1,2}
Vin
The schematic representation of the proposed modulated-
MPC is depicted in Fig. 5. In MMPC, the converter's iin
L

iL
Diode rectifier

+ +
vin vg Co vo RL Vo
PWM
- -
d ILoad
iL
vo
X iref MMPC
Vi_peak ÷
X
iL_peak -
Gcv (s) + Vref

Fig. 7. Steady-state experimental waveforms for the case where =

Fig. 5. MMPC for PFC Boost Rectifier.
250 , _ = 155 , = 210 Ω.

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 5th Global Power, Energy and Communication Conference (IEEE GPECOM2023), June 14-16, 2023, Cappadocia/Turkey

schematic includes the cascaded two compensators. The outer

loop of the proposed technique employs a PI compensator as
the conventional one. The inner loop is implemented using the
predictive controller. MPC is a straightforward model-based
Vin
technique with no additional coefficients like the type-II
iin compensator used in traditional control, so it gives ease of
implementation. MPC was implemented with a modulator in
this study, thus eliminating the need for a high sampling
Vo period. The proposed technique performs better in terms of
ILoad THD than the other control methods, and no deterioration is
RL=210Ω RL=125Ω observed in the grid current waveforms during the dynamic
transitions.
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