KAMARAJ COLLEGE OF

ENGINEERING AND TECHNOLOGY

(Accredited By NBA, AICTE, New Delhi)
S.P.G.Chidambara Nadar C.Nagammal Campus,
S.P.G.C.Nagar, Virudhunagar – 626 001.

DEPARTMENT OF ELECTRONICS AND COMMUNICATION

ENGINEERING
LABORATORY MANUAL CUM OBSERVATION RECORD

CS2259 - MICROPROCESSORS LABORATORY

KAMARAJ COLLEGE OF
ENGINEERING AND TECHNOLOGY
(Accredited By NBA, AICTE, New Delhi)

S.P.G.Chidambara Nadar C.Nagammal Campus,

S.P.G.C.Nagar, Virudhunagar – 626 001.

NAME : _____________________________________________ __________

REGISTER NUMBER : ____________________ ROLL NO : __________ _ ______
BRANCH : ___________________________________________________ ____
YEAR : _______________________________________________________
Bonafide Record of work done in the CS2259 – MICROPROCESSORS LABORATORY of

Kamaraj College of Engineering and Technology, Virudhunagar, during the year 2012 - 2013.

STAFF IN-CHARGE HEAD OF THE DEPARTMENT

.

Submitted for the Anna University Practical Examination held on __________________ at

Kamaraj College of Engineering and Technology, Virudhunagar.

INTERNAL EXAMINER EXTERNAL EXAMINER

 INDEX

Expt. Page
Date Title of the Experiment Mark Signature
no. No.

8 Bit Arithmetic Operations Using 8085 11 – 14

1
Microprocessor

16 Bit Arithmetic Operations Using 8085 15 – 20

2
Microprocessor

21- 24
3 Array Processing Using 8085 Microprocessor

Generation of Series and String Manipulation 25 – 28

4
Using 8085 Microprocessor

16 Bit/32 Bit Arithmetic Operations Using 8086 31 – 35

5
Microprocessor

Generation of Series Using 8086 Microprocessor 36 – 42

6

43 – 47
7 Array Processing Using 8086 Microprocessor

Search, Replace and String Manipulations Using 48 – 52

8 8086 Microprocessor

Arithmetic Manipulation Using 8051 55 – 60

9
Microcontroller

61 – 62
10 Logical Manipulation Using 8051 Microcontroller

63 – 65
11 Bit Manipulation Using 8051 Microcontroller
 INDEX

Expt. Page
Date Title of the Experiment Mark Signature
no. No.

12 Interfacing Keyboard/Display Interface (8279) 67 - 69

13 Interfacing Programmable Interval Timer(8253) 70 - 71

14 Interfacing Traffic Light Controller (8255) 72 - 76

15 Interfacing Stepper Motor Controller 77 - 78

Timer/Counter Using 8051 Programming

16 79 – 81
Resources

Communication Between 8051 Microcontroller

17 82 - 84
Kit and PC Serial communication using 8251

18 Serial Communication Using 8251 85 - 88

Read Scan Code and Character Code From

19 91 – 92
Keyboard Using MASM

20 String Display Using MASM 93

4
 SYLLABUS (Common to CSE & IT)

AIM:
To learn the assembly language programming of 8085, 8086 and 8051 and also to
give a practical training of interfacing the peripheral devices with the processor.

OBJECTIVES:
 To implement the assembly language programming of 8085, 8086 and 8051.
 To study the system function calls like BIOS/DOS.
 To experiment the interface concepts of various peripheral device with the proces-
sor.
Experiments in the following:
 Programming with 8085
 Programming with 8086-experiments including BIOS/DOS calls:
 Keyboard control, Display, File Manipulation.
 Interfacing with 8085/8086-8255,8253
 Interfacing with 8085/8086-8279,8251
 8051 Microcontroller based experiments for Control Applications
 Mini- Project
TOTAL: 45 PERIODS

List of equipments/components for 30 students (two per batch)

 8085 Trainer Kit with onboard 8255, 8253, 8279 and 8251 – 15 nos.
 TASM/MASM simulator in PC (8086 programs) – 30 nos.
 8051 trainer kit – 15 nos.
 Interfacing with 8086 – PC add-on cards with 8255, 8253, 8279 and 8251 – 15 nos.
 Stepper motor interfacing module – 5 nos.
 Traffic light controller interfacing module – 5 nos.
 ADC, DAC interfacing module – 5 nos.
 CRO’s – 5 nos.

5
 LIST OF CYCLES
Cycle I : 8085 PROGRAMMING
 8 BIT ARITHMETIC OPERATIONS USING 8085 MICROPROCESSOR
 16 BIT ARITHMETIC OPERATIONS USING 8085 MICROPROCESSOR
 ARRAY PROCESSING USING 8085 MICROPROCESSOR
 GENERATION OF SERIES AND STRING MANIPULATION USING 8085
MICROPROCESSOR

Cycle II : 8086 PROGRAMMING

 16 BIT/32BIT ARITHMETIC OPERATIONS USING 8086 MICROPROCESSOR
 GENERATION OF SERIES USING 8086 MICROPROCESSOR
 ARRAY PROCESSING USING 8086 MICROPROCESSOR
 SEARCH, REPLACE AND STRING MANIPULATION USING 8086
MICROPROCESSOR

Cycle III : 8051 PROGRAMMING

 ARITHMETIC MANIPULATION USING 8051 MICROCONTROLLER
 LOGICAL MANIPULATION USING 8051 MICROCONTROLLER
 BIT MANIPULATION USING 8051 MICROCONTROLLER

Cycle IV: INTERFACING WITH 8085/8086-8255, 8253, 8279, 8251

 INTERFACING KEYBOARD / DISPLAY INTERFACE (8279)
 INTERFACING PROGRAMMABLE INTERVAL TIMER (8253)
 INTERFACING TRAFFIC LIGHT CONTROLLER (8255)
 INTERFACING STEPPER MOTOR CONTROLLER
 TIMER/COUNTER USING 8051 PROGRAMMING RESOURCES
 COMMUNICATION BETWEEN 8051 MICROCONTROLLER KIT AND PC
 SERIAL COMMUNICATION USING 8251

6
Cycle V : PROGRAMMING WITH MASM ASSEMBLER
 READ SCAN CODE AND CHARACTER CODE FROM KEYBOARD
USING MASM
 STRING DISPLAY USING MASM

7
CYCLE I - 8085 PROGRAMMING

8
 INTRODUCTION TO 8085 MICROPROCESSOR

INTEL 8085 is one of the most popular 8-bit microprocessor capable of

addressing 64 KB of memory and its architecture is simple. The device has 40 pins,
requires +5 V power supply and can operate with 3MHz single phase clock.
ALU (Arithmetic Logic Unit):
The 8085A has a simple 8-bit ALU and it works in coordination with the
accumulator, temporary registers, 5 flags and arithmetic and logic circuits. ALU has the
capability of performing several mathematical and logical operations. The temporary
registers are used to hold the data during an arithmetic and logic operation. The result is
stored in the accumulator and the flags are set or reset according to the result of the
operation. The flags are affected by the arithmetic and logic operation.
 Sign flag
After the execution of the arithmetic - logic operation if the bit D7 of the result is
1, the sign flag is set. This flag is used with signed numbers. If it is 1, it is a negative
number and if it is 0, it is a positive number.
 Zero flag
The zero flag is set if the ALU operation results in zero. This flag is modified by
the result in the accumulator as well as in other registers.
 Auxiliary carry flag
In an arithmetic operation when a carry is generated by digit D3 and passed on to
D4, the auxiliary flag is set.
 Parity flag
After arithmetic – logic operation, if the result has an even number of 1’s the flag
is set. If it has odd number of 1’s it is reset.
 Carry flag
If an arithmetic operation results in a carry, the carry flag is set. The carry flag
also serves as a borrow flag for subtraction.
Timing and control unit
This unit synchronizes all the microprocessor operation with a clock and
generates the control signals necessary for communication between the microprocessor

9
and peripherals. The control signals RD (read) and WR (write) indicate the availability
of data on the data bus.
Instruction register and decoder
The instruction register and decoder are part of the ALU. When an instruction is
fetched from memory it is loaded in the instruction register. The decoder decodes the
instruction and establishes the sequence of events to follow.
Register array
The 8085 has six general purpose registers to store 8-bit data during program
execution. These registers are identified as B, C, D, E, H and L. they can be combined as
BC, DE and HL to perform 16-bit operation.
Accumulator
Accumulator is an 8-bit register that is part of the ALU. This register is used to
store 8-bit data and to perform arithmetic and logic operation. The result of an operation
is stored in the accumulator.
Program counter
The program counter is a 16-bit register used to point to the memory address of the next
instruction to be executed.
Stack pointer
It is a 16-bit register which points to the memory location in R/W memory, called the
Stack.
Control bus
It consists of various single lines that carry synchronizing signals. The
microprocessor uses such signals for timing purpose.

10
 Ex. No. 1 Date :

8 BIT ARITHMETIC OPERATIONS USING 8085 MICROPROCESSOR

AIM:
To Write an Assembly Language Program to perform 8 bit addition, subtraction,
multiplication, division using 8085 microprocessor.

APPARATUS REQUIRED:
8085 Microprocessor Kit, Power Supply (+5v)

PROGRAM:
8 BIT ADDITION:
ADDRESS LABEL MNEMONICS OP CODE COMMENTS
4100 MVI C, 00H
4102 LDA 4200
4105 MOV B, A
4106 L1 LDA 4201
4109 ADD B
410A JNC L1
410B INR C
410C STA 4202
410F MOV A, C
4110 STA 4203
4113 HLT

OBSERVATION:
INPUT OUTPUT
ADDRESS DATA ADDRESS DATA
4200 4202
4201 4203

11
 MANUAL CALCULATION:

8 BIT SUBTRACTION:
ADDRESS LABEL MNEMONICS OP CODE COMMENTS
4100 MVI C, 00H
4102 LXI H, 4500
4105 MOV A, M
4106 INX H
4107 SUB M
4108 JNC L1
410B INR C
410C CMA
410D ADI 01H
410F L1 INX H
4110 MOV M, A
4111 INX H
4112 MOV M, C
4113 HLT
OBSERVATION:
INPUT OUTPUT
ADDRESS DATA ADDRESS DATA
4500 4502
4501 4503

MANUAL CALCULATION:

12
 8 BIT MULTIPLICATION:
ADDRESS LABEL MNEMONICS OP CODE COMMENTS
4100 LDA 4152
4103 MOV B,A
4104 LXI B, 0000
4107 LHLD 4150
410A XCHG
410B L1 DAD D
410C DCR B
410D JNZ L1
410E SHLD 4152
4110 HLT

OBSERVATION:
INPUT OUTPUT
ADDRESS DATA ADDRESS DATA
4150 4152
4151 4153

MANUAL CALCULATION:

8 BIT DIVISION:
ADDRESS LABEL MNEMONICS OP CODE COMMENTS
4100 LDA 4150
4103 MOV B,A
4104 LDA 4151
4107 MVI C, 00
4109 CMP D

13
410A L1: JC L2
410B SUB B
410C INR C
410D CMP B
410E JNC L1
410F L2 MOV A, C
4110 STA 4153
4113 HLT

OBSERVATION:

INPUT OUTPUT
ADDRESS DATA ADDRESS DATA
4150 4152
4151 4153

MANUAL CALCULATION:

Max. Marks
Category
INFERENCES: Marks Awarded
Preparation 10
Performance 30
Result 40
Viva-voce 10
Record 10
TOTAL 100
RESULT:

Thus the ALP to perform 8 bit addition, subtraction, multiplication, division

were executed and verified using 8085 microprocessor.

14
 Ex. No. 2 Date :

16 BIT ARITHMETIC OPERATIONS USING 8085 MICROPROCESSOR

AIM:
To write an Assembly Language Program to perform 16 bit addition, subtraction,
multiplication, division and Multi-byte addition using 8085 microprocessor.

APPARATUS REQUIRED:
8085 Microprocessor Kit, Power Supply (+5v)

PROGRAM:
16 BIT ADDITION
ADDRESS LABEL MNEMONICS OP CODE COMMENTS
4100 LXI D,FFFF
4103 LXI H,1111
4106 MVI C,00
4108 DAD D
4109 JNC L1
410A INR C
410B L1 SHLD 4300
410E MOV A,C
410F STA 4302
4112 HLT

MANUAL CALCULATION:

15
 OBSERVATION:
INPUT OUTPUT
ADDRESS DATA ADDRESS DATA
4101 4300
4102 4301
4104 4302
4105

16 BIT SUBTRACTION:
ADDRESS LABEL MNEMONICS OP CODE COMMENTS
4100 MVI C, 00
4102 LHLD 4050H
4105 XCHG
4106 LHLD 4052H
4109 MOV A, L
410A SUB E
410B MOV L, A
410C MOVA, H
410D SBB D
410E MOVH, A
410F SHLD 4054H
4112 JNC L1
4115 INR C
4116 L1 MOV A, C
4117 STA 4056H
411A HLT

16
 OBSERVATION:
INPUT OUTPUT
ADDRESS DATA ADDRESS DATA
4050 4054
4051 4055
4052 4056
4053

MANUAL CALCULATION:

16 BIT MULTIPLICATION:
ADDRESS LABEL MNEMONICS OP CODE COMMENTS
4100 LXI H,0000
4103 LXI D,FFFF
4106 LXI SP,1111
4109 LXI B,0000
410C L2 DAD SP
410D JNC L1
4110 INX B
4111 L1 DCX D
4112 MOV A,D
4113 ORA E
4114 JNZ L2
4117 SHLD 4150
411A MOV A,C
411B STA 4152
411E MOV A,B
411F STA 4153
4112 HLT

17
 OBSERVATION:
INPUT OUTPUT
ADDRESS DATA ADDRESS DATA
4104 4150
4105 4151
4107 4152
4108 4153

MANUAL CALCULATION:

16 BIT DIVISION:
ADDRESS LABEL MNEMONICS OP CODE COMMENTS
4100 LXI B,0000
4103 LXI H,F1F2
4106 LXI D,13F3
4109 MOV A,H
410A L2 CMP D
410B JC L1
410E MOV A,L
410F SUB E
4110 MOV L,A
4111 MOV A,H
4112 SBB D
4113 MOV H,A
4114 INX B
4115 JMP L2

18
4118 SHLD 4150
4119 L1 MOV A,C
411A STA 4152
411D MOV A,B
411E STA 4153
4121 HLT

OBSERVATION:
INPUT OUTPUT
ADDRESS DATA ADDRESS DATA
4104 4150
4105 4151
4107 4152
4108 4153

MANUAL CALCULATION:

MULTI BYTE ADDITION:

ADDRESS LABEL MNEMONICS OP CODE COMMENTS
4100 LXI H,4200
4103 LXI D,4300
4106 MVI C,03
4109 LDAX D
410A ADC M
410B STAX D
410E INX D

19
410F INX H
4110 DCR C
4111 JNZ L1
4112 HLT

OBSERVATION:
INPUT OUTPUT
ADDRESS DATA ADDRESS DATA
4200 4300
4201 4301
4202 4302
4300
4301
4302

MANUAL CALCULATION:

INFERENCES:
Max. Marks
Category
Marks Awarded
Preparation 10
Performance 30
Result 40
Viva-voce 10
Record 10
TOTAL 100
RESULT:
Thus the ALP to perform 16 bit addition, subtraction, multiplication, division
and multibyte addition were executed and verified using 8085 microprocessor.

20
 Ex. No. 3 Date :

ARRAY PROCESSING USING 8085 MICROPROCESSOR

AIM:
To Write an Assembly Language Program to perform the following operations
using 8085 microprocessor.
 Largest/Smallest in an array.
 Ascending/Descending order of an array.
 Finding Odd/Even number in an array.

APPARATUS REQUIRED:
8085 Microprocessor Kit, Power Supply (+5v)

PROGRAM:
LARGEST/SMALLEST IN AN ARRAY:
ADDRESS LABEL MNEMONICS OP CODE COMMENTS
4100 MVI C,05
4102 LXI H,4150
4105 MOV A,M
4106 L2 INX H
4107 MOV B,M
4108 CMP B
4109 JNC /JC L1
410C MOV A,B
410D L1 STA 4250
4110 DCR C
4111 JNZ L2
4114 HLT

21
 OBSERVATION:
INPUT OUTPUT
ADDRESS DATA ADDRESS DATA
4150 4250
4151
4152
4153
4154

ASCENDING/DESCENDING ORDER OF AN ARRAY :

ADDRESS LABEL MNEMONICS OP CODE COMMENTS
4100 MVI B,05H
4102 L3 LXI H,4150
4105 MVI C,05H
4107 L2 MOV A,M
4108 INX H
4109 CMP M
410A JC /JNC L1
410D MOV D,M
410E MOV M,A
410F DCX H
4110 MOV M,D
4111 INX H
4112 L1 DCR C
4113 JNZ L2
4116 DCR B
4117 JNZ L3
411A HLT

22
 OBSERVATION:

INPUT OUTPUT
ADDRESS DATA ADDRESS DATA
4150 4150
4151 4151
4152 4152
4153 4153
4154 4154

FINDING EVEN NUMBER IN AN ARRAY:

ADDRESS LABEL MNEMONICS OP CODE COMMENTS
4100 LXI H,4150
4102 LXI D,4160
4105 MVI C,05H
4107 L2 MOV A,M
4108 RAR
4109 JC L1
410C MOV A,M
410D STAX D
410E INX D
411F L1 INX H
4110 DCR C
4112 JNZ L2
4115 HLT

23
OBSERVATION:
INPUT OUTPUT
ADDRESS DATA ADDRESS DATA
4150 4160
4151
4152
4153
4154

INFERENCES:

Max. Marks
Category
Marks Awarded
Preparation 10
Performance 30
Result 40
Viva-voce 10
Record 10
RESULT: TOTAL 100
Thus the following operations were performed using 8085 microprocessor and
outputs were also verified.
1. Largest/Smallest in an array.
2. Ascending/Descending order of an array.
3. Finding Odd/Even number in an array.

24
 Ex. No. 4 Date :

GENERATION OF SERIES & STRING MANIPULATION USING 8085 MICROPROCESSOR

AIM:
To Write an Assembly Language Program to perform the following Series
generation and string manipulation operations using 8085 microprocessor.
 Generation of Fibonacci series.
 Check whether the given string is palindrome or not.

APPARATUS REQUIRED:
8085 Microprocessor Kit, Power Supply (+5v)

PROGRAM:
GENERATION OF FIBONACCI SERIES:
ADDRESS LABEL MNEMONICS OP CODE COMMENTS
4100 LXI H,4150
4103 MVI D,05H
4105 MVI A,00H
4107 MOV B,A
4108 MOV M,A
4109 INX H
410A MVI A,01H
410C MOV C,A
410D MOV M,A
410E INX H
410F L1 MOV A,B
4110 ADD C
4111 MOV B,C
4112 MOV C,A
4113 MOV M,A

25
4114 INX H
4115 DCR D
4116 JNZ L1
4119 HLT

OBSERVATION:
INPUT OUTPUT
ADDRESS DATA ADDRESS DATA
4104 05 4150
4151
4152
4153
4154

MANUAL CALCULATION:

CHECK WHETHER THE STRING IS PALINDROME OR NOT:

ADDRESS LABEL MNEMONICS OPCODE COMMENTS
4100 LXI D,4190
4103 LXI H,4180
4106 MVI B,05H
4108 MOV C,B
4109 DCR B
410A MOV A,E
410B ADD B
410C MOV A,E
410D ADD B
410E MOV E,A

26
410F MOV A,M
4110 STAX D
4111 DCX D
4112 INX H
4113 DCR D
4114 JNZ L1
4117 LXI H,4180
411A MVI C,05
411C INX D
411D LDAX D
411E MOV B,M
411F CMP B
4120 JNZ L2
4123 INX H
4124 INX D
4125 DCR C
4126 JNC L3
4129 JMP L4
412C MVI A,01H
412E STA4150
4131 JMP L5
4134 MVI A,00H
4136 STA 4150
4139 HLT

OBSERVATION: PALINDROME
INPUT OUTPUT
ADDRESS DATA ADDRESS DATA
4180 4150
4181
4182
4183
27
4184
 NOT A PALINDROME

INPUT OUTPUT
ADDRESS DATA ADDRESS DATA
4180 4150
4181
4182
4183
4184

MANUAL CALCULATION:

Max. Marks
Category
Marks Awarded
INFERENCES: Preparation 10
Performance 30
Result 40
Viva-voce 10
Record 10
TOTAL 100
RESULT:
Thus the following Series generation and string manipulation operations were
performed using 8085 microprocessor.
 Generation of Fibonacci series.
 Check whether the given string is palindrome or not.

28
 CYCLE II - 8086 PROGRAMMING

INTRODUCTION TO 8086 MICROPROCESSOR

Intel 8086 microprocessor is a first member of x 86 families of processors. Ad-

vertised as a "source-code compatible" with Intel 8080 and Intel 8085 processors, the
8086 was not object code compatible with them. The 8086 has complete 16-bit architec-
ture - 16-bit internal registers, 16-bit data bus, and 20-bit address bus (1 MB of physical

29
memory). Because the processor has 16-bit index registers and memory pointers, it can
effectively address only 64 KB of memory. To address memory beyond 64 KB the CPU
uses segment registers - these registers specify memory locations for code, stack, data
and extra data 64 KB segments. The segments can be positioned anywhere in memory,
and, if necessary, user programs can change their position. This addressing method has
one big advantage - it is very easy to write memory-independent code when the size of
code, stack and data is smaller than 64 KB each. The complexity of the code and pro-
gramming increases, sometimes significantly, when the size of stack, data and/code is
larger than 64 KB. To support different variations of this awkward memory addressing
scheme many 8086 compilers included 6 different memory models: tiny, small, com-
pact, medium, large and huge. 64 KB direct addressing limitation was eliminated with
the introduction of the 32-bit protected mode in Intel 80386 processor.
Intel 8086 instruction set includes a few very powerful string instructions. When
these instructions are prefixed by REP (repeat) instruction, the CPU will perform block
operations - move block of data, compare data blocks, set data block to certain value,
etc, that is one 8086 string instruction with a REP prefix could do as much as a 4-5 in -
struction loop on some other processors. To be fair, the Zilog Z80 included move and
search block instructions, and Motorola 68000 could execute block operations using just
two instructions.
The 8086 microprocessor provides support for Intel 8087 numeric co-processor. The
CPU recognizes all Floating-Point (FP) instructions. When the FP instructions reference
the memory, the CPU calculates memory address and performs dummy memory read.
The calculated address, and possibly read data, is captured by the FPU. After that the
CPU proceeds to the next instruction, while the FPU executes the floating-point
instruction. Thus, both integer and floating-point instructions can be executed
concurrently.
Ex. No. 5 Date :

16 BIT/32BIT ARITHMETIC OPERATIONS USING 8086 MICROPROCESSOR

AIM:

30
 To Write an ALP to perform 16 bit addition, subtraction, multiplication, division
and 32 bit addition/subtraction using 8086 microprocessor.

APPARATUS REQUIRED:
8086 Microprocessor Kit
PROGRAM: 16-BIT ADDITION
ADDRESS LABEL MNEMONICS OP CODE COMMENTS
MOV DL, #00
MOV SI, #1050
MOV AX, [SI]
MOV DI, #1052
MOV BX, [DI]
ADD AX, BX
JNC L1
INC DL
L1 MOV [1054], AX
MOV [1056], DL
HLT

Test Data:
INPUT OUTPUT
INPUT OUTPUT
Address/Reg Data Address Data
Address/Reg Data Address Data
1050 F2 1054 F2(lower order)
1050 FD 1054 CC
1051 F1 1055 AB
1051 3F 1055 41
1052 01 1056 BA(higher order)
1052 31 1056 01(borrow)
1053 05 1057 04
1053 FE
Observed Test Data:

INPUT OUTPUT
INPUT OUTPUT
Address/Reg Data Address Data
Address/Reg Data Address Data
1050 1054
1050 1054
1051 1055
1051 1055
1052 1056
1052 1056 31
1053
1053 1057
 Manual Calculation:

16-BIT SUBTRACTION
ADDRESS LABEL MNEMONICS OP CODE COMMENTS
MOV DL, #00
MOV SI, #1050
MOV AX, [SI]
MOV DI, #1052
MOV BX, [DI]
SUB AX, BX
JNC L1
INC DL
L1 MOV [1054], AX
MOV [1056], DL
HLT

16-BIT MULTIPLICATION
ADDRESS LABEL MNEMONICS OP CODE COMMENTS
MOV SI, #1050
MOV DI, #1052
MOV AX, [SI]
MOV BX, [DI]
MUL BX
MOV [1054], AX

32
 MOV [1056], DX
HLT

Test Data: Observed Test Data:

INPUT OUTPUT INPUT OUTPUT

Address/Reg Data Address Data Address/Reg Data Address Data

1050 FF 1054 02(Quotient) 1050 1054

1051 1F 1055 00 1051 1055

1052 BC 1056 87(Remainder) 1052 1056

1053 0A 1057 0A 1053 1057

Test Data: Observed Test Data:

INPUT OUTPUT INPUT OUTPUT

Address/Reg Data Address Data Address/Reg Data Address Data
1050 17 1058 4A(L.O) 1050 1058
1051 16 1059 48(L.O) 1051 1059
1052 33 105A 39(H.O) 1052 105A
1053 32 105B 39(H.O) 1053 105B
1054 18 105C 00(C) 1054 105C
1055 19 1055
1056 21 1056
1057 20 1057
16-BIT DIVISION
ADDRESS LABEL MNEMONICS OP CODE COMMENTS
MOV SI, #1050

33
 MOV DI, #1052
MOV AX, [SI]
MOV BX, [DI]
DIV BX
MOV [1054], AX
MOV [1056], DX
HLT

32 BIT ADDITION/SUBTRACTION
ADDRESS LABEL MNEMONICS OP CODE COMMENTS
MOV DL, #00
MOV BX, #1050
MOV AX, [BX]
MOV BX, #1052
MOV CX, [BX]
ADD AX, CX
MOV [1058], AX
MOV BX, #1054
MOV AX, [BX]
MOV BX, #1056
MOV CX, [BX]
ADC AX, CX
JNC L1
INC DL
L1 MOV [105A], AX
MOV [105C], DL
HLT
Max. Marks
Category
Marks Awarded
Preparation 10
Performance 30
Result 40
Viva-voce 10
34
Record 10
TOTAL 100
 INFERENCES:

RESULT:
Thus the ALP to perform 16 bit addition, subtraction, multiplication, division
and 32 bit addition/subtraction were executed and verified using 8086 microprocessor.

Ex. No. 6 Date :

GENERATION OF SERIES USING 8086 MICROPROCESSOR
AIM
To Write an ALP to perform following operations using 8086
(i) Generation of Fibonacci series
(ii) Find smallest/largest in an array
(iii)Ascending/descending order in an array
(iv)To separate odd/even number in an array
APPARATUS REQUIRED:
8086 microprocessor kit
GENERATION OF FIBONACCI SERIES
ADDRESS LABEL MNEMONICS OP CODE COMMENTS
MOV SI,#1050
MOV CL,#05 (COUNT)
MOV AL,#00
MOV [SI],AL

35
 INC SI
DEC CL
MOV BL,#01
MOV [SI],BL
DEC CL
L1: ADD BL,AL
MOV AL,[SI]
INC SI
MOV [SI],BL
LOOP LI
HLT

Test data:

INPUT OUTPUT
ADDRESS/REG DATA ADDRESS DATA
CL 05 1050 00
1051 01
1052 01
1053 02
1054 03

INPUT OUTPUT
Observed test data:
ADDRESS/REG DATA ADDRESS DATA
CL 08 1050
1051
1052
1053
1054
1055
36
1056
1057
 SMALLEST/LARGEST NUMBER IN AN ARRAY
ADDRESS LABEL MNEMONICS OP CODE COMMENTS
MOV SI,#1050
MOV CL,[SI]
INC SI
MOV AL,[SI]
DEC CL
L2 INC SI
MOV BL, [SI]
CMP AL, BL
JC L1
{JNC L1 FOR LARGEST
NUMBER}
MOV AL, BL
L1 LOOP L2
MOV [1060], AL
HLT

Test Data: Observed Test Data: (largest number):

37
 INPUT OUTPUT INPUT OUTPUT
Address/Reg Data Address Data Address/Reg Data Address Data
1050 05 1060 02 1050 05 1060
(Count) (Count)
1051 0B 1051
1052 02 1052
1053 07 1053
1054 09 1054
1055 FF 1055

ASCENDING/ DESCENDING ORDER IN AN ARRAY

ADDRESS LABEL MNEMONICS OP CODE COMMENTS

MOV SI, #1050
MOV CL, #05
DEC CL
L4 MOV DL, CL
L2 MOV AL [SI]
INC SI
MOV BL, [SI]
CMP AL, BL
JC L1 {JNC L1
FOR ASCENDING

38
 ORDER}
L3 LOOP L2
MOV SI,#1050
MOV CL,DL
LOOP L4
JMP L5
L1 MOV AL,BL
DEC SI
MOV BL,[SI]
MOV[SI],AL
INC SI
MOV [SI],BL
JMP L3
L5 HLT

Test Data: Test Data: (Ascending order)

INPUT OUTPUT INPUT OUTPUT

ADDRESS DATA ADDRESS DATA ADDRESS DATA ADDRESS DATA
1050 01 1050 09 1050 09 1050
1051 03 1051 07 1051 CD 1051
1052 05 1052 05 1052 05 1052
1053 07 1053 03 1053 07 1053
1054 09 1054 01 1054 FC 1054

TO SEPARATE THE ODD &EVEN NUMBERS FROM AN ARRAY

39
ADDRESS LABEL MNEMONICS OP CODE COMMENTS
MOVCL,#05
MOV SI,#1050
MOV DI,#1070
MOV BX,#1060
L3 MOV AL,[SI]
MOV DL, AL
RCR AL, 01
JC L1
MOV [DI], DL
INC DI
JMP L2
L1 MOV [BX], DL
INC BX
L2 INC SI
LOOP L3
HLT

Test Data:
OUTPUT1( odd) OUTPUT2(even)
ADDRESS/REG DATA ADDRESS/REG DATA ADDRESS/REG DATA
1050 00 1060 03 1070 00
1051 03 1061 01 1071 0A
1052 0A 1062 05
1053 01
1054 05

Test Data:
OUTPUT1( POSITIVE) OUTPUT2(NEGATIVE)

40
ADDRESS/REG DATA ADDRESS/REG DATA ADDRESS/REG DATA
1050 F3 1060 1070
1051 56 1061 1071
1052 8C 1062
1053 59
1054 11

INFERENCES :

41
 Max. Marks
Category
Marks Awarded
Preparation 10
Performance 30
Result 40
Viva-voce 10
Record 10
TOTAL 100

RESULT:
Thus the ALP to perform following operations was executed and verified using
8086 microprocessor.
(i)Generation of Fibonacci series
(ii) Find smallest/largest in an array
(iii)Ascending/descending order in an array
(iv)To separate odd/even number in an array

Ex. No. 7 Date :

ARRAY PROCESSING USING 8086 MICROPROCESSOR
AIM
To write an ALP to perform the following operations using 8086
(i) Sum of data in an array
(ii)To reverse an array in an different location
(iii)To reverse an array in an same location
(iv) To swap two arrays

APPARATUS REQUIRED:
8086 Microprocessor Kit

42
 SUM OF DATA IN AN ARRAY
ADDRESS LABEL MNEMONICS OP CODE COMMENTS
MOV CL,#05
MOV SI,#1050
MOV BL,#00
MOV BH,#00
L1 MOV AL,[SI]
ADD BL,AL
JNC L2
INC BH
L2 INC SI
LOOP L1
MOV [1070], BX
HLT

Test Data and Observed Test Data:

INPUT OUTPUT
ADDRESS/REG DATA ADDRESS/REG DATA
1050 F1 1070 BF
1051 F2 1071 04
1052 F3
1053 F4
1054 F5

INPUT OUTPUT
ADDRESS/REG DATA ADDRESS/REG DATA
1050 31 1070
1051 F6 1071
1052 98
1053 42 43
1054 2C
 TO REVERSE AN ARRAY IN DIFFERENT LOCATION
ADDRESS LABEL MNEMONICS OP CODE COMMENTS
MOV CL,#05
MOV SI,#1050
MOV BX,#1060
MOV DL,CL
DEC DL
ADD BL,DL
L1 MOV AL,[SI]
MOV [BX],AL
INC SI
DEC BX
LOOP L1
HLT

TO REVERSE AN ARRAY IN SAME LOCATION

ADDRESS LABEL MNEMONICS OP CODE COMMENTS
MOV CL,#05
MOV SI,#1050
MOV DI,#1060
L1 MOV AL,[SI]
MOV [DI],AL
INC SI
INC DI
LOOP L1
MOV CL,#05

44
 MOV SI,#1050
DEC DI
L2 MOV AL,[DI]
MOV [SI],AL
INC SI
DEC DI
LOOP L2
HLT

Test Data:

INPUT OUTPUT
ADDRESS/REG DATA ADDRESS/REG DATA
1050 01 1060 05
1051 02 1061 04
1052 03 1062 03
1053 04 1063 02
1054 05 1064 01

Test Data:
INPUT OUTPUT
ADDRESS/REG DATA ADDRESS/REG DATA
1050 01 1050 05
1051 02 1051 04
1052 03 1052 03
1053 04 1053 02
1054 05 1054 01

TO SWAP TWO ARRAYS

45
ADDRESS LABEL MNEMONICS OP CODE COMMENTS
MOV CL,#05
MOV SI,#1050
MOV DI,#1060
L1 MOV AL,[SI]
MOV BL,[DI]
MOV [DI],AL
MOV [SI],BL
INC SI
INC DI
LOOP L1
HLT

Test Data:
INPUT1 INPUT 2
ADDDRESS/REG DATA ADDRESS/REG DATA
1050 01 1060 06
1051 02 1061 07
1052 03 1062 08
1053 04 1063 09
1054
OUTPUT 1 05 1064
OUTPUT 2 0A
ADDDRESS/REG DATA ADDRESS/REG DATA
1050 06 1060 01
1051 07 1061 02
1052 08 1062 03
46
1053 09 1063 04
1054 0A 1064 05
INFERENCES: Max. Marks
Category
Marks Awarded
Preparation 10
Performance 30
Result 40
Viva-voce 10
Record 10
TOTAL 100

RESULT:
Thus the ALP to perform following operations was executed and verified using
8086 Microprocessor.
(i) Sum of data in an array
(ii) To reverse an array in an different location
(iii) To reverse an array in an same location
(iv) To swap two arrays.

47
 Ex. No. 8 Date :
SEARCH, REPLACE & STRING MANIPULATION USING 8086
MICROPROCESSOR
AIM
To Write an ALP to perform the following operations using 8086 microprocessor
(i) Check whether number is present or not
(ii) Search & replace a number
(iii)To check the given string is palindrome or not

APPARATUS REQUIRED:
8086 Microprocessor Kit

CHECK WHETHER THE NUMBER IS PRESENT OR NOT

ADDRESS LABEL MNEMONICS OP CODE COMMENTS
MOV DI, #1050
MOV CL, #05
L2 MOV AL, [DI]
CMP AL, #03
JZ L1
INC DI
LOOP L2
MOV AL,#01
MOV [1060], AL
JMP L3
L1 MOV AL,#00
MOV [1060], AL
L3 HLT

48
 Test Data:

INPUT OUTPUT INPUT OUTPUT

Address/Reg Data Address Data Address Data Address Data
1050 01 1060 00 /Reg
(present) 1050 01 1060 01
1051 02 (not
1052 03 present)
1053 04 1051 02
1054 05 1052 33
1053 04
1054 05

TO SEARCH A STRING IN AN ARRAY, FIND IT’S POSITION AND REPLACE

BY ANOTHER STRING

ADDRESS LABEL MNEMONICS OP CODE COMMENTS

MOV DI, #1050
MOV CL, #05
L2 MOV AL, [DI]
CMP AL, #03
JZ L1
INC DI
LOOP L2
MOV BL,#01
MOV [1060], BL
JMP L3
L1 MOV BL,#05
MOV [DI], BL

49
 L3 HLT
Test Data:

INPUT OUTPUT INPUT OUTPUT

Address/Reg Data Address Data Address/Reg Data Address Data

1050 01 1050 01 1050 11 1060 01

1051 02 1051 02 (not present)

1052 03 1052 05 1051 22

1053 04 1053 04 1052 33

1054 05 1054 05 1053 44

1054 55

TO CHECK IF THE STRING IS PALINDROME OR NOT

ADDRESS LABEL MNEMONICS OP CODE COMMENTS
MOV DL, #05
MOV SI, #1050
MOV BX, #1060
MOV CL, DL
DEC DL
ADD BL, DL
L1 MOV AL,[SI]
MOV [BX],AL
DEC BX
INC SI
LOOP L1
MOV SI,#1050
MOV CL,#05
INC BX
L2 MOV AL,[BX]
MOV DL,[SI]
CMP AL,DL

50
 JNZ L3
INC SI
INC BX
LOOP L2
MOV AL, #00
MOV [1070], AL
JMP L4
L3 MOV AL, #01
MOV [1070], AL
L4 HLT

Test Data:

INPUT OUTPUT
Address/Reg Data Address Data
1050 01 1070 00(palindrome)
1051 02
1052 03
1053 02
1054 01

Test Data:

INPUT OUTPUT
Address/Reg Data Address Data
1050 01 1070 01( not palindrome)
1051 02
1052 03
1053 04
1054 05

51
INFERENCES :

Max. Marks
Category
Marks Awarded
Preparation 10
Performance 30
Result 40
Viva-voce 10
Record 10
TOTAL 100

RESULT:
Thus the ALP to perform following operations was executed and verified using
8086 microprocessor.
i) Check whether number is present or not
(ii) Search & replace a number
(iii)To check the given string is palindrome or not

52
CYCLE III - 8051 PROGRAMMING

53
 INTRODUCTION TO 8051 MICROCONTROLLER

A microcontroller is a computer-on-a-chip built for specific tasks such as dis-

playing/receiving information through LEDs or remote controlled devices. 8051 intro-
duced the world to the most revolutionary set of microcontrollers.

Apart from 8051, 8052 and 8031 complete the 8051 family. The 8052 microcon-
troller has 256 bytes of RAM and 3 timers. Programs written for 8051 projects can be
used for 8052 as well. The 8031 has all features of 8051 except that it is ROM-less. An
external ROM that is as large as 64 k bytes can be programmed and added to this chip
for execution. The main disadvantage of adding external ROM is that 2 out of 4 ports
are used up leaving less for I/O operations.

The different types of memory used in 8051 are:

i. Internal RAM – Located from address 0 to 0xff.
ii. Special Function Registers (SFR) – Located from address 0x80 to 0Xff.
iii. Program Memory – Located at address 0. Uses 16 bit Special Function Reg-
ister DPTR, to save the tables of constants.
iv. External Data Memory – Located at address 0. Uses MOVX (Move Exter-
nal) to access the external data memory.

8051’s history dates back to when Intel Corporation first built the 8 – bit micro-
controller in 1981. This microcontroller was referred as “system on a chip” because it
had 128 bytes of RAM, 4 Kbytes of ROM, 2 Timers, 1 Serial port, and four ports on a
single chip.
Intel permitted other microcontroller manufacturers to fabricate different ver-
sions of 8051 with the condition that code compatibility should be maintained. The ad-
vantage of this is that when the program is written, it can be used for any version of
8051 irrespective of manufacturer.

54
 Ex. No. 9 Date :
ARITHMETIC MANIPULATION USING 8051 MICROCONTROLLER
AIM
To Write an ALP to perform following operations using 8051 microcontroller
(i) 8-bit addition indirect addressing mode
(ii) 8-bit subtraction indirect addressing mode
(iii) 8-bit division
(iv) 8-bit multiplication & (v) 16-bit addition/subtraction

APPARATUS REQUIRED
8051 Microcontroller Kit
8 BIT ADDITION- IN DIRECT ADDRESSING MODE
ADDRESS LABEL MNEMONICS OP CODE COMMENTS
MOV DPTR, #8600
MOVX A, @DPTR
MOV R1, A
INC DPTR
MOVX A, @DPTR
MOV R0, A
INC DPTR
MOVX A, @DPTR
ADD A, R0
JNC L1
INC R1
L1 INC DPTR
MOVX @DPTR, A
INC DPTR
MOV A,R1
MOVX @DPTR,A

55
 L3 SJMP L3

Test Data: Observed Test Data:

INPUT OUTPUT
INPUT OUTPUT
Address/Reg Data Address Data
Address/Reg Data Address Data
8600 00 8603 A9
8600 8603
8601 AA 8604 01
8601 8604
carry
8602
8602 FF

8 BIT SUBTRACTION- IN DIRECT ADDRESSING MODE

ADDRESS LABEL MNEMONICS OP CODE COMMENTS
CLR C
MOV DPTR, #8600
MOVX A, @DPTR
MOV R1, A
INC DPTR
MOVX A, @DPTR
MOV R0, A
INC DPTR
MOVX A, @DPTR
SUBB A, R0
JNC L1
INC R1
L1 INC DPTR
MOVX @DPTR, A
INC DPTR
MOV A,R1
MOVX @DPTR,A
L3 SJMP L3

56
 Test Data: Observed Test Data:

INPUT OUTPUT
INPUT OUTPUT
Address/Reg Data Address Data
Address/Reg Data Address Data
8600 00 8603 FD
8600 8603
8601 05 8604 01
8601 8604
(borrow)
8602
8602 02

8-BIT MULTIPLICATION
ADDRESS LABEL MNEMONICS OP CODE COMMENTS
MOV DPTR, #8150
MOVX A, @DPTR
MOV F0, A
INC DPTR
MOVX A, @DPTR
MUL AB
INC DPTR
MOVX @DPTR, A
MOV A, F0
INC DPTR
MOVX @DPTR, A
L3 SJMP L3

Test Data: Observed Test Data:

INPUT OUTPUT INPUT OUTPUT
Address/Reg Data Address Data Address/Reg Data Address Data
8150 58 8152 08(L) 8150 8152
8151 A3 8153 38(H) 8151 8153

57
 8-BIT DIVISION
ADDRESS LABEL MNEMONICS OP CODE COMMENTS
MOV DPTR, #8150
MOVX A, @DPTR
MOV F0, A
INC DPTR
MOVX A, @DPTR
MUL AB
INC DPTR
MOVX @DPTR, A
MOV A, F0
INC DPTR
MOVX @DPTR, A
L3 SJMP L3

Test Data: Observed Test Data:

INPUT OUTPUT INPUT OUTPUT
Address/Reg Data Address Data Address/Reg Data Address Data
8150 0A 8152 10(Q) 8150 8152
8151 A5 8153 05(R) 8151 8153

58
 16 –BIT ADDITION
ADDRESS LABEL MNEMONICS OP CODE COMMENTS
MOV DPTR,#8150
MOV R2,#00
MOVX A,@DPTR
MOV R0,A
INC DPTR
MOVX A,@DPTR
ADD A,R0
MOV R1,A
INC DPTR
MOVX A,@DPTR
MOV R0,A
INC DPTR
MOVX A,@DPTR
ADDC A,R0
JNC L1
INC R2
L1 INC DPTR
MOVX @DPTR,A
MOV A, R1
INC DPTR
MOVX @DPTR,A
INC DPTR
MOV A,R2
MOVX @DPTR,A
L3 SJMP L3

Note : For 16 bit subtraction use ‘CLR C’ Command at first line and use ‘SUBB’
instruction replacing ‘ADD’ and ‘ADDC’
Test Data: Observed Test Data:

59
 INPUT OUTPUT INPUT OUTPUT
Address/Reg Data Address Data Address/Reg Data Address Data
8150 31 8154 CF(H) 8150 31 8154 CF(H)
8151 10 8155 41(L) 8151 10 8155 41(L)
8152 F1 8156 01(Carry) 8152 F1 8156 01(Carry)
8153 DE 8153 DE
INFERENCES:

Max. Marks
Category
Marks Awarded
Preparation 10
Performance 30
Result 40
Viva-voce 10
Record 10
TOTAL 100

RESULT:
Thus the ALP to perform following operations was executed and verified using
8051 microcontroller.
(i) 8-bit addition indirect addressing mode
(ii) 8-bit subtraction indirect addressing mode
(iii)8-bit division
(iv)8-bit multiplication
(v)16-bit addition/subtraction
Ex. No. 10 Date :
LOGICAL MANIPULATION USING 8051 MICROCONTROLLER
AIM
To Write an ALP to perform following operations using 8051 microcontroller

60
 (i) Convert nibbles to bytes (ii) Convert bytes to nibbles
APPARATUS REQUIRED
8051 Microcontroller Kit
CONVERT NIBBLES TO BYTES
ADDRESS LABEL MNEMONICS OP CODE COMMENTS
MOV DPTR,#8150
MOVX A,@DPTR
SWAP A
MOV R0, A
INC DPTR
MOVX A,@DPTR
ADD A, R0
INC DPTR
MOVX @DPTR, A
L1 SJMP L1

CONVERT BYTES TO NIBBLES

ADDRESS LABEL MNEMONICS OP CODE COMMENTS
MOV DPTR,#8150
MOVX A,@DPTR
MOV R0,A
ANL A,0F
INC DPTR
MOVX @DPTR, A
MOV A, RO

SWAP A
ANL A, 0F
INC DPTR
MOVX @DPTR, A

61
 L1: SJMP L1

Test Data: Observed Test Data:

INPUT OUTPUT INPUT OUTPUT

Address/Reg Data Address Data Address/Reg Data Address Data
8150 04 8152 45 8150 8152
8151 05 8151

Test Data: Observed Test Data:

INPUT OUTPUT INPUT OUTPUT

Address/Reg Data Address Data Address/Reg Data Address Data
8150 54 8151 04 8150 8152
8152 05 8151

INFERENCES: Max. Marks

Category
Marks Awarded
Preparation 10
Performance 30
Result 40
Viva-voce 10
Record 10

RESULT: TOTAL 100

Thus the ALP to perform following operations was executed and verified using
8051 microcontroller.
(i) Convert nibbles to bytes
(ii) Convert bytes to nibbles
Ex. No. 11 Date :

62
 BIT MANIPULATION USING 8051 MICROCONTROLLER
AIM
To Write an ALP to perform following operations using 8051 microcontroller
(i) Count the number of odd & even numbers in an array
(ii) Find positive or negative number
APPARATUS REQUIRED
8051 Microcontroller Kit
COUNT THE NUMBER OF ODD& EVEN NUMBERS IN AN ARRAY
ADDRESS LABEL MNEMONICS OP CODE COMMENTS
MOV DPTR,#8150
MOVX A,@DPTR
MOV R0,A
MOV R1,#00
MOV R2,#00
L3 INC DPTR
MOVX A,@DPTR
RRC A
JNC L1
INC R1
SJMP L2
L1 INC R2
L2 DJNC R0, L3
INC DPTR
MOV A, R1
MOVX @DPTR, A
INC DPTR
MOV A, R2
MOVX @DPTR, A
L4 L4 SJMP L4

63
 Test Data: Observed Test Data:
INPUT OUTPUT
INPUT OUTPUT
Address/Reg Data Address Data
Address/Reg Data Address Data
8150 05 8600 02 (odd)
8150 05 8600
8151 00 8601 03 (even)
8151 55 8601
8152 02
8152 18
8153 03
8153 03
8154 04
8154 4C
8155 05
8155 EF
FIND POSITIVE OR NEGATIVE
NUMBER
ADDRESS LABEL MNEMONICS OP CODE COMMENTS
MOV DPTR,#8150
MOVX A,@DPTR
RLC A
JNC L1
MOV R0,#00
SJMP L2
L1 MOV R0,#01
L2 MOV A,R0
INC DPTR
MOVX @DPTR,A
L3 SJMP L3

Test Data: Observed Test Data:

64
INPUT OUTPUT
Address/ Data Address Data INPUT OUTPUT
Reg Address/ Data Address Data
8150 F5 8151 01 Reg
(negative) 8150 8151
8150 09 8151 00 8150 8151
(positive)

INFERENCES :

Max. Marks
Category
Marks Awarded
Preparation 10
Performance 30
Result 40
Viva-voce 10
Record 10
TOTAL 100

RESULT:
Thus the ALP to perform following operations was executed and verified using
8051 microcontroller.
(i) Count the number of odd & even numbers in an array
(ii) Find positive or negative number

65
CYCLE IV – INTERFACING PROGRAMMING

66
Ex. No. 12 Date :

INTERFACING KEYBOARD / DISPLAY INTERFACE (8279)

AIM
To write an ALP to interface keyboard / display interface with microprocessor
8086 and to rotate the given message.

APPARATUS REQUIRED
Microprocessor Kit 8086, Keyboard / Display Interfacing Kit.

HARDWARE DESCRIPTION:
The 8279 is a general purpose programmable keyboard / display interface device.
The keyboard portion of 8279 can provide a scanned interface to a 64 contact key
matrix. Keyboard entries are debounced and strobed- in as 8- character FIFO
automatically. The display portion provides a scanned display interface for 8 or 16
LED display. Both right entry (eg. Calculator) and left entry (eg. Type writer format)
are possible. 8279 has 16 X 8 displays RAM to accommodate seven segment codes for
16 digit displays.

LOOK-UP TABLE:

ADDRESS/REG DATA
1200 FF FF FF FF
1204 FF FF FF FF
1208 98 68 7C C8
120C FF 1C 29 FF

67
 LED SEGMENT:

f
b

g
c
e

.dp

Data bus D7 D6 D5 D4 D3 D2 D1 D0
Segments d c b a db g f e

MNEMONICS:
Rolling display (display message “HELP US”)

ADDRESS LABEL MNEMONICS OP CODE COMMENTS

START: MOV SI, 1200
MOV CX, 000F
MOV AL, 10
OUT C2, AL
MOV AL, CC
OUT C2, AL
MOV AL, 30
OUT C2, AL
NEXT: MOV AL, [SI]
OUT C0, AL

68
 CALL DELAY E8, 06, 00
INC SI
LOOP NEXT
JMP START EB, E2, FF
DELAY MOV DX, A0FF
LOOP1: DEC DX

JNZ LOOP1
RET

INFERENCES:

Max. Marks
Category
Marks Awarded
Preparation 10
Performance 30
Result 40
Viva-voce 10
Record 10
TOTAL 100

RESULT:
Thus Keyboard / display interface (8279) was interfaced with microprocessor
8086 and the given message ‘HELP US’ was also rotated.

Ex. No. 13 Date :

69
 INTERFACING PROGRAMMABLE INTERVAL TIMER (8253)
AIM:
To write an ALP to interface the programmable interval timer (8253) with
microprocessor 8086 and to generate the square wave.

APPARATUS REQUIRED:
Microprocessor Kit 8086, Programmable Interval Timer Kit, CRO

HARDWARE DESCRIPTION:
8253 is a programmable interval timer/counter is organized as three
independent 16 bit counter, each with a count rate of up to 2.6 MHz. Each counter has
three inputs i.e., clock input for counter, gate enable input and output. Counter can be
operated by programming its control word. The counter can be used as either as a BCD
or as binary counter.

PROCEDURE
 Output the control word to control register.
 Output the count.
 The output in CRO will remain high until one half of count and go low for
the order half for even number count.
 If the count is odd, the output will be high for (count + 1)/2 counts and low for
(count – 1)/2 counts.
 Set the jumper to connect the CLK 0 of 8253 to PCLK of frequency 1.5 MHz.
 The following program divides this PCLK by 10 and thus the output at chan-
nel 0 is 150 KHz. Hence a square wave of frequency 150 KHz is generated at
channel 0.

CONTROL WORD: 36

70
 0 0 1 1 0 1 1 0

To select channel 0 Load LSB of count Mode 3 Binary count

then MSB of count

PROGRAM:
ADDRESS LABEL MNEMONICS OP CODE COMMENTS
MOV AL, 36
OUT CE, AL
MOV AL, 10
OUT C8, AL
MOV AL, 00
OUT C8, AL Max. Marks
Category
HLT Marks Awarded
Preparation 10

INFERENCES: Performance 30
Result 40
Viva-voce 10
Record 10
TOTAL 100

RESULT:
Thus the programmable interval timer (8253) was interfaced with
microprocessor 8086 and the square wave was also generated.
Ex. No. 14 Date :

71
 INTERFACING TRAFFIC LIGHT CONTROLLER (8255)
AIM:
To write an ALP to interface a traffic light controller with microprocessor 8086
using 8255 interface and to control the flow of traffic at a four way junction.

APPARATUS REQUIRED:
8086 Microprocessor Kit, Traffic Light Controller Interfacing Kit.

HARDWARE DESCRIPTION:
The kit consists of four road four lane junction which consist of green, yellow &
red LED. The LED’s are made ON & OFF for controlling the traffic flow. For
pedestrian there is dual color LED (green & red).
The traffic light controller kit is interfaced with microprocessor kit via 8255.
8255 acts in mode 0 operation. Here ports A& B are used as an output port. To make
pedestrian LED green make the bit 0, for red make the bit 1. For other LED to glow set
1 otherwise set 0.

PB7 G PA4

Y PA6
PB1 PA5 PA1
G Y R R PA7

PB4 PB6

PB3 R
PB2 Y R Y G
PB0 G PA3 PA2 PA0

PB5

CONTROL WORD: 80

72
D7 D6 D5 D4 D3 D2 D1 D0

1 0 0 0 0 0 0 0

I/O MODE MODE 0 PORT A (O/P) MODE 0 PORT B(O/P)

TRAFFIC FLOW

73
CONTROL WORDS:

Traffic Flow Port A values Port B Values

R G

G G A7 A6 A5 A4 A3 A2 A1 A0 B7 B6 B5 B4 B3 B2 B1 B0
0 0 0 1 1 0 1 0 1 0 1 0 0 0 0 1

= 1A = A1
G R

Y Y A7 A6 A5 A4 A3 A2 A1 A0 B7 B6 B5 B4 B3 B2 B1 B0
0 1 1 0 0 1 0 0 1 0 1 0 0 1 0 0
G G
= 64 = A4

Y Y

G G
R
A7 A6 A5 A4 A3 A2 A1 A0 B7 B6 B5 B4 B3 B2 B1 B0
1 0 0 0 0 0 0 1 0 1 0 1 1 0 1 0

= 81 = 5A
R G
G

Y G
Y A7 A6 A5 A4 A3 A2 A1 A0 B7 B6 B5 B4 B3 B2 B1 B0
0 1 1 0 0 1 0 0 0 1 0 1 0 1 0 0

= 64 = 54

Y Y
G

74
 PORT A ADDRESS = 20
PORT B ADDRESS = 22
CONTROL REGISTER = 26

ADDRESS LABEL MNEMONICS OP CODE COMMENTS

START: MOV BX, 1100
MOV CX, 0004
MOV AL, [BX]
OUT 26, AL
INC BX
NEXT MOV AL, [BX]
OUT 20, AL
INC BX
MOV AL, [BX]
OUT 22, AL
CALL DELAY E8, 06, 00
INC BX
LOOP NEXT
JMP START EB, E4, FF
DELAY PUSH CX
MOV CX, 0005
REPEAT: MOV DX, FFFF
LOOP2: DCR DX
JNZ LOOP2
LOOP REPEAT
ADDRESS/REG DATA
1100 POP CX 80
1101 RET 1A
1102 A1
1103 64 INPUT:
1104 A4
1105 81
1106 5A
75
1107 64
1108 54
INFERENCES:

Max. Marks
Category
Marks Awarded
Preparation 10
Performance 30
Result 40
Viva-voce 10
Record 10
TOTAL 100

RESULT:
Thus the traffic light controller was interfaced with 8086 microprocessor kit using
8255 interface and flow of traffic at a four way junction was also controlled.

Ex. No. 15 Date :

INTERFACING STEPPER MOTOR CONTROLLER

76
 AIM:
To interface a stepper motor controller with microprocessor 8086 and to run the
stepper motor at different speed in both clock wise and anticlockwise directions.
APPARATUS REQUIRED:
Microprocessor Kit 8086, Stepper Motor Controller Interfacing Kit.
HARDWARE DESCRIPTION:
A stepper motor is a motor in which the rotor is able to assume only discrete
stationary angular position. In the given stepper motor there are 4 stator poles and pairs
of rotor poles. Therefore there exits 12 possible stable positions in which a south pole
of the rotor can lock with a north pole of stator. The stable positions can be attained by
simply energizing the winding on any one of the stator pole with DC supply.
The different stepping schemes are
1. Wave scheme.
2. Two phase scheme.
3. Half stepping scheme.
Two phase scheme:
When the winding on two successive stator poles are exited, then typical
equilibrium condition of rotor is obtained. The stator poles are A1, A2, B1 & B2. The
step angle is 30 degree. The Switching sequence for 2-phase scheme is given in the
table.
MNEMONICS:
ADDRESS LABEL MNEMONICS OP CODE COMMENTS
START: MOV DI, 1016
MOV CL, 04
REPT: MOV AL, [DI]
OUT C0, AL
MOV DX, 1010
DELAY: DEC DX
JNZ DELAY
INC DI

77
 LOOP REPT
JMP START
NOTE : The speed of the motor can be varied by varying the content of DX register

CLOCKWISE ANTICLOCKWISE
STEP A1 A2 B1 B2 STEP A1 A2 B1 B2
1 1 0 0 1 1 1 0 1 0
2 0 1 0 1 2 0 1 1 0
3 0 1 1 0 3 0 1 0 1
4 1 0 1 0 4 1 0 0 1

To run the motor : anticlockwise direction clockwise direction

ADDRESS/REG DATA
ADDRESS/REG DATA
1016 0A
1016 09
1017 06
1017 05
1018 05
1018 06
1019 09
1019 0A

INFERENCES:
Max. Marks
Category
Marks Awarded
Preparation 10
Performance 30
Result 40
Viva-voce 10
Record 10
TOTAL 100

RESULT:
Thus stepper motor controller was interfaced with microprocessor 8086 and the
stepper motor was rotated at different speed in both clock wise and anticlockwise
directions.
Ex. No. 16 Date :
TIMER/COUNTER USING 8051 PROGRAMMING RESOURCES

78
 AIM
1. To write an ALP to generate a square wave of frequency 1KHz at port 1.5,
use timer 1 with the crystal frequency of 11.0592MHz
2. To write an ALP to generate square waveform of 1KHz frequency at port 1.4
using software time delay
APPARATUS REQUIRED
8051 microcontroller kit and CRO
PROGRAM
ADDRESS LABEL MNEMONICS OP CODE COMMENTS
MOV TMOD,#10H
SETB P1.5
TOP: MOV TL1,#33H
MOV TH1,#FEH
SETB TR1
BACK: JNB TF1,BACK
CLR TF1
CLR TR1
CPL P1.5
SJMP TOP
ADDRESS LABEL MNEMONICS OP CODE COMMENTS
SETB P1.4
LCALL DELAY
TOP: CPL P1.4
LCALL DELAY
SJMP TOP
DELAY MOV R0,#E5H
BACK: DJNZ R0, BACK
RET

CALCULATION

79
 I. To write an ALP to generate a square wave of frequency 1KHz at port 1.5 ,use
timer 1 with the crystal frequency of 11.0592MHz
Crystal frequency = 11.0592MHz
Timer frequency (Tf) =Crystal frequency/12 =921.6 KHz
Timer period = 1/Tf = 1.085 µs
Required time delay = [FFFF-Timer count +1]* timer period
500µs = [65535-timercount +1] * 1.085µs
 Timer count = 65536-491
 65075d
 FE33H

II. To write an ALP to generate square waveform of 1KHz frequency at port 1.4 us-
ing software time delay
Crystal frequency = 11.0592MHz
Timer frequency (Tf) =Crystal frequency/12 =921.6 KHz
Timer period = 1/Tf = 1.085 µs
Time delay calculation
MOV R0,#E5H 1
BACK: DJNZ R0,BACK 2*COUNT
RET 2
3+2*COUNT
[3+2*COUNT]*1.085 µs=DESIRED TIME DELAY
[3+2*COUNT]=500/1.085 µs=461
2*COUNT=461-3
C0UNT=458/2=229=E5H

80
INFERENCES :

Max. Marks
Category
Marks Awarded
Preparation 10
Performance 30
Result 40
Viva-voce 10
Record 10
TOTAL 100

RESULT:
Thus the ALP to generate a square wave of frequency 1KHz at port 1.5 ,use
timer 1 with the crystal frequency of 11.0592 MHz and to generate square waveform of
1KHz frequency at port 1.4 using software time delay were executed and verified using
8051 microcontroller.

81
Ex. No. 17 Date :
COMMUNICATION BETWEEN 8051 MICROCONTROLLER KIT AND PC

AIM
To write a C program to interface DIP switch of 8051 microcontroller Kit with PC.
APPARATUS REQUIRED
8051 Microcontroller Kit and PC (installed with KEIL software)
PROGRAM
#include<reg51.h> //Define 8051 Registers
#define SW P2 //Define Switch to Port2
#define Led P0 //Define Led to Port0

//----------------------
// Main Function
//----------------------
void main()
{
// P2=0xff; //Port-2 as input to FFh
//P0=0x00; //Port-0 as output to 00h
while(1) //Loop Forever
{
Led = SW; //Assign the Switch value to Led
}
}

NOTE:
 The DIP switch is connected to the port-2 active low '0' and the LED to
the port-0.
 Make jumper jp4 to enable position

82
PROCEDURE
1. Open the Keil software from desktop.
2. To create a new project: - Project -> New project. Type the project name and
save. From project menu, select device for target. Then a window opens. Select
ATMEL -> AT89C51 from that window. Click OK. Then click “no” for the
question “copy standard 8051 start up code”?
3. To set the options for your target:- Project  Options for target
 Change the crystal value to 11.0592MHz.
 Enable “Create Hex file “option from output menu bar.
 Then click O.K
4. To type the program and to save: - File New. Type the program. Then
Filesave. Give the Filename with ‘.C’ extension to save the file. Then Click
save.To add the Program to your project:-
 Expand the target 1 tab(Press on ‘+’)
 Right click on source group 1
 Select Add files to group  select your program file. Click
Add Click close
5. To create Hex file: Project  Build target. correct the errors, if any. The hex file
will be created in the name of your project. close the keil software.
6. Download the hex file into flash magic.(open flash magic from desktop)
A. Communication
 Comm. port : Com 1
 Baud rate:9600
 Device :89V51RD2
 Ineterface:none
B. Erase select “erase all Flash”
C. Hex file
 Load the created hex file by using browse button.
 In ISP pull down menu, select ‘Read Device signature” is read.
 The device signature’s manufacture ID: BF, device ID:91
 In “options” menu,-Advanced optionCommunication

83
  Select Half –duplex Communication.
 Select “Hard ward configuration”
 Select “Assert DTR and RTS while COM port open
 Select Verify “After programming”
 Click “start” .After Display “Finished” message. Turn on the
Flash magic kit. Also setting appropriate switch position (SW 30)
to “ 7-seg” program is verified.

INFERENCES:

Max. Marks
Category
Marks Awarded
Preparation 10
Performance 30
Result 40
Viva-voce 10
Record 10
TOTAL 100

RESULT:
Thus, the C program to interface DIP switch of 8051 microcontroller kit
with PC was executed and verified using KEIL software.

84
 Ex. No. 18 Date :
SERIAL COMMUNICATION USING 8251
AIM
To transmit series of data between two microprocessor kits (8086) using 8251

APPARATUS REQUIRED
1. 8086 microprocessor kit 2
2. Serial cable 1

Baud Rate Calculation

Baud Factor × Required Baud Rate = Required CLK input to 8251.
 16 × 300 = 4800
 Required CLK input to 8251 = 4800Hz

PROGRAM TRANSMITTER

ADDRESS LABEL MNEMONICS OP CODE COMMENTS

1000 MOV SI,1500H BE 1500
1003 MOV AL,36H B0 36 Set timer channel 0
in mode 3.
1005 OUT16H,AL E6 16
1007 MOV AL,05H B0 05 Set Baud rate as 300
1009 OUT 10H,AL E6 10
100B MOV AL,01H B0 01
100D OUT 10H,AL E6 10
100F RELOAD: MOV CL,05H B1 05 Load Count
1011 CHECK: IN AL,0AH E4 0A Check transmitter
empty

85
1013 TEST AL,04 A8 04
1015 JZ CHECK 74 FA
1017 MOV AL,[SI] 8A 04
1019 OUT 08,AL E6 08
101B INC SI 46
101C CMP AL,3FH 3C 3F Check EOF
101E JNZ RELOAD 75 EF
1020 LOOP CHECK E2 EF
1022 INT 02 CD 02 Reset the system

Test data:

INPUT(transmitter) OUTPUT(Receiver)
Address/Reg Data Address Data
1500 11 1500 11
1501 22 1501 22
1502 33 1502 33
1503 44 1503 44
1504 55 1504 55
1505 3F
1506 3F
1507 3F
1508 3F
1509 3F

86
 PROGRAM - RECEIVER

ADDRESS LABEL MNEMONICS OP CODE COMMENTS

1000 MOV SI,1500H BE 1500
1003 MOV AL,36H B0 36 Set timer channel 0
in mode 3.
1005 OUT 16H,AL E6 16
1007 MOV AL,05H B0 05 Set Baud rate as 300
1009 OUT 10H,AL E6 10
100B MOV AL,01H B0 01
100D OUT 10H,AL E6 10
100F L1: MOV CL,05H B1 05 Load Count
1011 LOP: IN AL,0AH E4 0A Check receiver
ready
1013 TEST AL,02 A8 02
1015 JZ LOP 74 FA
1017 NOP 90
1018 NOP 90
1019 IN AL,08H E4,08
101B MOV [SI],AL 88,04
101D INC SI 46
101E CMP AL,3FH 3C,3F Check EOF
1020 JNZ L1 75,ED
1022 LOOP LOP E2,ED
1024 INT 02 CD,02 Reset the system

87
PROCEDURE
1. In the transmitter system, the data to be transmitted, are stored starting from
the
memory location, indicated by the memory pointer (1500H as per the above
program).
2. 5 Consecutive "3F"s are stored at the end of the data stream to indicate EOF.
3. The receiver program is executed first and then the transmitter program.
4. The received data are verified, starting from the memory location, indicated
by the memory pointer (1500H as per the above program).

INFERENCES:

Max. Marks
Category
Marks Awarded
Preparation 10
Performance 30
Result 40
Viva-voce 10
Record 10
TOTAL 100

RESULT:

88
 Thus the assembly language program to transmit series of data between two
microprocessor kit (8086) using 8251 was executed and verified

Cycle V – PROGRAMMING USING

TASM/MASM Simulator

89
 PC PROGRAMMING WITH ASSEMBLY LANGUAGE USING MASM

Common Procedure:

1. Open command window (click: start->run->type cmd )

2. In the command window type the directory name(ex: ‘d:’) after that change the
directory to 8086(masm) (ex: ‘cd masm’) after that type edit in that window to
go to program window

3. Press Esc key and type the program in that window.

4. After typing the program click: file->save->exit (filename will be saved as

‘.asm’) [again we are back command window]
5. Type : masm filename,,; [this will display the error report]
6. Type: link filename,,; [This will create a list file you can see this inside
the masm(8086)software]
*Note: Here no use of stack segment so no need to worry about stack error
7. Type : debug filename.exe [to create exe file]

8. Type: n filename.bin[to create a bin file]

9. Type : wcs:1000 [writing code segment]

10. Type :g =1000[to execute a program]

11. Type: u 1000[to see opcode]

12. Type : e 1200[see output in corresponding address] use space bar to see next out-
put value]

13. Type: q [terminate a line]

14. Type :exit [To return to windows]

90
Ex. No. 19 Date :
READ SCAN CODE AND CHARACTER CODE FROM KEYBOARD USING
MASM
AIM
To Write an ALP program to read scan code and character code from keyboard
using 8086 MASM assembler

REQUIREMENTS
PC with 8086 MASM Assembler

PROGRAM
Code segment
Assume cs: code, ds: code
Org 1000h
Mov ah, 0h
Int 16h
Mov si, 1200h
Mov [si], al
Inc si

Mov [si], ah
Mov ah, 4ch Max. Marks
Category
Marks Awarded
Preparation 10
Int 21h
Performance 30
Code ends
Result 40
End
Viva-voce 10
Record 10
TOTAL 100

91
Sample view:

RESULT:

92
 Thus an ALP program to read scan code and character code from keyboard was
executed and verified using 8086 MASM assembler.
Ex. No. 20 Date :
STRING DISPLAY USING MASM
AIM
To write an ALP program to display the string “kcet” using 8086 MASM
assembler

REQUIREMENTS
PC with 8086 MASM Assembler

PROGRAM
Code segment
Assume cs: code, ds: code
Org 1000h
Mov ah, 09h
Mov dx, 1200h

Int 21h
Mov ah, 4ch
Int 21h
Org 1200h Max. Marks
Db “kcet$” Category
Marks Awarded
Code ends Preparation 10
End
Performance 30
Result 40
Viva-voce 10
Record 10
TOTAL 100

RESULT:

93
 Thus an ALP program to display the string “kcet” was executed and verified
using 8086 MASM assembler

VIVA QUESTIONS

94
 Viva questions
1. Define opcode and operand?

2. What is Instruction cycle?

3. What is processor cycle (Machine cycle)?

4. Types of addressing modes?

5. What is immediate addressing mode?

6. What is direct addressing mode?

7. What is register addressing mode?

8. What is indirect addressing mode?

9. What is implied addressing mode?

10. What is the function of LXI H, 4000 instruction?

11. What is the function of INX H instruction?

12. What is the function of DCX H instruction?

13. What is the function of LHLD, 4200 instruction?

14. What is the function of XCHG instruction?

15. . What is the function of DAD instruction?

95
16. What is the function of SHLD instruction?

17. What is the function of SBB,B instruction?

18. What is the function of SPHL instruction?

19. What is the function of ORA D instruction?

20. What is the function of OUT & IN instruction?

21. What is the function of control& data register?

22. What is the difference between CALL &RET instruction?

23. Define interrupts?

24. What is the function of subroutine?

25. What is the function of RST instruction?

26. What is the function of JNC instruction?

27. What is the function of MVI instruction?

28. What is the function of STA instruction?

29. What is the function of MOV A, C instruction?

30. What is the function of INR instruction?

31. What is the function of DCR instruction?

32. What is the function of JNZ instruction?

33. Why interfacing is needed for I/0 devices?

34. List some of the features of INTEL 8259(Programmable Interrupt Controller)

96
35. What is the function of DEC DX instruction?

36. What is the function of LOOP instruction?

37. What is the function of JNB instruction?

38. What is the function of MOV instruction in 8086 processor?

39. What is the function of CLD instruction?

40. What is the function of STOSB instruction?

41. What is the function of INC DX, INC SI instruction?

42. What is the function of MOV DPTR, # 4150 instructions?

43. What is the function of MOVX @ DPTR, A instruction?

44. What is the function of SJMP instruction?

45. What is the function of ORL, ANL, and CPLA instruction?

46.What is the function of MUL AB instruction?

47. What is the function of INC DPTR instruction?

48. What is the function of LDA instruction?

49. What is the function of JMP instruction?

50. Give some examples of input devices to microprocessor-based system.

51. What is mean by microcontroller?

52. List the features of 8051 microcontroller?

53. What is the function of CMP M instruction?

97
54. What is the function of JNC instruction?

55. Mention the general purpose registers in 8085 microprocessor.

56. What is the function of accumulator?

57. What are the flag registers available in 8085?

58. What is buffer?

59. Mention the groups of 8085 pin signals.

60. Explain the function of program counter.

61. What is the function of SP?

62. What is memory?

63. What are the types of memory?

64. How many memory locations can be addressed by a microprocessor with 14 address lines?

65. How many address lines are necessary to address two megabytes (2048K) of memory?

66. How many address lines are necessary to address two megabytes(2048K) of memory?

67. What is the purpose of branch instructions in 8085 microprocessor?

68. What is the use of programming technique?

69. How many memory locations are available in 8086 microprocessor?

70. What are the flags available in 8086 microprocessor?

71. What are the general purpose registers in 8086?

72. What are the functional units in 8086?

98
73. What is the purpose of BIU?

74. What is the purpose of EU?

75. What is the purpose of segment register?

76. What are the segment registers in 8086?

77. What is the function of IP?

78. What is the function of control unit?

79. What is the use of base pointer register?

80. Mention the index registers of 8086.

81. What is effective address?

82. What are the assembly language program development steps?

83. What are the instructions types of 8086 mp?

84. Write any two data transfer instructions?

85. Write any two arithmetic instructions.

86. Write any two string manipulation instructions.

87. Define CALL and RET.

88. Write any two processor control instructions.

89. Mention any four initialization list in the 8086 program.

90. What are the assembly language program development tools?

91. What is an assembler directive?

99
92. Define SEGEMNT and ENDS.

93. Define EQU and DB directive.

94. What is editor?

95. Define assembler.

96. Define Linker.

97. What is minimum mode?

98. What is maximum mode?

99. What is machine cycle?

100. What is instructions cycle?

100