5-1 Which proper�es do all semiconductor memory cells share?

D. all of the above

5-2 One dis�nguishing characteris�c of memory that is designated as _________ is that it is possible to
both to read data from the memory and to write new data into the memory easily and rapidly.
a. RAM
5-3 Which of the following memory types are nonvola�le?
d. all of the above
5-4 In a _________, binary values are stored using tradi�onal flip-flop logic-gate configura�ons.
b. SRAM
5-5 A __________ contains a permanent patern of data that cannot be changed, is nonvola�le, and
cannot have new data writen into it.
c. ROM
5-6 With _________ the microchip is organized so that a sec�on of memory cells are erased in a single
ac�on.
a. flash memory
5-7 __________ can be caused by harsh environmental abuse, manufacturing defects, and wear.
b. Hard errors
5-8 _________ can be caused by power supply problems or alpha par�cles.
a. So� errors
5-9 The _________ exchanges data with the processor synchronized to an external clock signal and
running at the full speed of the processor/memory bus without imposing wait states.
b. SDRAM
5-10 _______ can send data to the processor twice per clock cycle.
c. DDR-DRAM
5-11 __________ increases the data transfer rate by increasing the opera�onal frequency of the RAM
chip and by increasing the prefetch buffer from 2 bits to 4 bits per chip.
a. DDR2
5-12 ________ increases the prefetch buffer size to 8 bits.
c. DDR3
5-13 Theore�cally, a DDR module can transfer data at a clock rate in the range of __________ MHz.
a. 200 to 600
5-14 A DDR3 module transfers data at a clock rate of __________ MHz.
b. 800 to 1600
5-15 The ________ enables the RAM chip to preposi�on bits to be placed on the data bus as rapidly as
possible.
d. buffer(dem.)
5-16 The basic element of a semiconductor memory is the memory cell.
a. True
5-17 A characteris�c of ROM is that it is vola�le.
b. False
5-18 RAM must be provided with a constant power supply.
a. True
5-19 The two tradi�onal forms of RAM used in computers are DRAM and SRAM.
a. True
5-20 A sta�c RAM will hold its data as long as power is supplied to it.
a. True
5-21 Nonvola�le means that power must be con�nuously supplied to the memory to preserve the bit
values.
b. False
5-22 The advantage of RAM is that the data or program is permanently in main memory and need never
be loaded from a secondary storage device.
b. False
5-23 Semiconductor memory comes in packaged chips.
a. True
5-24 All DRAMs require a refresh opera�on.
a. True
5-25 An error-correc�ng code enhances the reliability of the memory at the cost of added complexity.
a. True
5-26 DRAM is much costlier than SRAM.
b. False
5-27 RDRAM is limited by the fact that it can only send data to the processor once per bus clock cycle.
b. False
5-28 The prefetch buffer is a memory cache located on the RAM chip
a. True
5-29 The SRAM on the CDRAM cannot be used as a buffer to support the serial access of a block of data.
b. False
5-30 A number of chips can be grouped together to form a memory bank.
a. True
6-1 Greater ability to withstand shock and damage, improvement in the uniformity of the magnet film
surface to increase disk reliability, and a significant reduc�on in overall surface defects to help reduce
read-write errors, are all benefits of ___________.
c. the glass substrate
6-2 Adjacent tracks are separated by _________.
b. gaps
6-3 Data are transferred to and from the disk in __________.
a. sectors
6-4 In most contemporary systems fixed-length sectors are used, with _________ bytes being the nearly
universal sector size.
d. 512
6-5 Scanning informa�on at the same rate by rota�ng the disk at a fixed speed is known as the
_________.
a. constant angular velocity
6-6 The disadvantage of _________ is that the amount of data that can be stored on the long outer
tracks is only the same as what can be stored on the short inner tracks.
b. CAV
6-7 A __________ disk is permanently mounted in the disk drive, such as the hard disk in a personal
computer.
a. nonremovable
6-8 When the magne�zable coa�ng is applied to both sides of the plater the disk is then referred to as
_________.
c. double sided
6-9 The set of all the tracks in the same rela�ve posi�on on the plater is referred to as a _________.
d. cylinder
6-10 The sum of the seek �me and the rota�onal delay equals the _________, which is the �me it takes
to get into posi�on to read or write.
a. access �me
6-11 __________ is the standardized scheme for mul�ple-disk database design.
a. RAID
6-12 RAID level ________ has the highest disk overhead of all RAID types.
b. 1
6-13 A _________ is a high-defini�on video disk that can store 25 Gbytes on a single layer on a single
side.
d. Blu-ray DVD
6-14 ________ is when the disk rotates more slowly for accesses near the outer edge than for those near
the center.
c. Constant linear velocity (CLV)
6-15 The areas between pits are called _________.
a. lands
6-16 Magne�c disks are the founda�on of external memory on virtually all computer systems.
a. Ture
6-17 During a read or write opera�on, the head rotates while the plater beneath it stays sta�onary.
b. False
6-18 The width of a track is double that of the head.
b. False
6-19 There are typically hundreds of sectors per track and they may be either fixed or variable lengths.
a. True
6-20 A bit near the center of a rota�ng disk travels past a fixed point slower than a bit on the outside.
a. True
6-21 The disadvantage of using CAV is that individual blocks of data can only be directly addressed by
track and sector.
b. False
6-22 A removable disk can be removed and replaced with another disk.
a. True
6-23 The head must generate or sense an electromagne�c field of sufficient magnitude to write and read
properly.
a. True
6-24 The transfer �me to or from the disk does not depend on the rota�on speed of the disk.
b. False
6-25 RAID is a set of physical disk drives viewed by the opera�ng system as a single logical drive.
a. True
6-26 RAID level 0 is not a true member of the RAID family because it does not include redundancy to
improve performance.
a. True
6-27 Because data are striped in very small strips, RAID 3 cannot achieve very high data transfer rates.
b. False
6-28 The SSDs now on the market use a type of semiconductor memory referred to as flash memory.
a. True
6-29 SSD performance has a tendency to speed up as the device is used.
b. False
6-30 Flash memory becomes unusable a�er a certain number of writes.
a. True
7-1. The _________ contains *logic for performing a communica�on func�on between the peripheral
and the bus.
b. I/O module
7-2. The most common means of computer/user *interac�on is a __________.
a. Keyboard / Monitor
7-3. The I/O func�on includes a _________ requirement to *coordinate the flow of traffic between
internal resources and external devices.
c. Control and �ming
7-4. *An I/O module that takes on most of the detailed processing burden, presen�ng a high-level
interface to the processor, is usually referred to as an _________.
a. I/O channel
7-5. An I/O module that is quite primi�ve and requires detailed *control is usually referred to as an
_________.
b. I/O controller
7-6. The _________ command causes the I/O module to *take an item of data from the data bus and
subsequently transmit that data item to the peripheral.
d. Write
7-7. The ________ command is used to ac�vate a peripheral and *tell it what to do.
a. Control
7-8. ________ is when the DMA module must *force the processor to suspend opera�on temporarily.
c. Cycle stealing
7-9. The 8237 DMA is known as a _________ DMA controller.
d. Fly-by
7-10. _______ is a digital *display interface standard now widely adopted for computer monitors, laptop
displays, and other graphics and video interfaces.
a. DisplayPort
7-11. The ________ layer is the key to the opera�on of *Thunderbolt and what makes it atrac�ve as a
high-speed peripheral I/O technology.
c. Common transport
7-12. The Thunderbolt protocol _________ layer is responsible for link maintenance including hot-plug
detec�on and data encoding to provide *highly efficient data transfer.
d. Physical
7-13. The ________ *contains I/O protocols that are mapped on to the transport layer.
b. Applica�on
7-14. A ________ is used to *connect storage systems, routers, and other peripheral devices to an
InfiniBand switch.
a. Target channel adapter
7-15. A ________ *connects InfiniBand subnets, or connects an InfiniBand switch to a network such as a
local area network, wide area network, or storage area network.
d. Router
7-16. A set of I/O modules is a key element of a computer system.
a. True
7-17. An I/O module must recognize one unique address for each peripheral it controls.
a. True
7-18. I/O channels are commonly seen on microcomputers, whereas I/O controllers are used on
mainframes.
b. False
7-19. It is the responsibility of the processor to periodically check the status of the I/O module un�l it
finds that the opera�on is complete.
a. True
7-20. With isolated I/O there is a single address space for memory loca�ons and I/O devices.
b. False
7-21. A disadvantage of memory-mapped I/O is that valuable memory address space is used up.
a. True
7-22. The disadvantage of the so�ware poll is that it is �me consuming.
a. True
7-23. With a daisy chain the processor just picks the interrupt line with the highest priority.
b. False
7-24. Bus arbitra�on makes use of vectored interrupts.
a. True
7-25. The rota�ng interrupt mode allows the processor to inhibit interrupts from certain devices.
b. False
7-26. Because the 82C55A is programmable via the control register, it can be used to control a variety of
simple peripheral devices.
a. True
7-27. When large volumes of data are to be moved, a more efficient technique is direct memory access
(DMA).
a. True
7-28. An I/O channel has the ability to execute I/O instruc�ons, which gives it complete control over I/O
opera�ons.
a. True
7-29. A mul�point external interface provides a dedicated line between the I/O module and the external
device.
b. False
7-30. A Thunderbolt compa�ble peripheral interface is no more complex than that of a simple USB
device.
b. False
8-1. The __________ is a program that *controls the execu�on of applica�on programs and acts as an
interface between applica�ons and the computer hardware.
b. Opera�ng system
8-2. Facili�es and services provided by the OS that assist the programmer in crea�ng programs are in the
form of _________ programs that are not actually part of the OS but are accessible through the OS.
a. U�lity
8-3. The _________ defines the repertoire of machine language instruc�ons that a computer can
*follow.
d. ISA
8-4. The _________ defines the system call interface to the opera�ng system and the hardware
resources and services available in a system through the user instruc�on set *architecture.
c. ABI
8-5. The ________ gives a program access to the hardware resources and services available in a system
through the user instruc�on set architecture supplemented with high-level language library *calls.
d. API
8-6. A _________ system works *only one program at a �me.
b. Uniprogramming
8-7. A _________ is a special type of *programming language used to provide instruc�ons to the
monitor.
a. Job control language
8-8. The ________ scheduler is also *known as the dispatcher.
c. Short-term
8-9. A _________ is an *actual loca�on in main memory.
d. Physical address
8-10. ________ is when the processor spends most of its �me swapping pages rather than execu�ng
instruc�ons.
b. Thrashing
8-11. *Virtual memory schemes make use of a special cache called a ________ for page table entries.
a. TLB
8-12. With _________ the virtual address is the same as the physical address.
a. Unsegmented unpaged memory
8-13. A _________ is a collec�on of memory regions.
c. Domain
8-14. The OS maintains a __________ for each process that shows the frame loca�on for each page of
the process.
b. Page table
8-15. The _________ scheduler determines which programs are *admited to the system for processing.
 a. long-term
8-16. Scheduling and memory management are the two OS func�ons that are most relevant to the study
of computer organiza�on and architecture.
a. True
8-17. The end user is concerned mainly with the computer's architecture.
b. False
8-18. The most important system program is the OS.
a. True
8-19. The ABI is the boundary between hardware and so�ware.
b. False
8-20. The OS must determine how much processor �me is to be devoted to the execu�on of a par�cular
user program.
a. True
8-21. With a batch opera�ng system the user does not have direct access to the processor.
a. True
8-22. Privileged instruc�ons are certain instruc�ons that are designated special and can be executed only
by the monitor.
a. True
8-23. Uniprogramming is the central theme of modern opera�ng systems.
b. False
8-24. Both batch mul�programming and �me sharing use mul�programming.
a. True
8-25. An interrupt is a hardware-generated signal to the processor.
a. True
8-26. Swapping is an I/O opera�on.
a. True
8-27. With demand paging it is necessary to load an en�re process into main memory.
b. False
8-28. The Pen�um II includes hardware for both segmenta�on and paging.
a. True
8-29. ARM provides a versa�le virtual memory system architecture that can be tailored to the needs of
the embedded system designer.
a. True
8-30. Managers are users of domains that must observe the access permissions of the individual sec�ons
and/or pages that make up that domain.
b. False