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Abstract_2_1mux (1)

The document details an experiment on a 2:1 multiplexer using transmission gates with 0.5um technology, explaining its operation based on a control signal. It includes schematic diagrams and simulation results from Ngspice and Python. The conclusion summarizes the study and the obtained simulation plots.

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justbored0019
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0% found this document useful (0 votes)
3 views

Abstract_2_1mux (1)

The document details an experiment on a 2:1 multiplexer using transmission gates with 0.5um technology, explaining its operation based on a control signal. It includes schematic diagrams and simulation results from Ngspice and Python. The conclusion summarizes the study and the obtained simulation plots.

Uploaded by

justbored0019
Copyright
© © All Rights Reserved
Available Formats
Download as PDF, TXT or read online on Scribd
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Contributor Name-Sumanto Kar

Institute-Fr. Conceicao Rodrigues College of Engineering, Bandra


Year-2020
Title of the experiment
2:1 MUX Using Transmission Gate (using 0.5um Technology)
Theory:
A 2:1 multiplexer is shown in Figure below. This gate selects either input A or B on the basis
of the value of the control signal 'C'. When control signal C is logic low the output is equal to
the input A and when control signal C is logic high the output is equal to the input B.
A 2:1 multiplexer can be implemented using transmission gates. Figure below shows the
connection diagram of the 2:1 multiplexer using transmission gates. The 2:1 MUX selects
either A or B depending upon the control signal C.
When the control signal C is high then the upper transmission gate is ON and it passes A
through it so that output = A.

When the control signal C is low then the upper transmission gate turns OFF and it will not
allow A to pass through it, at the same time the lower transmission gate is 'ON' and it allows
B to pass through it so the output = B.
Schematic diagram:
The circuit schematic of the 2:1 MUX Using Transmission Gate (using 0.5um Technology) in
eSim is as shown below:

Figure 1: 2:1 MUX Using Transmission Gate (using 0.5um Technology)


Simulation Results:

1.Ngspice Plots-

Figure 2: Ngspice Input A Plot

Figure 3: Ngspice Input B Plot


Figure 4: Ngspice Input Select Line Plot

Figure 5: Ngspice Output Plot


2.Python Plots-

Figure 6: Python Input A Plot

Figure 7: Python Input B Plot


Figure 9: Python Input Select Line(sel) Plot

Figure 10: Python Output Plot


Conclusion:
Thus, we have studied 2:1 MUX Using Transmission Gate (using 0.5um
Technology) and the simulation plot of ngspice and python plot obtained in
eSim.

References:
1) https://www.electronics-tutorial.net/Digital-CMOS-Design/Pass-
Transistor-Logic/2-1-MUX-using-transmission-gate/
2) https://www.allaboutcircuits.com/technical-articles/implementing-
multiplexers-with-pass-transistor-logic/
3) http://vlsi-iitg.vlabs.ac.in/Multiplexer_theory.html

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