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The document outlines the course structure for Digital Electronics at Amity School of Engineering & Technology, detailing the course objectives, outcomes, and evaluation criteria. It includes information on the instructor, session hours, instructional methods, and suggested textbooks. The evaluation scheme consists of tests, attendance, and an end-semester examination, with specific weightage assigned to each component.

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0% found this document useful (0 votes)
2 views

1 Lecture -1

The document outlines the course structure for Digital Electronics at Amity School of Engineering & Technology, detailing the course objectives, outcomes, and evaluation criteria. It includes information on the instructor, session hours, instructional methods, and suggested textbooks. The evaluation scheme consists of tests, attendance, and an end-semester examination, with specific weightage assigned to each component.

Uploaded by

bvobvjqovnwov
Copyright
© © All Rights Reserved
Available Formats
Download as PDF, TXT or read online on Scribd
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Amity School of Engineering & Technology

Lecture-1

Introduction to the Subject


contents along with the Evaluation
criteria and attendance
requirements in AUMP.

1
Amity School of Engineering & Technology

Amity School of Engineering & Technology


DIGITAL ELECTRONICS
Credit Units: 04
Course Instructor: Dr Neeraj Gupta
Maj Gen Prof (Dr) SC Jain, VSM** (Retd)

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MAJ GEN (Dr) SC JAIN, VSM** (Retd)

• M.Tech (Computer Engg), IIT, Kharagpur-

• BE (Hons) Electrical, BITS, Pilani-

• MBA, Ph D

• Trained in USSR for four months

• Higher Defence Management Course

• Max life in Education – Three times director

• Awarded twice VSM & four times commendation card

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Amity School of Engineering & Technology

Schools ASET(Amity School of Engineering &


Technology)
Program & Semester B.Tech CSE-B

Course Title DIGITAL ELECTRONICS

Course Code CSE2314


Credit Unit 02
Email Dr Gupta [email protected];
Dr Jain [email protected]
Contact no. Dr Gupta 98965 37008;
Dr Jain 98366 82118

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Amity School of Engineering & Technology

Instruction Details

• Session hours : 2 hours per week


• Total No. of Lectures Planned : 24

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Amity School of Engineering & Technology

Course Objectives
The objective of this course is to
1. Provide the basic knowledge of digital logic
levels and application of knowledge to
understand combinational and sequential
circuits.
2. Explain the operation of logic family and
data convertors.

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Amity School of Engineering & Technology

Course Outcomes

On completion of this course, the students will be able to


CO1: Explain the difference between analog and digital signal; Describe the
Boolean algebra; Analyze the SOP & POS form of Boolean function; Solve k-
map and tabulation method to simplify the logical function; Apply universal
gates to implement the given logic.
CO2: Define the multiplexer and decoder; Explain the adder & subtractor;
Apply multiplexer to design Boolean function; Analyze the difference between
decoder and encoder.
CO3: Define flip flops; Compare combinational and sequential circuits;
Describe shift registers; Design counters and synchronous sequential circuits.
CO4: Explain the logic families; Compare the RTL, DTL, TTL and ECL logic
families.
CO5: Define data convertors; Explain analog to digital convertor and digital
to analog convertor.

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Amity School of Engineering & Technology

Instruction Methodology
– Lecture
– PPT
– Quiz
– Home assignment
– Tutorials
– Test

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Amity School of Engineering & Technology

Suggested Text Books and


References
Text Books
1. Anand Kumar, of Digital 2nd Edition, Prentice-Hall, 2004
2. Moris Mano, 2nd Edition, Pearson Education,2007.
3. R.P. Jain, Digital 2nd Edition, Tata Mcgraw Hill, 2003
Reference Books
1. Thomas L. Floyd, 11th Edition, Pearson Education, 2015
2. Malvino and Leech, Principles & 1st Edition, Tata McGraw Hill,
1993
Amity School of Engineering & Technology

Course Content
Module I (6)
• BOOLEAN FUNCTIONS
• Analog & digital signals, AND, OR, NOT, NAND, NOR &
XOR gates,
• Boolean algebra, Standard representation of logical
functions, K-map
• representation and simplification of logical function,
care
• conditions, XOR & XNOR simplifications of K-maps,
Tabulation
• method.
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Amity School of Engineering & Technology

Module II (6)
COMBINATIONAL CIRCUITS
Adders, Subtractors, Multiplexer, de-
multiplexer, decoder & encoder,
code converters, Comparators, decoder /
driver for display devices,
Implementation of logic functions using
multiplexer / de-multiplexer.

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Amity School of Engineering & Technology

Module III (8)

SEQUENTIAL CIRCUITS
Flip-flops: SR, JK, D & T flip flops Truth table,
Excitation table,
Conversion of flip-flops, race around condition,
Master Slave flip flop,
Shift registers: SIPO, PISO, PIPO, SIPO, Bi-directional;
Counters: ripple
& synchronous counters up / down; Synchronous
Sequential circuit:
design procedure.

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Amity School of Engineering & Technology

Module IV (2)
LOGIC FAMILIES
RTL, DTL, TTL, ECL.

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Amity School of Engineering & Technology

Module V: DACs and ADCs (2)


:
DATA CONVERTERS
ADC successive approximation, linear
ramp, dual slope;
DAC Binary Weighted, R-2R ladder
type.

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Amity School of Engineering & Technology

Academic Integrity Policy

Students are expected to follow Rules of


Conduct and Academic Behavior Standards
as detailed in the Student
regulations. Failure to comply with these
rules may result in disciplinary actions as
stipulated in the Students Regulations.

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Amity School of Engineering & Technology

Evaluation Scheme
S. No. Evaluation Weight (%) Date for
Component Evaluation

1 Test-1 5

2 Test-2 5

3 Class Test(Mid 15 As per academic


Semester Exam) calendar

4 Attendance 5 Through out the


semester

5 End-Semester 70 As per University


Examination schedule

Total 100

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Amity School of Engineering & Technology

Component III- Class Test (15 Marks)


Class Test is an individual activity which test students in
terms of the following:
• Knowledge of basic concepts and fundamentals and the
ability to apply them.
• Ability to analyze a given problem or situation.
• Ability to follow logical path in problem solving.
• By this component we can assess student- instructor
performance.

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Amity School of Engineering & Technology

(Contd…)
• As laid down in the academic regulations, the class test
is normally conducted at the mid of the semester. It
serves the purposes of judging the student’s capability
to integrate various fundamental principles and
application aspects of the course.
• No II Mid Semester will be conducted in any
circumstances.

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Amity School of Engineering & Technology

Component IV- Attendance (5 Marks)


• It shall be the responsibility of a student to attend all the
classes, to take prescribed quizzes, tests, examinations etc. and
to submit, properly and promptly all assignments and home
work.
• A student should normally maintain 100% attendance in each
of the course and minimum 75% without which he/she shall be
disqualified from appearing in the End Semester Examination.

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Amity School of Engineering & Technology

(Contd…)
The evaluation scheme for attendance is as follows:

Attendance Marks
up to 75 0
greater than 75 and upto 80 1
greater than 80 and upto 85 2
greater than 85 and upto 90 3
greater than 90 and upto 95 4
greater than 95 5

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Amity School of Engineering & Technology

Component V- End Semester exam.


As laid down in the academic regulations, the end semester
examination is conducted at the end of the semester and is
comprehensive enough to include the whole course. It serves
the purposes of judging the student’s capability to integrate
and inter-link various fundamental principles and application
aspects of the course.

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