Managing an S18 DRC violation if you have a custom OCC (and not the Synopsys DW OCC)
Managing an S18 DRC violation if you have a custom OCC (and not the Synopsys DW OCC)
Title
Managing an S18 DRC violation if you have a custom OCC (and not the Synopsys DW OCC)
Description
Question:
Why do we get an S18 DRC violation when we have custom OCC in the design? How do we resolve this violation?
Answer:
If you do the scan insertion using DFT Compiler using the existing OCC flow (that means you have your custom OCC),
then the SPF generated by DFT Compiler is by the default DW OCC (Synopsys) design. This approach requires an extra
ATE clock pulse between the CAPTURE and LOAD_UNLOAD procedure to switch from one mode to another.
In the SPF (generated by DFT Compiler), this extra pulse is named as "Internal_scan_pre_shift" or
"ScanCompression_mode_pre_shift," depending on whether you have a regular scan or ScanCompression, respectively.
This extra vector looks like the example: "load_unload" { W "_default_WFT_"; C { "test_so"=X; "test_si"=0; "rst_b"=1;
"ate_clk"=0; "ref_clk"=0; "test_se"=1; } extra--> "Internal_scan_pre_shift" : V { "ate_clk" = P; "ref_clk" = P; "_si" = NN;
"_so" = XX; "test_se" = 1; } Shift { W "_default_WFT_"; V { "_si"=#; "_so"=#; "ate_clk"=P; "ref_clk"=P; } } }
Now, if you take the same SPF to TetraMAX for pattern generation using the custom OCC, you will get an S18 DRC
violation.
If your OCC design does not require any extra ATE pulses to switch from CAPTURE mode to LOAD_UNLOAD mode. An
S18 violation appears because this extra ATE clock pulse may disturb the captured value in the scan flops.
NOTE: This extra pulse is completely valid and is compulsory if you are inserting the Synopsys DW OCC.
To resolve the S18 DRC violation, remove this extra pulse from the SPF file. You should not get any additional S18
violations in that case or you can make sure the ATE clock is off during that extra cycle. The new SPF should look like one
of the following examples:
Remove the extra vector completely: "load_unload" { W "_default_WFT_"; C { "test_so"=X; "test_si"=0; "rst_b"=1;
"ate_clk"=0; "ref_clk"=0; "test_se"=1; } Shift { W "_default_WFT_"; V { "_si"=#; "_so"=#; "ate_clk"=P; "ref_clk"=P; } } } OR:
Make the ATE clock off ("ate_clk" = 0;) in that extra vector: "load_unload" { W "_default_WFT_"; C { "test_so"=X;
"test_si"=0; "rst_b"=1; "ate_clk"=0; "ref_clk"=0; "test_se"=1; } "Internal_scan_pre_shift" : V { "ate_clk" = 0; "ref_clk" = P;
"_si" = NN; "_so" = XX; "test_se" = 1; } Shift { W "_default_WFT_"; V { "_si"=#; "_so"=#; "ate_clk"=P; "ref_clk"=P; } } }
NOTE: You will not get any S18 violation if your OCC (custom) is designed to require the extra pulse while switching from
CAPTURE mode to LOAD_UNLOAD mode. In that case, removing the extra pulse will cause scan chain blockages.
Workaround
Product L1
TestMAX ATPG (/s/detail/01t1U000003IY0ZQAW)
Additional Product(s)
Article Number
000011255
URL Name
Managing-an-S18-DRC-violation-if-you-have-a-custom-OCC-and-not-the-Synopsys-DW-OCC-1576091211661
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