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DSP - FAQ Unit 5

The document is a collection of frequently asked questions (FAQs) related to Digital Signal Processing (DSP) for a B.E. in Electronics and Communication Engineering. It covers various topics including multirate signal processing, adaptive filtering, sampling rate conversion, and the architecture of DSP processors. Additionally, it includes both theoretical questions and practical applications relevant to the subject matter.

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21 views

DSP - FAQ Unit 5

The document is a collection of frequently asked questions (FAQs) related to Digital Signal Processing (DSP) for a B.E. in Electronics and Communication Engineering. It covers various topics including multirate signal processing, adaptive filtering, sampling rate conversion, and the architecture of DSP processors. Additionally, it includes both theoretical questions and practical applications relevant to the subject matter.

Uploaded by

freefire47049
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PDF, TXT or read online on Scribd
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BHARATHIDASAN ENGINEERING COLLEGE

NATTARAMPALLI – 635854
Frequently Asked Questions (FAQ)
UNIT V – DSP APPLICATIONS
Degree / Branch : B.E / ECE Sem / Year : 4th / 3rd
Sub Name : Digital Signal Processing Sub Code : EC3492

Part – A
1. Give the steps in multistage sampling rate converter design (Nov 2013).
2. Write any four applications of multirate signal processing. (Nov 2013) (May 2013)
(Nov 2014) (Nov 2015) (May 2017)
3. What is anti – imaging filter? (May 2013)
4. Write the need for decimation. (May 2014)
5. What is meant by multirate signal processing? (May 2014)
6. Define decimator and interpolator. (Nov 2014)
7. State sampling theorem for a band limited signal. (Nov 2015)
8. What is the need for antializing filter. (May 2016)
9. If the spectrum of a sequence x(n) is X(ejw), then what is the spectrum of the signal
down sampled by 2?(May 2016)
10. What is the need for anti imaging filter after upsampling signal? (Nov 2016)
11. What is meant by adaptive filter? (Nov 2016) (May 2017)
12. Write the input output relationship for a decimator. (Nov 2017)
13. State the applications of adaptive filtering. (Nov 2017)
14. Show that the up sampler and down sampler are time invariant system. (May 2018)

15. What is the need for multirate signal processing?


16. Give some examples of multirate digital systems.
17. What is meant by sampling rate conversion?
18. What is the need for adaptive equalisation in a digital communication system?
19. What is meant by Adaptive Noise cancelling?
20. List the merits of instruction pipelining. (Nov 2020)
21. Compare fixed point and floating point DSP processors. (Nov 2020)
22. What is the need for pipelining in digital signal. (Nov 2021)
23. What is the difference between Harvard and Von Newman architecture? (Nov 2021)
24. What do you understand from pipe line operation of digital signal processor? (Nov 2022)
25. List the addressing modes of digital signal processor. ? (Nov/Dec 2022)

Prepared by P. Rajkumar, HOD/ECE


26. Define Pipeling.
27. What is on-Chip memory?
28. What is barrel shifter?
29. What are the different kinds of architecture available for general purpose digital signal
processor?
30. What are the applications of digital signal processor?
31. What is barrel shifter?
32. What is the difference between Harvard and Von Newman architecture?
33. If the spectrum of a sequence x(n) is X(ejw) then what is the spectrum of the down
sampled by the factor of 2? (Nov/Dec 2024)
34. Give the use of echo cancellation in DSP. (Nov/Dec 2024)

Part B
1. Explain the multistage implementation of sampling rate conversion with a block
diagram. (8) (May 2013) (Nov 2016)
2. A signal x(n) is given by x(n) = {0,1,2,3,4,5,6,0,1,2,3,….} (May 2013)
i. Obtain the decimated signal with a factor of 2
ii. Obtain the interpolated signal with a factor of 2
3. Explain sampling rate increase by an integer factor I and derive the input output
relationship in both time and frequency domains. (May 2013) (Nov 2017) (May 2018)
(Nov/Dec 2024)
4. State the various applications of multirate signal processing. (May 2014)
5. Implement a 2 – stage decimator for the following specifications: (Nov 2014) (Nov 2015)

Sampling rate of the input signal = 20 kHz, M=100


Pass band = 0 to 40 Hz Transition band = 40 to 50 Hz
Pass band ripple = 0.01 Stop band ripple = 0.002.

6. Obtain the decimated signal y(n) by a factor 3 from the input signal x(n) (8) (Nov 2015)

7. Draw the signal flow graph for IIR structure M to I decimator. Draw the signal flow
graph for I to L interpolator. (Nov 2015)

8. For the signal x(n), obtain the spectrum of down sampled signal x(Mn) and up
sampled signal x(n/L) (May 2016)

9. Discuss in detail about the applications of adaptive filtering with a suitable diagram.
(May 2016) (Nov 2017) (May 2018)

10. Explain the concept of decimation by a factor D and interpolation by a factor I. With help
of equation explain sampling rate conversion by a rational factor I/D. (May 2017)

Prepared by P. Rajkumar, HOD/ECE


11. Explain the operation of adaptive filter with suitable diagrams and equations.
(May 2017)
12. i) Illustrate the addressing modes of DSP processors. (7)
ii) Sketch the structure of the MAC unit and DSP processor and explain its
functions. (6) (Nov 2020)
13. i) Explain the architecture of fixed point and floating point DSP processor.
ii) With suitable diagrams show how to implement FIR filter in DSP processor. (Nov2022)
14. With neat function block diagram, elaborate in detail about any one of the
latest DSP architectures. (Nov 2021)
15. Explain how programming is done in digital signal processors. Also explain
any one application. (Nov 2021)
16. Explain in detail about Fixed point architecture of TMS320C5X DSP processor.
17. Explain in detail about Floating point architecture of TMS320C3X DSP processor.
18. Explain in detail about various types of General purpose DSP processor.
19. Explain in detail about various types of General purpose DSP processor.

20. Write a short note on i) Pipe ling. ii) On-chip memory.

21. Define Pipeling & List out different stages in pipelining.

22. Illustrate the addressing modes of DSP processors.


23. Explain Von Neumann, Harvard architecture and modified Harvard architecture for

the computer.

24. Explain the effective implementation of polyphase structures for decimation and
interpolation filters. (Nov/Dec 2024)

25. Explain the architecture of the fixed point DSP processor. Discuss the applications of fixed
point processor. (Nov/Dec 2024)

Prepared by P. Rajkumar, HOD/ECE

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