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This document outlines the structure and content of an end-semester examination for a B. Tech course in Microprocessor & Computer Architecture. It includes various questions related to 8086 microprocessor operations, memory segmentation, instruction formats, and control units, requiring students to attempt specific parts. The exam is set for April-May 2024, with a total duration of 3 hours and a maximum score of 40 marks.

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shreya.singhug23
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0% found this document useful (0 votes)
6 views

mm1

This document outlines the structure and content of an end-semester examination for a B. Tech course in Microprocessor & Computer Architecture. It includes various questions related to 8086 microprocessor operations, memory segmentation, instruction formats, and control units, requiring students to attempt specific parts. The exam is set for April-May 2024, with a total duration of 3 hours and a maximum score of 40 marks.

Uploaded by

shreya.singhug23
Copyright
© © All Rights Reserved
Available Formats
Download as PDF, TXT or read online on Scribd
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Degree: B. Tech (ECAM) Semester: IV Course work —

END-SEMESTER EXAMINATION, APRIL-MAY,2024

Course Title: Microprocessor & Computer Architecture


Course Code; EACPCI2
Duration: 03 Hours
Max. Marks; 40
Note: Attempt all questions in the given order only. Missing data/information (if any),
-

maybe suitably assumed & mentioned in the answer.

Question Marks CO
Attempt any 2 parts of the following
1. List the control signals used in minimum mode and 2 1
maximum mode operation of 8086.
2. Explain the maximum mode configuration. 2
I. What is ALE and explain its importance. i.s ~
2. Explain memory segmentation in 8086 and the
importance of 13W unit of 8086 in fetching data 2.5
from memory segment.
What is the importance of status register in 8086. 1.5 1
Explain the various instructions used to change the
status of status register with example.
- 2.5
Attemj~t any 2 parts of the following
I. Explain the importance of vector table in 8086. 2 2
2. Explain how 16 input/output devices are connected 2
to 8086.
I. Discuss the role of stack memory while processor 1 2
process an intenupt.
Write the programs to transfer five data’s using
string instructions and basic data transfer 3
instructions
Explain the various indirect addressing modes with 3 3
the help of instructions and the use of those
instructions.
What is BSR mode and its practical use.
I
Attempt any 2 parts of the following
I. What is the 16-bit instruction format of direct and 1 2
indirect addressing instruction.
Explain how a hardware control unit connects the 3
various registers to the common bus.
I. What is instruction cycle and draw the flowchart of 2 3
instruction cycle for various instructions and
explain in detail.
How many timing signals are required to fetch and
decode an instruction and name the micro 2
instructions performed in each timing cycle.
Explain how the control unit controls: 4 2
a. the data transfer between various general-purpose
b. how it controls the various logical operations
using a common control instruction written in control
memory.
4ttexnpt ~ 2 parts of the following
Explain how an assembler assemble the instruction
using first pass and second pass.
1. What is micro programmed control micro
instruction
2. Explain address sequencing in micro programmed
controL
I. Differentiate Harvard and Von-Neumann
architecture.
2. Differentiate CISC and RISC architecture.
Attempt yps of the
1. What is Instruction pipelining and draw the space
time diagram of pipelining for 5 segments and 6
tasks and cx lain.
Explain the various conflicts and their remedies in 4
instruction i dine.
Ex lain DMA mode of data transfer. 4

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